Patents by Inventor Tsunehiro Nakajima
Tsunehiro Nakajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230282611Abstract: When a semiconductor unit is heated, a heater having a flat heating surface is used for performing heating in a state in which a lower surface of an insulated circuit board is placed on the heating surface. When the semiconductor unit is cooled, a cooler having a cooling surface including a pair of support portions is used for performing cooling in which a lower surface of a pair of outer regions of the insulated circuit board are respectively placed to be contact with the pair of support portions, and in which a central region between the pair of outer regions of the insulated circuit board is pressed downward so as to be downward convex.Type: ApplicationFiled: January 25, 2023Publication date: September 7, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Hiroki TAKAHASHI, Tsunehiro NAKAJIMA, Takashi SAITO
-
Publication number: 20230207517Abstract: A semiconductor device manufacturing method, including: a first treatment process for reducing an amount of oxygen and carbon adsorbed to a main surface of the conductive plate to 20 atomic % or less; a first checking process for checking whether the conductive plate has a temperature no higher than a reference temperature; a chip placement process for placing, responsive to the conductive plate having the temperature no higher than the reference temperature, a semiconductor chip on the main surface of the conductive plate via a sinter material; a first bonding process for applying heat and pressure to the sinter material according to a first condition that allows the organic substance to partially remain; a preparatory process for making preparations for further bonding the semiconductor chip; and a second bonding process for further applying heat and pressure to the sinter material according to a second condition that sinters the sinter material.Type: ApplicationFiled: October 27, 2022Publication date: June 29, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventor: Tsunehiro NAKAJIMA
-
Patent number: 11658231Abstract: A semiconductor device having a semiconductor module. The semiconductor module includes first and second conductor layers facing each other, a first semiconductor element provided between the first and second conductor layers, positive and negative electrode terminals respectively provided on edge portions of the first and second conductor layers at a first side of the semiconductor module in a top view of the semiconductor module, control wiring that is electrically connected to the first control electrode, and that extends out of the first and second conductor layers at a second side of the semiconductor module that is opposite to the first side in the top view, and a control terminal that is electrically connected to the control wiring, that is positioned outside the first and second conductor layers in the top view, and that has an end portion that is aligned with the positive and negative electrode terminals.Type: GrantFiled: October 30, 2020Date of Patent: May 23, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Motohito Hori, Yoshinari Ikeda, Akira Hirao, Tsunehiro Nakajima
-
Publication number: 20210184023Abstract: A semiconductor device having a semiconductor module. The semiconductor module includes first and second conductor layers facing each other, a first semiconductor element provided between the first and second conductor layers, positive and negative electrode terminals respectively provided on edge portions of the first and second conductor layers at a first side of the semiconductor module in a top view of the semiconductor module, control wiring that is electrically connected to the first control electrode, and that extends out of the first and second conductor layers at a second side of the semiconductor module that is opposite to the first side in the top view, and a control terminal that is electrically connected to the control wiring, that is positioned outside the first and second conductor layers in the top view, and that has an end portion that is aligned with the positive and negative electrode terminals.Type: ApplicationFiled: October 30, 2020Publication date: June 17, 2021Applicant: FUJI ELECTRIC CO., LTD.Inventors: Motohito HORI, Yoshinari IKEDA, Akira HIRAO, Tsunehiro NAKAJIMA
-
Patent number: 10600921Abstract: In forming an ohmic electrode on a back surface of an n-type SiC substrate, an n+-type semiconductor region is formed in a surface layer of the back surface of an n-type epitaxial substrate by ion implantation. In this ion implantation, the impurity concentration of the n+-type semiconductor region is a predetermined range and preferably a predetermined value or less, and an n-type impurity is implanted by acceleration energy of a predetermined range such that the n+-type semiconductor region has a predetermined thickness or less. Thereafter, a nickel layer and a titanium layer are sequentially formed on the surface of the n+-type semiconductor region, the nickel layer is heat treated to form a silicide, and the ohmic electrode formed from nickel silicide is formed. In this manner, a back surface electrode that has favorable properties can be formed while peeling of the back surface electrode can be suppressed.Type: GrantFiled: May 11, 2016Date of Patent: March 24, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Naoyuki Ohse, Fumikazu Imai, Tsunehiro Nakajima, Kenji Fukuda, Shinsuke Harada, Mitsuo Okamoto
-
Publication number: 20190300999Abstract: A method of forming a metallic film is provided. The method includes: controlling gas conditions in a processing vessel in which a substrate is disposed on a stage; performing a pretreatment by spraying a plasma jet on the substrate in the processing vessel, the plasma jet being generated from gas containing an inert gas and hydrogen; and thermal spraying metallic material on the substrate while heating the stage at 100° C. or higher, the thermal spraying being performed after the pretreatment.Type: ApplicationFiled: March 29, 2019Publication date: October 3, 2019Inventors: Eiji YAMAGUCHI, Tsunehiro NAKAJIMA, Yoichi RYOKAI, Norihiro NASHIDA
-
Patent number: 10374050Abstract: A titanium layer and a nickel layer are sequentially formed on a back surface of a SiC wafer. Next, by high-temperature heat treatment, the SiC wafer is heated and the titanium layer and the nickel layer are sintered forming a nickel silicide layer that includes titanium carbide. By this high-temperature heat treatment, an ohmic contact of the SiC wafer and the nickel silicide layer is formed. Thereafter, on the nickel silicide layer, a back surface electrode multilayered structure is formed by sequentially stacking a titanium layer, a nickel layer, and a gold layer. Here, in forming the nickel layer that configures a back surface electrode multilayered structure, the nickel layer is formed under a condition that satisfies 0.0<y<?0.0013x+2.0, where the thickness of the nickel layer is x [nm] and the deposition rate of the nickel layer is y [nm/second]. Thus, peeling of the back surface electrode can be suppressed.Type: GrantFiled: December 4, 2015Date of Patent: August 6, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventors: Fumikazu Imai, Tsunehiro Nakajima
-
Patent number: 10079155Abstract: A semiconductor device manufacturing method, sequentially includes a semiconductor element preparation step of preparing a first semiconductor element on which is formed a plurality of metal electrodes, a step of covering a surface of the first semiconductor element on which the metal electrode is not formed with a first insulating member, and a step of forming a second metal layer that conductively connects the metal electrode of the first semiconductor element and a first metal layer on an insulated circuit substrate across the second insulating member.Type: GrantFiled: July 6, 2017Date of Patent: September 18, 2018Assignee: FUJI ELECTRIC CO., LTD.Inventors: Tsunehiro Nakajima, Yoshikazu Takahashi, Norihiro Nashida
-
Patent number: 9972521Abstract: A glass substrate is bonded to a front surface of a wafer on which a front surface element structure is formed, with an adhesive layer interposed therebetween. An adhesive layer is formed on the wafer to extend from the front surface of the wafer to a chamfered portion and a side surface of the wafer. The adhesive layer is formed on a first surface of the glass substrate and is not formed on a chamfered portion and a side surface of the glass substrate. After the rear surface of the wafer is ground, a rear surface element structure is formed on the ground rear surface. A laser beam is radiated to the glass substrate and the glass substrate is peeled from the adhesive layer. The adhesive layer is removed and the wafer is cut by dicing. In this way, a chip having a thin semiconductor device formed thereon is completed.Type: GrantFiled: September 3, 2015Date of Patent: May 15, 2018Assignee: FUJI ELECTRIC CO., LTD.Inventor: Tsunehiro Nakajima
-
Patent number: 9972499Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a front surface and a back surface; forming a transition metal layer on a surface of the semiconductor substrate; and exposing the semiconductor substrate having the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves, to cause the transition metal layer to generate heat. During exposure of the semiconductor substrate, a portion of the semiconductor substrate contacting the transition metal layer is heated by a transfer of heat from the transition metal layer and, at an interface of the transition metal layer and the semiconductor substrate, an ohmic contact is formed by reaction of the transition metal layer and the semiconductor substrate, such as to form a transition metal silicide when the semiconductor substrate is silicon carbide. The ohmic contact provides a lower contact resistivity and device properties can be prevented from degrading.Type: GrantFiled: March 9, 2016Date of Patent: May 15, 2018Assignee: FUJI ELECTRIC CO., LTD.Inventors: Haruo Nakazawa, Masaaki Ogino, Tsunehiro Nakajima, Kenichi Iguchi, Masaaki Tachioka, Kiyokazu Nakagawa
-
Patent number: 9922858Abstract: Provided is a semiconductor device manufacturing method that includes joining a support substrate to a back side of a semiconductor wafer across a ceramic adhesive layer and a mask, to form a joined body. The method further includes forming a functional structure on a front side of the semiconductor wafer. The method further includes detaching the support substrate from the semiconductor wafer by removing the ceramic adhesive layer and the mask. The method further includes a back side processing step of carrying out back side processing on the back side of the semiconductor wafer.Type: GrantFiled: August 7, 2015Date of Patent: March 20, 2018Assignee: FUJI ELECTRIC CO., LTD.Inventors: Masaaki Tachioka, Tsunehiro Nakajima
-
Patent number: 9905684Abstract: A semiconductor device includes a semiconductor substrate that is made of a semiconductor material with a wider band gap than silicon, a field effect transistor, including a front surface element structure, provided on a front surface of the substrate, and a drain electrode having surface contact with the substrate so as to form a Schottky junction between the semiconductor substrate and the drain electrode.Type: GrantFiled: March 6, 2015Date of Patent: February 27, 2018Assignee: FUJI ELECTRIC CO., LTD.Inventors: Haruo Nakazawa, Masaaki Ogino, Tsunehiro Nakajima
-
Patent number: 9892919Abstract: A first nickel film is deposited inside a contact hole of an interlayer dielectric formed on an n+-type SiC substrate. Irradiation with a first laser is carried out, forming an Ohmic contact with a silicon carbide semiconductor. A second nickel film and a front surface electrode film are deposited on the first nickel film, forming a source electrode. The back surface of the n+-type SiC substrate is ground, and a third nickel film is formed on the ground back surface of the n+-type SiC substrate. Irradiation with a second laser is carried out, forming an Ohmic contact with the silicon carbide semiconductor. A fourth nickel film and a back surface electrode film are deposited on the third nickel film, forming a drain electrode. By so doing, it is possible to prevent electrical characteristic deterioration of a semiconductor device, and to prevent warping and cracking of a wafer.Type: GrantFiled: April 9, 2015Date of Patent: February 13, 2018Assignee: FUJI ELECTRIC CO., LTD.Inventors: Haruo Nakazawa, Masaaki Tachioka, Naoto Fujishima, Masaaki Ogino, Tsunehiro Nakajima, Kenichi Iguchi
-
Publication number: 20170309496Abstract: A semiconductor device manufacturing method, sequentially includes a semiconductor element preparation step of preparing a first semiconductor element on which is formed a plurality of metal electrodes, a step of covering a surface of the first semiconductor element on which the metal electrode is not formed with a first insulating member, and a step of forming a second metal layer that conductively connects the metal electrode of the first semiconductor element and a first metal layer on an insulated circuit substrate across the second insulating member.Type: ApplicationFiled: July 6, 2017Publication date: October 26, 2017Inventors: Tsunehiro NAKAJIMA, Yoshikazu TAKAHASHI, Norihiro NASHIDA
-
Patent number: 9741587Abstract: Provided are a semiconductor device manufacturing method and semiconductor device such that manufacturing can be simplified and the thickness of the semiconductor device can be reduced. The semiconductor device includes an insulated circuit substrate having on one main surface thereof a first metal layer and a second metal layer, a metal plate conductively connected to the first metal layer, a first semiconductor element including on front and rear surfaces thereof a plurality of metal electrodes, a first insulating member disposed on a side surface of the first semiconductor element, a second insulating member disposed on the first insulating member and on the first semiconductor element, and a third metal layer, in which at least one portion thereof is disposed on the second insulating member and which conductively connects the metal electrode of the first semiconductor element and the second metal layer on the insulated circuit substrate.Type: GrantFiled: July 8, 2016Date of Patent: August 22, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventors: Tsunehiro Nakajima, Yoshikazu Takahashi, Norihiro Nashida
-
Patent number: 9728441Abstract: A method for manufacturing a semiconductor device includes: bonding at least a part of the rear surface of a semiconductor wafer, and a supporting substrate in use of using a silane coupling agent; forming a functional structure on a front surface of the semiconductor wafer; placing a condensation point of laser light transmitted through the semiconductor wafer on a bonding interface between the semiconductor wafer and the supporting substrate, and irradiating the bonding interface with the laser light, thereby forming a fracture layer on at least a part of an outer circumferential section of the bonding interface; separating the bonding interface; and carrying out rear surface processing on the rear surface of the semiconductor wafer.Type: GrantFiled: September 3, 2015Date of Patent: August 8, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventors: Masaaki Tachioka, Tsunehiro Nakajima
-
Patent number: 9685333Abstract: A method of manufacturing a silicon carbide semiconductor device includes grinding a back surface of a semiconductor substrate formed of silicon carbide to reduce thickness thereof and provide an altered layer that is ground; removing by polishing or etching, the altered layer from the back surface; forming a nickel film on the back surface of the semiconductor substrate after removing the altered layer; heat treating the nickel film to forming a nickel silicide layer by silicidation; and forming a metal electrode on a surface of the nickel silicide layer.Type: GrantFiled: February 5, 2016Date of Patent: June 20, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventors: Tsunehiro Nakajima, Masanobu Iwaya, Fumikazu Imai
-
Publication number: 20170053871Abstract: Provided are a semiconductor device manufacturing method and semiconductor device such that manufacturing can be simplified and the thickness of the semiconductor device can be reduced. The semiconductor device includes an insulated circuit substrate having on one main surface thereof a first metal layer and a second metal layer, a metal plate conductively connected to the first metal layer, a first semiconductor element including on front and rear surfaces thereof a plurality of metal electrodes, a first insulating member disposed on a side surface of the first semiconductor element, a second insulating member disposed on the first insulating member and on the first semiconductor element, and a third metal layer, in which at least one portion thereof is disposed on the second insulating member and which conductively connects the metal electrode of the first semiconductor element and the second metal layer on the insulated circuit substrate.Type: ApplicationFiled: July 8, 2016Publication date: February 23, 2017Inventors: Tsunehiro NAKAJIMA, Yoshikazu TAKAHASHI, Norihiro NASHIDA
-
Patent number: 9564334Abstract: A method of manufacturing a semiconductor device includes forming a device structure in a surface of a semiconductor substrate, forming, in a face of the semiconductor substrate, a transition metal layer that contacts the semiconductor substrate, and exposing the semiconductor substrate having the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves to cause the transition metal layer to generate heat. During exposure of the semiconductor substrate to the hydrogen plasma atmosphere, a portion of the semiconductor substrate contacting the transition metal layer is heated by a transfer of the heat from the transition metal layer, and an ohmic contact is formed at an interface of the transition metal layer and the semiconductor substrate by reaction of the transition metal layer and the semiconductor substrate. When the semiconductor substrate is silicon carbide, the ohmic contact is composed of a silicide, such as a transition metal silicide.Type: GrantFiled: March 9, 2016Date of Patent: February 7, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kenichi Iguchi, Haruo Nakazawa, Tsunehiro Nakajima, Masaaki Ogino, Masaaki Tachioka
-
Patent number: 9548205Abstract: A method of manufacturing a semiconductor device that reduces degradation of device properties includes forming an impurity region in a surface layer of a semiconductor substrate by ion injection; forming a transition metal layer in a surface of the impurity region; and exposing the semiconductor substrate with the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves. The transition metal layer is heated and the heat is transferred from the transition metal layer to the impurity region to form an ohmic contact at the interface of the transition metal layer and the impurity region by reaction of the transition metal layer and the impurity region, and the impurity region is activated. When the substrate is a silicon carbide substrate, the ohmic contact is composed of a transition metal silicide and the impurity region, which is an ion injection layer, is activated.Type: GrantFiled: March 9, 2016Date of Patent: January 17, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventors: Haruo Nakazawa, Masaaki Ogino, Tsunehiro Nakajima, Kenichi Iguchi, Masaaki Tachioka