Patents by Inventor Tsunehiro Nakajima
Tsunehiro Nakajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160254393Abstract: In forming an ohmic electrode on a back surface of an n-type SiC substrate, an n+-type semiconductor region is formed in a surface layer of the back surface of an n-type epitaxial substrate by ion implantation. In this ion implantation, the impurity concentration of the n+-type semiconductor region is a predetermined range and preferably a predetermined value or less, and an n-type impurity is implanted by acceleration energy of a predetermined range such that the n+-type semiconductor region has a predetermined thickness or less. Thereafter, a nickel layer and a titanium layer are sequentially formed on the surface of the n+-type semiconductor region, the nickel layer is heat treated to form a silicide, and the ohmic electrode formed from nickel silicide is formed. In this manner, a back surface electrode that has favorable properties can be formed while peeling of the back surface electrode can be suppressed.Type: ApplicationFiled: May 11, 2016Publication date: September 1, 2016Applicant: FUJI ELECTRIC CO., LTD.Inventors: Naoyuki OHSE, Fumikazu IMAI, Tsunehiro NAKAJIMA, Kenji FUKUDA, Shinsuke HARADA, Mitsuo OKAMOTO
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Publication number: 20160189967Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a front surface and a back surface; forming a transition metal layer in a surface of the semiconductor substrate; and exposing the semiconductor substrate having the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves, to cause the transition metal layer to generate heat, Thus, during the exposure of the semiconductor substrate, a portion of the semiconductor substrate contacting the transition metal layer is heated by a transfer of heat from the transition metal layer and, at an interface of the transition metal layer and the semiconductor substrate, an ohmic contact is formed by reaction of the transition metal layer and the semiconductor substrate, such as to form a transition metal silicide when the semiconductor substrate is silicon carbide. The ohmic contact provides a lower contact resistivity and device properties can be prevented from degrading.Type: ApplicationFiled: March 9, 2016Publication date: June 30, 2016Applicant: FUJI ELECTRIC CO., LTD.Inventors: Haruo NAKAZAWA, Masaaki OGINO, Tsunehiro NAKAJIMA, Kenichi IGUCHI, Masaaki TACHIOKA, Kiyokazu NAKAGAWA
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Publication number: 20160189968Abstract: A method of manufacturing a semiconductor device that reduces degradation of device properties includes forming an impurity region in a surface layer of a semiconductor substrate by ion injection; forming a transition metal layer in a surface of the impurity region; and exposing the semiconductor substrate with the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves. The transition metal layer is heated and the heat is transferred from the transition metal layer to the impurity region to form an ohmic contact at the interface of the transition metal layer and the impurity region by reaction of the transition metal layer and the impurity region, and the impurity region is activated. When the substrate is a silicon carbide substrate, the ohmic contact is composed of a transition metal silicide and the impurity region, which is an ion injection layer, is activated.Type: ApplicationFiled: March 9, 2016Publication date: June 30, 2016Applicant: FUJI ELECTRIC CO., LTD.Inventors: Haruo NAKAZAWA, Masaaki OGINO, Tsunehiro NAKAJIMA, Kenichi IGUCHI, Masaaki TACHIOKA
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Publication number: 20160189969Abstract: A method of manufacturing a semiconductor device includes forming a device structure in a surface of a semiconductor substrate, forming, in a face of the semiconductor substrate, a transition metal layer that contacts the semiconductor substrate, and exposing the semiconductor substrate having the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves to cause the transition metal layer to generate heat. During exposure of the semiconductor substrate to the hydrogen plasma atmosphere, a portion of the semiconductor substrate contacting the transition metal layer is heated by a transfer of the heat from the transition metal layer, and an ohmic contact is formed at an interface of the transition metal layer and the semiconductor substrate by reaction of the transition metal layer and the semiconductor substrate. When the semiconductor substrate is silicon carbide, the ohmic contact is composed of a silicide, such as a transition metal silicide.Type: ApplicationFiled: March 9, 2016Publication date: June 30, 2016Applicant: FUJI ELECTRIC CO., LTD.Inventors: Kenichi IGUCHI, Haruo NAKAZAWA, Tsunehiro NAKAJIMA, Masaaki OGINO, Masaaki TACHIOKA
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Publication number: 20160155640Abstract: A method of manufacturing a silicon carbide semiconductor device includes grinding a back surface of a semiconductor substrate formed of silicon carbide to reduce thickness thereof and provide an altered layer that is ground; removing by polishing or etching, the altered layer from the back surface; forming a nickel film on the back surface of the semiconductor substrate after removing the altered layer; heat treating the nickel film to forming a nickel silicide layer by silicidation; and forming a metal electrode on a surface of the nickel silicide layer.Type: ApplicationFiled: February 5, 2016Publication date: June 2, 2016Applicant: FUJI ELECTRIC CO., LTD.Inventors: Tsunehiro NAKAJIMA, Masanobu IWAYA, Fumikazu IMAI
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Patent number: 9355858Abstract: Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p+-type isolation layer for obtaining reverse blocking capability is provided at the end of an element. In addition, a concave portion is provided so as to extend from the backside surface of the n-type drift region to the p+-type isolation layer. A p-type region is provided and is electrically connected to the p+-type isolation layer. The p+-type isolation layer is provided so as to include a cleavage plane having the boundary between the bottom and the side wall of the concave portion as one side.Type: GrantFiled: December 4, 2013Date of Patent: May 31, 2016Assignee: FUJI ELECTRIC CO., LTD.Inventors: Hiroki Wakimoto, Kenichi Iguchi, Koh Yoshikawa, Tsunehiro Nakajima, Shunsuke Tanaka, Masaaki Ogino
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Publication number: 20160087061Abstract: A titanium layer and a nickel layer are sequentially formed on a back surface of a SiC wafer. Next, by high-temperature heat treatment, the SiC wafer is heated and the titanium layer and the nickel layer are sintered forming a nickel silicide layer that includes titanium carbide. By this high-temperature heat treatment, an ohmic contact of the SiC wafer and the nickel silicide layer is formed. Thereafter, on the nickel silicide layer, a back surface electrode multilayered structure is formed by sequentially stacking a titanium layer, a nickel layer, and a gold layer. Here, in forming the nickel layer that configures a back surface electrode multilayered structure, the nickel layer is formed under a condition that satisfies 0.0<y?0.0013x+2.0, where the thickness of the nickel layer is x [nm] and the deposition rate of the nickel layer is y [nm/second]. Thus, peeling of the back surface electrode can be suppressed.Type: ApplicationFiled: December 4, 2015Publication date: March 24, 2016Applicant: FUJI ELECTRIC CO., LTD.Inventors: Fumikazu IMAI, Tsunehiro NAKAJIMA
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Publication number: 20150380292Abstract: A method for manufacturing a semiconductor device includes: bonding at least a part of the rear surface of a semiconductor wafer, and a supporting substrate in use of using a silane coupling agent; forming a functional structure on a front surface of the semiconductor wafer; placing a condensation point of laser light transmitted through the semiconductor wafer on a bonding interface between the semiconductor wafer and the supporting substrate, and irradiating the bonding interface with the laser light, thereby forming a fracture layer on at least a part of an outer circumferential section of the bonding interface; separating the bonding interface; and carrying out rear surface processing on the rear surface of the semiconductor wafer.Type: ApplicationFiled: September 3, 2015Publication date: December 31, 2015Applicant: FUJI ELECTRIC CO., LTD.Inventors: Masaaki TACHIOKA, Tsunehiro NAKAJIMA
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Publication number: 20150380291Abstract: A glass substrate is bonded to a front surface of a wafer on which a front surface element structure is formed, with an adhesive layer interposed therebetween. An adhesive layer is formed on the wafer to extend from the front surface of the wafer to a chamfered portion and a side surface of the wafer. The adhesive layer is formed on a first surface of the glass substrate and is not formed on a chamfered portion and a side surface of the glass substrate. After the rear surface of the wafer is ground, a rear surface element structure is formed on the ground rear surface. A laser beam is radiated to the glass substrate and the glass substrate is peeled from the adhesive layer. The adhesive layer is removed and the wafer is cut by dicing. In this way, a chip having a thin semiconductor device formed thereon is completed.Type: ApplicationFiled: September 3, 2015Publication date: December 31, 2015Inventor: Tsunehiro NAKAJIMA
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Publication number: 20150348818Abstract: Provided is a semiconductor device manufacturing method that includes joining a support substrate to a back side of a semiconductor wafer across a ceramic adhesive layer and a mask, to form a joined body. The method further includes forming a functional structure on a front side of the semiconductor wafer. The method further includes detaching the support substrate from the semiconductor wafer by removing the ceramic adhesive layer and the mask. The method further includes a back side processing step of carrying out back side processing on the back side of the semiconductor wafer.Type: ApplicationFiled: August 7, 2015Publication date: December 3, 2015Applicant: FUJI ELECTRIC CO., LTD.Inventors: Masaaki TACHIOKA, Tsunehiro NAKAJIMA
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Patent number: 9147599Abstract: A method is disclosed for separating a support substrate from a solid-phase bonded wafer which includes a Si wafer and support substrate solid-phase bonded to back surface of the Si wafer. The method includes a step of irradiating the Si wafer with laser light with a wavelength which passes through the Si wafer and is focused on a solid-phase bonding interface between the Si wafer and support substrate to form a breaking layer in at least part of an outer circumferential portion of the solid-phase bonding interface, a step of separating the breaking layer; and a step of separating the solid-phase bonding interface. The method is capable of using a Si thin wafer without substantial wafer cracking at an initial stage where the wafer is inputted to a wafer process, capable of separating a support substrate from the Si thin wafer easily, and capable of reducing the wafer cost.Type: GrantFiled: April 10, 2014Date of Patent: September 29, 2015Assignee: FUJI ELECTRIC CO., LTD.Inventor: Tsunehiro Nakajima
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Publication number: 20150214053Abstract: A first nickel film is deposited inside a contact hole of an interlayer dielectric formed on an n+-type SiC substrate. Irradiation with a first laser is carried out, forming an Ohmic contact with a silicon carbide semiconductor. A second nickel film and a front surface electrode film are deposited on the first nickel film, forming a source electrode. The back surface of the n+-type SiC substrate is ground, and a third nickel film is formed on the ground back surface of the n+-type SiC substrate. Irradiation with a second laser is carried out, forming an Ohmic contact with the silicon carbide semiconductor. A fourth nickel film and a back surface electrode film are deposited on the third nickel film, forming a drain electrode. By so doing, it is possible to prevent electrical characteristic deterioration of a semiconductor device, and to prevent warping and cracking of a wafer.Type: ApplicationFiled: April 9, 2015Publication date: July 30, 2015Applicant: FUJI ELECTRIC CO., LTD.Inventors: Haruo NAKAZAWA, Masaaki TACHIOKA, Naoto FUJISHIMA, Masaaki OGINO, Tsunehiro NAKAJIMA, Kenichi IGUCHI
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Patent number: 9070736Abstract: A p-type thin-layer along a side wall surface of a V-shaped groove reaching the bottom portion of a p-type isolation layer from the back surface of an n? semiconductor substrate, couples a p-type collector layer with the p-type isolation layer. A collector electrode contacts the surfaces of the p-type collector layer and the p-type thin-layer. The collector electrode is formed by laminating an Al—Si film, a barrier layer, a nickel-based metal film, and a gold-based metal film in sequence from the n? semiconductor substrate side. The Al—Si film contacting the surface of the p-type collector layer is in a range of 1.1 to 3.0 ?m in thickness. The Al—Si film contacting the surface of the p-type thin-layer is in a range of 0.55 to 1.5 ?m in thickness. A rise in leak current caused by aluminum spiking is eliminated or suppressed, and solder joining including tin is made easier.Type: GrantFiled: September 3, 2014Date of Patent: June 30, 2015Assignee: FUJI ELECTRIC CO., LTD.Inventor: Tsunehiro Nakajima
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Publication number: 20150179784Abstract: A semiconductor device includes a semiconductor substrate that is made of a semiconductor material with a wider band gap than silicon, a field effect transistor, including a front surface element structure, provided on a front surface of the substrate, and a drain electrode having surface contact with the substrate so as to form a Schottky junction between the semiconductor substrate and the drain electrode.Type: ApplicationFiled: March 6, 2015Publication date: June 25, 2015Applicant: FUJI ELECTRIC CO., LTD.Inventors: Haruo NAKAZAWA, Masaaki OGINO, Tsunehiro NAKAJIMA
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Patent number: 8999768Abstract: A semiconductor device and its method of manufacture. In the method, a front surface element structure is formed on a front surface of a semiconductor wafer, for example an SiC wafer. Then, a supporting substrate is bonded to wafer's front surface through an adhesive. The wafer's rear surface is ground and polished to thin it, with the supporting substrate bonded to the wafer. Next a V groove passing through the SiC wafer and reaching the adhesive is formed in the wafer's rear surface, and the wafer is cut into individual chips. An electrode film is formed on the groove's side wall and the chip's rear surface and a Schottky junction is formed between a drift layer, which is the chip, and the film. Then, the film is annealed. A tape is attached to the wafer's rear surface which has been cut into the chips. Then, the supporting substrate peels off from the wafer.Type: GrantFiled: September 13, 2011Date of Patent: April 7, 2015Assignee: Fuji Electric Co., Ltd.Inventors: Haruo Nakazawa, Masaaki Ogino, Tsunehiro Nakajima
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Patent number: 8962405Abstract: In some aspects of the invention, a circuit pattern of a front surface structure is formed in a front surface of a semiconductor wafer and an alignment mark is formed on the front surface of a semiconductor wafer. A transparent supporting substrate is attached to the front surface of the semiconductor wafer by a transparent adhesive. Then, a resist is applied onto a rear surface of the semiconductor wafer. Then, the semiconductor wafer is mounted on a stage of an exposure apparatus, with the supporting substrate down. Then, the alignment mark formed on the front surface of the semiconductor wafer is recognized by a camera, and the positions of the semiconductor wafer and a photomask are aligned with each other. Then, the resist is patterned. Then, a circuit pattern is formed in the rear surface of the semiconductor wafer.Type: GrantFiled: March 13, 2013Date of Patent: February 24, 2015Assignee: Fuji Electric Co., Ltd.Inventors: Tsunehiro Nakajima, Haruo Nakazawa
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Publication number: 20140367738Abstract: A p-type thin-layer along a side wall surface of a V-shaped groove reaching the bottom portion of a p-type isolation layer from the back surface of an n? semiconductor substrate, couples a p-type collector layer with the p-type isolation layer. A collector electrode contacts the surfaces of the p-type collector layer and the p-type thin-layer. The collector electrode is formed by laminating an Al—Si film, a barrier layer, a nickel-based metal film, and a gold-based metal film in sequence from the n? semiconductor substrate side. The Al—Si film contacting the surface of the p-type collector layer is in a range of 1.1 to 3.0 ?m in thickness. The Al—Si film contacting the surface of the p-type thin-layer is in a range of 0.55 to 1.5 ?m in thickness. Arise in leak current caused by aluminum spiking is eliminated or suppressed, and solder joining including tin is made easier.Type: ApplicationFiled: September 3, 2014Publication date: December 18, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventor: Tsunehiro NAKAJIMA
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Publication number: 20140220765Abstract: A method is disclosed for separating a support substrate from a solid-phase bonded wafer which includes a Si wafer and support substrate solid-phase bonded to back surface of the Si wafer. The method includes a step of irradiating the Si wafer with laser light with a wavelength which passes through the Si wafer and is focused on a solid-phase bonding interface between the Si wafer and support substrate to form a breaking layer in at least part of an outer circumferential portion of the solid-phase bonding interface, a step of separating the breaking layer; and a step of separating the solid-phase bonding interface. The method is capable of using a Si thin wafer without substantial wafer cracking at an initial stage where the wafer is inputted to a wafer process, capable of separating a support substrate from the Si thin wafer easily, and capable of reducing the wafer cost.Type: ApplicationFiled: April 10, 2014Publication date: August 7, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventor: Tsunehiro NAKAJIMA
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Patent number: 8722487Abstract: A semiconductor device, including a silicon substrate having a first major surface and a second major surface, a front surface device structure formed in a region of the first major surface, and a rear electrode formed in a region of the second major surface. The rear electrode includes, as a first layer thereof, an aluminum silicon film that is formed by evaporating or sputtering aluminum-silicon onto the second major surface, the aluminum silicon film having a silicon concentration of at least 2 percent by weight and a thickness of less than 0.3 ?m.Type: GrantFiled: November 12, 2012Date of Patent: May 13, 2014Assignee: Fuji Electric Co., Ltd.Inventors: Kenichi Kazama, Tsunehiro Nakajima, Koji Sasaki, Akio Shimizu, Takashi Hayashi, Hiroki Wakimoto
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Publication number: 20140094020Abstract: Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p+-type isolation layer for obtaining reverse blocking capability is provided at the end of an element. In addition, a concave portion is provided so as to extend from the backside surface of the n-type drift region to the p+-type isolation layer. A p-type region is provided and is electrically connected to the p+-type isolation layer. The p+-type isolation layer is provided so as to include a cleavage plane having the boundary between the bottom and the side wall of the concave portion as one side.Type: ApplicationFiled: December 4, 2013Publication date: April 3, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventors: Hiroki WAKIMOTO, Kenichi Iguchi, Koh Yoshikawa, Tsunehiro Nakajima, Shunsuke Tanaka, Masaaki Ogino