Patents by Inventor Tsung-Han Yang

Tsung-Han Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240155292
    Abstract: An electronic device includes two speakers, a single functional chip, a parameter extraction circuit, an audio processing module, a gain adjusting circuit and a current detecting unit. The current detecting unit is disposed in the functional chip for detecting the driving current of the two speakers. The functional chip provides the driving voltage of the two speakers based on an output signal and converts the analogue current/voltages of the two speakers into digital current/voltages. The parameter extraction circuit acquires the parameter of each speaker based on the digital current/voltages. The audio processing module acquires the gains of various physical quantities based on the parameter of each speaker and determines the final gain of each physical quantity. The gain adjusting circuit provides the output signal by adjusting the gain of an input signal based on the final gain of each physical quantity.
    Type: Application
    Filed: December 12, 2022
    Publication date: May 9, 2024
    Applicant: RICHTEK TECHNOLOGY CORP.
    Inventors: Tsung-Han Yang, Yen-Chih Wang, Ming-Jun Hsiao, Tsung-Nan Wu
  • Patent number: 11978666
    Abstract: Provided herein are methods of depositing low stress and void free metal films in deep features and related apparatus. Embodiments of the methods include treating the sidewalls of the holes to inhibit metal deposition while leaving the feature bottom untreated. In subsequent deposition operations, metal precursor molecules diffuse to the feature bottom for deposition. The process is repeated with subsequent inhibition operations treating the remaining exposed sidewalls. By repeating inhibition and deposition operations, high quality void free fill can be achieved. This allows high temperature, low stress deposition to be performed.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: May 7, 2024
    Assignee: Lam Research Corporation
    Inventors: Anand Chandrashekar, Tsung-Han Yang
  • Publication number: 20240129496
    Abstract: Methods, systems, and articles are described herein related to video coding. The method comprises receiving compressed image data of video frames including a block of image data of at least one of the frames. The method also comprises receiving first partition data to be used to decode the compressed image data and indicating a partition in the block. This method comprises detecting whether or not the block has an illegal block partition. Also, the method comprises generating second partition data to indicate the illegal block partition of the block is to be ignored. Further, the method includes decoding the block at least according to the second partition data.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Intel Corporation
    Inventor: Tsung-Han Yang
  • Patent number: 11955245
    Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: April 9, 2024
    Assignees: Acer Incorporated, National Yang Ming Chiao Tung University
    Inventors: Chun-Hsien Li, Szu-Chieh Wang, Andy Ho, Liang-Kung Chen, Jun-Hong Chen, Li-Ning Peng, Tsung-Han Yang, Yun-Hsuan Chan, Tsung-Hsien Tsai
  • Patent number: 11955444
    Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first conductive structure disposed within a first layer of the semiconductor structure. The semiconductor structure includes a dielectric structure disposed within a second layer of the semiconductor structure, with the second layer being disposed on the first layer. The semiconductor structure includes a second conductive structure disposed within a recessed portion of the dielectric structure that extends to the first conductive structure, with the second conductive structure having a concave recessed portion on a top surface of the second conductive structure. The semiconductor structure includes multiple layers of conductive material disposed within the concave recessed portion of the second conductive structure.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Manikandan Arumugam, Tsung-Yi Yang, Chien-Chih Chen, Mu-Han Cheng, Kuo-Hsien Cheng
  • Publication number: 20240103319
    Abstract: The invention refers to a diffusion plate and a backlight module having the diffusion plate. The diffusion plate comprises a plate-body and a plurality of pyramid-like structures arranged on a surface of the plate-body. Each pyramid-like structure has a bottom surface, a first convex portion and a second convex portion. The first convex portion and the second convex portion have different vertex angles, and therefore the pyramid-like structure can also be called as “pyramid-like structure with multiple vertex angles”. The pyramid-like structures with multiple vertex angles can increase the light splitting points, which can improve the light splitting effect of the diffusion plate. The light source of a single light-emitting diode can be divided into eight point-light sources (light splitting points) or more, which is double the number of light splitting points compared with the traditional pyramid structure with single vertex, and thus can greatly improve the light diffusion effect.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Applicant: Entire Technology Co., Ltd.
    Inventors: Yan-Zuo Chen, Hung Han Kao, Tsung-Chang Yang
  • Publication number: 20240087955
    Abstract: A method and apparatus for forming tungsten features in semiconductor devices is provided. The method includes exposing a top opening of a feature formed in a substrate to a physical vapor deposition (PVD) process to deposit a tungsten liner layer within the feature. The PVD process is performed in a first processing region of a first processing chamber and the tungsten liner layer forms an overhang portion, which partially obstructs the top opening of the feature. The substrate is transferred from the first processing region of the first processing chamber to a second processing region of a second processing chamber without breaking vacuum. The overhang portion is exposed to nitrogen-containing radicals in the second processing region to inhibit subsequent growth of tungsten along the overhang portion. The feature is exposed to a tungsten-containing precursor gas to form a tungsten fill layer over the tungsten liner layer within the feature.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 14, 2024
    Inventors: Yi XU, Xianyuan ZHAO, Zhimin QI, Aixi ZHANG, Geraldine VASQUEZ, Dien-Yeh WU, Wei LEI, Xingyao GAO, Shirish PETHE, Wenting HOU, Chao DU, Tsung-Han YANG, Kyoung-Ho BU, Chen-Han LIN, Jallepally RAVI, Yu LEI, Rongjun WANG, Xianmin TANG
  • Publication number: 20240088072
    Abstract: Methods, apparatuses, and systems related to embedded metal pads are described. An example semiconductor device includes a dielectric material, a metal pad having side surface, where a lower portion of the side surface is embedded in the dielectric material, a mask material on a portion of a surface of the dielectric material, an upper portion of the side surface of the metal pad, and a portion of a top surface of the metal pad and a contact pillar on a second portion of the top surface of metal pad, the contact pillar comprising a metal pillar and a pillar bump.
    Type: Application
    Filed: September 13, 2022
    Publication date: March 14, 2024
    Inventors: Tsung Han Chiang, Shin Yueh Yang
  • Publication number: 20240047267
    Abstract: Embodiments of methods and associated apparatus for filling features in a silicon-containing dielectric layer of a substrate are provided herein. In some embodiments, a method of filling features in a silicon-containing dielectric layer of a substrate includes: depositing a discontinuous liner layer in the feature via a physical vapor deposition (PVD) process in a first process chamber; performing a hydrogen plasma process in a second process chamber to form silicon-hydrogen bonds on surfaces of the feature not covered by the discontinuous liner layer; and depositing a bulk tungsten layer on the discontinuous liner layer and over the silicon-hydrogen bonds to fill the feature with tungsten in a third process chamber.
    Type: Application
    Filed: July 31, 2023
    Publication date: February 8, 2024
    Inventors: Tsung-Han YANG, Shiyu YUE, Rongjun WANG
  • Publication number: 20240014072
    Abstract: A method of forming a semiconductor device structure includes forming a nucleation layer within at least one feature. The method includes exposing the nucleation layer to a nitrogen plasma treatment. The nitrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal growth.
    Type: Application
    Filed: June 21, 2023
    Publication date: January 11, 2024
    Inventors: Tsung-Han YANG, Zhimin QI, Yongqian GAO, Rongjun WANG, Yi XU, Yu LEI, Xingyao GAO, Chih-Hsun HSU, Xi CEN, Wei LEI, Shiyu YUE, Aixi ZHANG, Kai WU, Xianmin TANG
  • Publication number: 20240006236
    Abstract: A method of forming a structure on a substrate includes forming a tungsten nucleation layer within at least one feature. The method includes forming the nucleation layer via a cyclic vapor deposition process. The cyclic vapor deposition process includes forming a portion of the nucleation layer and then exposing the exposing the nucleation layer a chemical vapor transport (CVT) process to remove impurities from the portion of the nucleation layer. The CVT process may be performed at a temperature of 400 degrees Celsius or less and comprises forming a plasma from a processing gas comprising greater than or equal to 90% of hydrogen gas of a total flow of hydrogen gas and oxygen.
    Type: Application
    Filed: April 11, 2023
    Publication date: January 4, 2024
    Inventors: Tsung-Han YANG, Junyeong YUN, Rongjun WANG, Yi XU, Yu LEI, Wenting HOU, Xianmin TANG
  • Publication number: 20230420295
    Abstract: A method and apparatus for tungsten gap-fill in semiconductor devices are provided. The method includes performing a gradient oxidation process to oxidize exposed portions of a liner layer, wherein the gradient oxidation process preferentially oxidizes an overhang portion of the liner layer, which obstructs or blocks top openings of one or more features formed within a field region of a substrate. The method further includes performing an etchback process to remove or reduce the oxidized overhang portion of the liner layer, exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxide remaining from the gradient oxidation process and the etchback process, and performing a tungsten gap-fill process to fill or partially fill the one or more features.
    Type: Application
    Filed: April 11, 2023
    Publication date: December 28, 2023
    Inventors: Tsung-Han YANG, Xingyao GAO, Shiyu YUE, Chih-Hsun HSU, Shirish PETHE, Rongjun WANG, Yi XU, Wei LEI, Yu LEI, Aixi ZHANG, Xianyuan ZHAO, Zhimin QI, Jiang LU, Xianmin TANG
  • Publication number: 20230343643
    Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
    Type: Application
    Filed: July 19, 2022
    Publication date: October 26, 2023
    Inventors: Chih-Hsun HSU, Shiyu YUE, Wei LEI, Yi XU, Jiang LU, Yu LEI, Ziye XIONG, Tsung-Han YANG, Zhimin QI, Aixi ZHANG, Jie ZHANG, Liqi WU, Rongjun WANG, Shihchung CHEN, Meng-Shan WU, Chun-Chieh WANG, Annamalai LAKSHMANAN, Yixiong YANG, Xianmin TANG
  • Patent number: 11761080
    Abstract: Aspects of the present disclosure generally relate to oscillating a boundary layer of a flow of process gas in methods and systems for processing substrates. In one aspect, one or more of a pressure, a gas flow rate, and/or a height of a substrate are oscillated during processing. In one implementation, a method of processing a substrate includes conducting a processing operation on the substrate in an interior volume of a processing chamber. The conducting the processing operation on the substrate includes moving a flow of one or more process gases over a surface of the substrate. The method also includes oscillating a boundary layer of the flow of one or more process gases while the flow of one or more process gases moves over the surface of the substrate.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: September 19, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Tsung-Han Yang, Christopher S. Olsen
  • Patent number: 11727865
    Abstract: A light-emitting diode driver and a display apparatus using the same are provided. The light-emitting diode driver includes a driving module and a plurality of current control modules. The driving module includes a plurality of bias circuits and a plurality of resistive devices, in which any two of the bias circuits are electrically coupled to each other through at least one of the resistive devices. The current control modules are respectively coupled to the bias circuits, and each of the current control modules includes a current control circuit and a slew-rate enhancement circuit. The current control circuit is configured to output a driving current. The slew-rate enhancement circuit is electrically coupled to the current control circuit, so as to output a complementary current.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: August 15, 2023
    Assignee: AIROHA TECHNOLOGY CORP.
    Inventors: Tsung-Han Yang, Chia-So Chuang, Pin-Hsuan Huang
  • Publication number: 20230245735
    Abstract: An electronic medical record data analysis system and an electronic medical record data analysis method are provided. The electronic medical record data analysis system includes a storage device and a processor. The storage device is configured to store an electronic medical record data analysis module and a post-processing module. The processor obtains electronic medical record data. The processor executes the electronic medical record data analysis module to analyze the electronic medical record data and generate a plurality of disease diagnosis codes and a plurality of correlation degree scores corresponding to the electronic medical record data. The processor sorts the plurality of disease diagnosis codes according to the plurality of correlation degree scores, to generate an initial list, and executes the post-processing module to post-process the initial list according to a preset coding rule. The processor generates a recommendation list according to the post-processed initial list.
    Type: Application
    Filed: June 28, 2022
    Publication date: August 3, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Tsung-Han Yang, Chia-Wen Tsai, Jie-Jyun Liu, Ting-Hsuan Wang, Cheng Jeng, Wen-Han Wu
  • Publication number: 20230207291
    Abstract: A method and apparatus for growing an oxide layer within a feature of a substrate is described herein. The method is suitable for use in semiconductor manufacturing. The oxide layer is formed by exposing a substrate to both a high pressure oxidant exposure and a lower pressure oxygen containing plasma exposure. The high pressure oxidant exposure is performed at a pressure of greater than 10 Torr, while the lower pressure oxygen containing plasma exposure is performed at a pressure of less than about 10 Torr. The features are high-aspect ratio trenches or holes within a stack of silicon oxide and silicon nitride layers.
    Type: Application
    Filed: April 8, 2022
    Publication date: June 29, 2023
    Inventors: Christopher S. OLSEN, Rene GEORGE, Tsung-Han YANG, David KNAPP, Lara HAWRYLCHAK
  • Publication number: 20230090794
    Abstract: An electronic device for controlling an LRA (Linear Resonant Actuator) includes a signal generator, a driver, a delay unit, a sensor, and a DSP (Digital Signal Processor). The signal generator generates a digital signal. The driver drives the LRA according to the digital signal. The delay unit delays the digital signal for a predetermined time, so as to generate an estimated voltage signal. The sensor detects the current flowing through the LRA, so as to generate a sensing current signal. The DSP controls the resonant frequency or the gain value of the signal generator according to the estimated voltage signal and the sensing current signal.
    Type: Application
    Filed: October 28, 2021
    Publication date: March 23, 2023
    Inventors: Tsung-Han YANG, Yen-Chih WANG, Ming-Jun HSIAO, Tsung-Nan WU
  • Publication number: 20220415711
    Abstract: Provided herein are methods and apparatuses for controlling uniformity of processing at an edge region of a semiconductor wafer. In some embodiments, the methods include providing a backside inhibition gas as part of a deposition-inhibition-deposition (DID) sequence.
    Type: Application
    Filed: February 17, 2021
    Publication date: December 29, 2022
    Inventors: Gang LIU, Anand CHANDRASHEKAR, Tsung-Han YANG, Michael BOWES, Leonard Wai Fung KHO, Eric H. LENZ
  • Publication number: 20220415676
    Abstract: Embodiments of gas distribution modules for use with rapid thermal processing (RTP) systems and methods of use thereof are provided herein. In some embodiments, a gas distribution module for use with a RTP chamber includes: a first carrier gas line and a first liquid line fluidly coupled to a mixer, the mixer having one or more control valves configured to mix a carrier gas from the first carrier gas line and a liquid from the first liquid line in a desired ratio to form a first mixture; a vaporizer coupled to the mixer and configured to receive the first mixture in a hollow internal volume, the vaporizer having a heater configured to vaporize the first mixture; and a first gas delivery line disposed between the vaporizer and the RTP chamber to deliver the vaporized first mixture to the RTP chamber.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 29, 2022
    Inventors: Chaitanya Anjaneyalu PRASAD, Christopher Sean OLSEN, Lara HAWRYLCHAK, Erika Gabrielle HANSEN, Daniel C. GLOVER, Naman APURVA, Tsung-Han YANG