Patents by Inventor Tsung-Han Yang

Tsung-Han Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12341032
    Abstract: Embodiments of methods of performing a selective oxidation process on non-metal surfaces are provided herein. In some embodiments, a method of performing a selective oxidation process on non-metal surfaces includes: forming a first mixture of a carrier gas and a liquid in a mixer having a mixing block coupled to one or more control valves with a mixing line disposed therebetween; flowing the first mixture from the mixer to a vaporizer to vaporize the first mixture outside of an RTP chamber; and delivering the vaporized first mixture to the RTP chamber via a gas delivery line to expose a substrate disposed in the RTP chamber with the vaporized first mixture to perform a selective oxidation process on the substrate at a temperature of about 500 to about 1100 degrees Celsius.
    Type: Grant
    Filed: May 2, 2024
    Date of Patent: June 24, 2025
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chaitanya Anjaneyalu Prasad, Christopher Sean Olsen, Lara Hawrylchak, Erika Gabrielle Hansen, Daniel C. Glover, Naman Apurva, Tsung-Han Yang
  • Patent number: 12272531
    Abstract: A method and apparatus for growing an oxide layer within a feature of a substrate is described herein. The method is suitable for use in semiconductor manufacturing. The oxide layer is formed by exposing a substrate to both a high pressure oxidant exposure and a lower pressure oxygen containing plasma exposure. The high pressure oxidant exposure is performed at a pressure of greater than 10 Torr, while the lower pressure oxygen containing plasma exposure is performed at a pressure of less than about 10 Torr. The features are high-aspect ratio trenches or holes within a stack of silicon oxide and silicon nitride layers.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: April 8, 2025
    Assignee: Applied Materials, Inc.
    Inventors: Christopher S. Olsen, Rene George, Tsung-Han Yang, David Knapp, Lara Hawrylchak
  • Patent number: 12261081
    Abstract: Methods for selective inhibition control in semiconductor manufacturing are provided. An example method includes providing a substrate including a feature having one or more feature openings and a feature interior. A nucleation layer is formed on a surface of the feature interior. Based on a differential inhibition profile, a nonconformal bulk layer is selectively formed on a surface of the nucleation layer to leave a region of the nucleation layer covered, and a region of the nucleation layer uncovered by the nonconformal bulk layer. An inhibition layer is selectively formed on the covered and uncovered regions of the nucleation layer. Tungsten is deposited in the feature in accordance with the differential inhibition profile.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: March 25, 2025
    Assignee: Lam Research Corporation
    Inventors: Tsung-Han Yang, Michael Bowes, Gang Liu, Anand Chandrashekar
  • Publication number: 20250066907
    Abstract: Methods of mitigating line bending during feature fill include deposition of an amorphous layer and/or an inhibition treatment during fill.
    Type: Application
    Filed: November 7, 2024
    Publication date: February 27, 2025
    Inventors: Anand CHANDRASHEKAR, Lei GUO, Tsung-Han YANG
  • Publication number: 20240430618
    Abstract: An electronic device includes two speakers, a single functional chip, a parameter extraction circuit, an audio processing module, a gain adjusting circuit and a current detecting unit. The current detecting unit is disposed in the functional chip for detecting the driving current of the two speakers. The functional chip provides the driving voltage of the two speakers based on an output signal and converts the analogue current/voltages of the two speakers into digital current/voltages. The parameter extraction circuit acquires the parameter of each speaker based on the digital current/voltages. The audio processing module acquires the gains of various physical quantities based on the parameter of each speaker and determines the final gain of each physical quantity. The gain adjusting circuit provides the output signal by adjusting the gain of an input signal based on the final gain of each physical quantity.
    Type: Application
    Filed: September 8, 2024
    Publication date: December 26, 2024
    Inventors: Tsung-Han Yang, Yen-Chih Wang, Ming-Jun Hsiao, Tsung-Nan Wu
  • Patent number: 12173399
    Abstract: Methods of mitigating line bending during feature fill include deposition of an amorphous layer and/or an inhibition treatment during fill.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: December 24, 2024
    Assignee: Lam Research Corporation
    Inventors: Anand Chandrashekar, Lei Guo, Tsung-Han Yang
  • Publication number: 20240420947
    Abstract: A method of pre-cleaning in a semiconductor structure includes performing a plasma pre-treatment process to remove impurities from a surface of a semiconductor structure comprising a metal layer and a dielectric layer, performing a selective etch process to remove molybdenum oxide from a surface of the metal layer, the selective etch process comprising soaking the semiconductor structure in a precursor including molybdenum chloride (MoCl5, MoCl6) at a temperature of between 250° C. and 350° C., and performing a post-treatment process to remove chlorine residues and by-products of the selective etch process on the surface of the semiconductor structure.
    Type: Application
    Filed: June 16, 2023
    Publication date: December 19, 2024
    Inventors: Shiyu YUE, Jiajie CEN, Sahil Jaykumar PATEL, Zhimin QI, Ju Hyun OH, Aixi ZHANG, Xingyao GAO, Wei LEI, Yi XU, Yu LEI, Tsung-Han YANG, Xiaodong WANG, Xiangjin XIE, Yixiong YANG, Kevin KASHEFI, Rongjun WANG
  • Patent number: 12160151
    Abstract: An electronic device for controlling an LRA (Linear Resonant Actuator) includes a signal generator, a driver, a delay unit, a sensor, and a DSP (Digital Signal Processor). The signal generator generates a digital signal. The driver drives the LRA according to the digital signal. The delay unit delays the digital signal for a predetermined time, so as to generate an estimated voltage signal. The sensor detects the current flowing through the LRA, so as to generate a sensing current signal. The DSP controls the resonant frequency or the gain value of the signal generator according to the estimated voltage signal and the sensing current signal.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: December 3, 2024
    Assignee: Richtek Technology Corporation
    Inventors: Tsung-Han Yang, Yen-Chih Wang, Ming-Jun Hsiao, Tsung-Nan Wu
  • Patent number: 12143786
    Abstract: An electronic device includes two speakers, a single functional chip, a parameter extraction circuit, an audio processing module, a gain adjusting circuit and a current detecting unit. The current detecting unit is disposed in the functional chip for detecting the driving current of the two speakers. The functional chip provides the driving voltage of the two speakers based on an output signal and converts the analogue current/voltages of the two speakers into digital current/voltages. The parameter extraction circuit acquires the parameter of each speaker based on the digital current/voltages. The audio processing module acquires the gains of various physical quantities based on the parameter of each speaker and determines the final gain of each physical quantity. The gain adjusting circuit provides the output signal by adjusting the gain of an input signal based on the final gain of each physical quantity.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: November 12, 2024
    Assignee: RICHTEK TECHNOLOGY CORP.
    Inventors: Tsung-Han Yang, Yen-Chih Wang, Ming-Jun Hsiao, Tsung-Nan Wu
  • Publication number: 20240363407
    Abstract: Embodiments of the present disclosure generally relate to a method for forming an electrically conductive feature on a substrate. In one embodiment, the method includes forming a first conductive layer via physical vapor deposition (PVD) in an opening of a substrate. The first conductive layer has a thickness of less than 20 angstroms. The method further includes forming a second conductive layer via PVD on the first conductive layer. The first conductive layer and the second conductive layer are formed at a temperature of less than 50° C. The method further includes annealing at least a portion of the first conductive layer and the second conductive layer.
    Type: Application
    Filed: April 28, 2023
    Publication date: October 31, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Jie ZHANG, Liqi WU, Cory LAFOLLETT, Tsung-Han YANG, Wei WENG, Qihao ZHU, Jiang LU, Rongjun WANG, Xianmin TANG
  • Publication number: 20240304495
    Abstract: A method of forming a semiconductor device structure by utilizing a hydrogen plasma treatment to promote selective deposition is disclosed. In some embodiments, the method includes forming a metal layer within at least one feature on the semiconductor device structure. The method includes exposing the metal layer to a hydrogen plasma treatment. The hydrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal film growth. In some embodiments, the hydrogen plasma treatment comprises substantially only hydrogen ions.
    Type: Application
    Filed: March 6, 2023
    Publication date: September 12, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Tsung-Han Yang, Zhen Liu, Yongqian Gao, Michael S. Jackson, Rongjun Wang
  • Publication number: 20240282601
    Abstract: Embodiments of methods of performing a selective oxidation process on non-metal surfaces are provided herein. In some embodiments, a method of performing a selective oxidation process on non-metal surfaces includes: forming a first mixture of a carrier gas and a liquid in a mixer having a mixing block coupled to one or more control valves with a mixing line disposed therebetween; flowing the first mixture from the mixer to a vaporizer to vaporize the first mixture outside of an RTP chamber; and delivering the vaporized first mixture to the RTP chamber via a gas delivery line to expose a substrate disposed in the RTP chamber with the vaporized first mixture to perform a selective oxidation process on the substrate at a temperature of about 500 to about 1100 degrees Celsius.
    Type: Application
    Filed: May 2, 2024
    Publication date: August 22, 2024
    Inventors: Chaitanya Anjaneyalu Prasad, Christopher Sean Olsen, Lara Hawrylchak, Erika Gabrielle Hansen, Daniel C. Glover, Naman Apurva, Tsung-Han Yang
  • Publication number: 20240240314
    Abstract: Embodiments of the disclosure relate to methods for metal gapfill of a logic device with lower resistivity. Specific embodiments provide integrated separate tungsten PVD processes with plasma-etch to solve the overhang issue caused by tungsten PVD and the high resistivity caused by nucleation.
    Type: Application
    Filed: January 2, 2024
    Publication date: July 18, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Zhen Liu, Min-Han Lee, Jie Zhang, Yongqian Gao, Tsung-Han Yang, Rongjun Wang
  • Publication number: 20240234208
    Abstract: Provided herein are methods of depositing low stress and void free metal films in deep features and related apparatus. Embodiments of the methods include treating the sidewalls of the holes to inhibit metal deposition while leaving the feature bottom untreated. In subsequent deposition operations, metal precursor molecules diffuse to the feature bottom for deposition. The process is repeated with subsequent inhibition operations treating the remaining exposed sidewalls. By repeating inhibition and deposition operations, high quality void free fill can be achieved. This allows high temperature, low stress deposition to be performed.
    Type: Application
    Filed: March 26, 2024
    Publication date: July 11, 2024
    Inventors: Anand CHANDRASHEKAR, Tsung-Han YANG
  • Patent number: 12002679
    Abstract: Methods of depositing a tungsten nucleation layers that achieve very good step coverage are provided. The methods involve a sequence of alternating pulses of a tungsten-containing precursor and a boron-containing reducing agent, while co-flowing hydrogen (H2) with the boron-containing reducing agent. The H2 flow is stopped prior to the tungsten-containing precursor flow. By co-flowing H2 with the boron-containing reducing agent but not with the tungsten-containing precursor flow, a parasitic CVD component is reduced, resulting in a more self-limiting process. This in turn improves step coverage and conformality of the nucleation layer. Related apparatuses are also provided.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: June 4, 2024
    Assignee: Lam Research Corporation
    Inventors: Michael Bowes, Tsung-Han Yang, Anand Chandrashekar, Xing Zhang
  • Publication number: 20240175120
    Abstract: Embodiments of the disclosure relate to methods for metal gapfill with lower resistivity. Specific embodiments provide methods of forming a tungsten gapfill without a high resistance nucleation layer. Some embodiments of the disclosure utilize a nucleation underlayer to promote growth of the metal gapfill.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 30, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Tsung-Han Yang, Zhen Liu, Yongqian Gao, Wenting Hou, Rongjun Wang
  • Patent number: 11996305
    Abstract: Embodiments of gas distribution modules for use with rapid thermal processing (RTP) systems and methods of use thereof are provided herein. In some embodiments, a gas distribution module for use with a RTP chamber includes: a first carrier gas line and a first liquid line fluidly coupled to a mixer, the mixer having one or more control valves configured to mix a carrier gas from the first carrier gas line and a liquid from the first liquid line in a desired ratio to form a first mixture; a vaporizer coupled to the mixer and configured to receive the first mixture in a hollow internal volume, the vaporizer having a heater configured to vaporize the first mixture; and a first gas delivery line disposed between the vaporizer and the RTP chamber to deliver the vaporized first mixture to the RTP chamber.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: May 28, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chaitanya Anjaneyalu Prasad, Christopher Sean Olsen, Lara Hawrylchak, Erika Gabrielle Hansen, Daniel C. Glover, Naman Apurva, Tsung-Han Yang
  • Publication number: 20240167148
    Abstract: Embodiments of the disclosure are directed to methods of removing metal oxide from a substrate surface by exposing the substrate surface to an un-biased cleaning plasma comprising a mixture of hydrogen (H2) and oxygen (O2). In some embodiments, the substrate surface has at least one feature thereon, the at least one feature defining a trench having a top surface, a bottom surface, and two opposed sidewalls. The un-biased cleaning plasma comprises in a range of from 1% to 20% oxygen (O2) on a molecular basis and greater than or equal to 80% hydrogen (H2). The un-biased cleaning plasma removes substantially all of the metal oxide—such as molybdenum oxide (MoOx), ruthenium oxide (RuOx), or tungsten oxide (WOx)—from the substrate surface, and the top surface, the bottom surface, and the two opposed sidewalls of the trench without damaging the dielectric and/or critical dimension (CD)/profile of the structure.
    Type: Application
    Filed: November 18, 2022
    Publication date: May 23, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Tsung-Han Yang, Shiyu Yue, Rongjun Wang
  • Publication number: 20240155292
    Abstract: An electronic device includes two speakers, a single functional chip, a parameter extraction circuit, an audio processing module, a gain adjusting circuit and a current detecting unit. The current detecting unit is disposed in the functional chip for detecting the driving current of the two speakers. The functional chip provides the driving voltage of the two speakers based on an output signal and converts the analogue current/voltages of the two speakers into digital current/voltages. The parameter extraction circuit acquires the parameter of each speaker based on the digital current/voltages. The audio processing module acquires the gains of various physical quantities based on the parameter of each speaker and determines the final gain of each physical quantity. The gain adjusting circuit provides the output signal by adjusting the gain of an input signal based on the final gain of each physical quantity.
    Type: Application
    Filed: December 12, 2022
    Publication date: May 9, 2024
    Applicant: RICHTEK TECHNOLOGY CORP.
    Inventors: Tsung-Han Yang, Yen-Chih Wang, Ming-Jun Hsiao, Tsung-Nan Wu
  • Patent number: 11978666
    Abstract: Provided herein are methods of depositing low stress and void free metal films in deep features and related apparatus. Embodiments of the methods include treating the sidewalls of the holes to inhibit metal deposition while leaving the feature bottom untreated. In subsequent deposition operations, metal precursor molecules diffuse to the feature bottom for deposition. The process is repeated with subsequent inhibition operations treating the remaining exposed sidewalls. By repeating inhibition and deposition operations, high quality void free fill can be achieved. This allows high temperature, low stress deposition to be performed.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: May 7, 2024
    Assignee: Lam Research Corporation
    Inventors: Anand Chandrashekar, Tsung-Han Yang