Patents by Inventor Tsung-Hsin Yu

Tsung-Hsin Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7173472
    Abstract: An input buffer for interfacing a high voltage signal received at an input node to a low voltage circuit comprising low voltage devices is provided. The buffer includes a threshold adjustment circuit including an inverter coupled to a threshold adjusted output node. The inverter includes low voltage devices and is coupled between a high supply voltage node and a ground node. The inverter includes a first and second transistors having biasing nodes coupled to a low voltage supply node of the low voltage circuit and coupled to the threshold adjusted output node. The adjustment circuit provides at the threshold adjusted output node an inverted signal corresponding to the high voltage input signal. The buffer also includes a level shifting circuit including low voltage devices and provides a low voltage signal corresponding to the high voltage input signal in response to said inverted signal.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: February 6, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Ji Chen, Tsung-Hsin Yu, Ker-Min Chen
  • Publication number: 20050073342
    Abstract: A power-on bias circuit including a first inverter having an input terminal and an output terminal, the input terminal functions as an input terminal of the power-up bias circuit; a second inverter having an input terminal and an output terminal, the output terminal of the second inverter functions as the output terminal for the power-on bias circuit; and a Schmitt Trigger circuit having an input terminal and an output terminal, wherein the input terminal of the Schmitt Trigger circuit is connected to the output terminal of the first inverter, the output terminal of the Schmitt Trigger circuit is connected to the input terminal of the second inverter, the first inverter, the second inverter and the Schmitt Trigger circuit are each in electrical communication with a voltage input terminal and ground.
    Type: Application
    Filed: October 1, 2003
    Publication date: April 7, 2005
    Inventor: Tsung-Hsin Yu
  • Patent number: 6864718
    Abstract: Recent efforts are underway to develop LSI circuits that operate at power supply voltages of 1-V or lower. It is a desire that this low core voltage circuits interface to 3.3-V I/O supply. A charge pump level converter for dual power supply application is proposed using low power and high speed interface to higher I/O supply. This circuit does not consume DC power it is suitable for low power and high speed interface and can be implemented using complementary metal-oxide-semiconductor (CMOS) fabrication processes.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: March 8, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Tsung-Hsin Yu
  • Publication number: 20040232448
    Abstract: A layout design for I/O cell area/bond pad area interfaces, and a method of form the same, comprising: a substrate having an I/O cell area and a bond pad area separated by a trench area; and multiple metal lines over the substrate. The multiple metal lines including a lowermost metal line, lower intermediate metal lines, upper intermediate metal lines and an uppermost metal line, wherein at least one of the upper intermediate metal lines includes a respective extension portion, that is contiguous with, or separate therefrom, extending into at least through the trench area.
    Type: Application
    Filed: May 23, 2003
    Publication date: November 25, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co.
    Inventors: Tsung-Hsin Yu, Hsien-Chin Chen
  • Publication number: 20040164766
    Abstract: Recent efforts are underway to develop LSI circuits that operate at power supply voltages of 1-V or lower. It is a desire that this low core voltage circuits interface to 3.3-V I/O supply. A charge pump level converter for dual power supply application is proposed using low power and high speed interface to higher I/O supply. This circuit does not consume DC power it is suitable for low power and high speed interface and can be implemented using complementary metal-oxide-semiconductor (CMOS) fabrication processes.
    Type: Application
    Filed: February 20, 2003
    Publication date: August 26, 2004
    Applicant: Taiwan Semiconductor Manufacturing Company
    Inventor: Tsung-Hsin Yu