Patents by Inventor Tsung Wang

Tsung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050178180
    Abstract: A feeding mechanism of a pipe bending machine is equipped with several auxiliary hydraulic cylinders in addition to an original power source for providing power to feed a pipe; the auxiliary hydraulic cylinders are joined to an auxiliary fixing member at output rods thereof, which fixing member is displaceable along a toothed locating rod secured on the bending machine, and is equipped with an engaging device capable of releaseably engaging the toothed locating rod to fix the fixing member in position; thus, the feeding mechanism can feed a pipe with increased force output when the fixing member is made unmovable along the locating rod by the engaging device, and when the auxiliary hydraulic cylinders operate.
    Type: Application
    Filed: February 18, 2004
    Publication date: August 18, 2005
    Inventor: Sheng-Tsung Wang
  • Publication number: 20050160207
    Abstract: A computing apparatus includes a mainboard, a small outline dual in-line memory module (SO-DIMM) compliant slot, and a hardware management add-on card. The mainboard has electronic components mounted thereon. The SO-DIMM compliant slot is mounted on the mainboard and has a set of first electrical contacts coupled to the electronic components. The hardware management add-on card is mounted removably on the SO-DIMM compliant slot, has a set of second electrical contacts for connecting electrically with the first electrical contacts, and is operable so as to enable monitoring of the electronic components.
    Type: Application
    Filed: January 16, 2004
    Publication date: July 21, 2005
    Inventors: Chong-Kuang Chen, Wei-Tsung Wang, Tseng-Wen Chen
  • Publication number: 20050072201
    Abstract: An actuating mechanism of a pipe bender includes a power source for delivering torque for displacing a movable arm with, and a transmission for passing on movement of the power source to the movable arm; the transmission includes a planetary gear set, a crown gear, and an actuating pinion; the movable arm is connected with an actuating shaft of the gear set so that it can be displaced when the gear set is actuated; the crown gear is securely connected with a central shaft of the gear set; the actuating pinion is securely connected with an output shaft of the power source, and directly engaged with the crown gear so that movement of the power source can be passed on to the gear set; the power source is hidden in a holding portion of the pipe bender to not stick out to occupy extra space.
    Type: Application
    Filed: October 7, 2003
    Publication date: April 7, 2005
    Inventor: Sheng-Tsung Wang
  • Patent number: 6835636
    Abstract: A method for fabricating source/drain devices. A semiconductor substrate is provided with a gate formed on the semiconductor substrate, and a hard mask layer formed on the gate. A first doped area is formed on a first side of the gate on the semiconductor substrate, and a second doped area is formed on a second side of the gate on the semiconductor substrate in a manner such that the second doped area is separated from the gate by a predetermined distance. A patterned photo resist layer is formed on the semiconductor substrate having an opening on the second side, the exposed gate equal to half the width of the gate. The semiconductor substrate is implanted and annealed to form a dual diffusion area on the second side of the gate using the patterned photo resist layer and the hard mask layer as masks.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: December 28, 2004
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yi-Tsung Jan, Wen-Tsung Wang, Sung-Min Wei, Chih-Cherng Liao, Zhe-Xiong Wu, Mao-Tsang Chen, Yuan-Heng Li
  • Publication number: 20040176730
    Abstract: A disposable, safe needle sheath assembly comprises a barrel unit including a hollow barrel, a forward extension adapted to insert through a wing unit into a cap, and a T-shaped slot longitudinally formed thereon, a transverse bar of the slot including a locking device in a right side, and a needle unit including a hollow plunger, a needle, two opposite latched members raised above an edge of a rear end, and a circumferential protrusion, the protrusion being projected from the slot after inserting the needle unit in the barrel unit. Removing the cap and sliding the protrusion from the transverse bar to a distal end of the slot will project the needle from the extension for dispensing medicine. To the contrary sliding the protrusion from the distal end of the slot to the locking device will lock the protrusion therein.
    Type: Application
    Filed: March 11, 2004
    Publication date: September 9, 2004
    Inventor: Hsien Tsung Wang
  • Publication number: 20040153039
    Abstract: A needle sheath assembly comprises a butterfly needle coupled to an IV tubing, and a plastic sheath comprising two rear side slits, two pairs of upper and lower snapping members, a latched member in front of the slits, a slot extended forward from the latched member. The needle is concealed in the sheath. The upper and lower snapping members secured together. In use push the wings forward along the slot until the needle projects from the aperture. After use pull the wings rearward until the needle has concealed in the sheath and a joint of the wings has moved in the slits prior to pushing the wings forward again until being stopped by the latched member. This can eliminate a possibility of accidentally pricking a medical worker after use. Also, criminals are prevented from selling needle sheath assemblies to hospitals again by simply cleaning or even disinfecting the used needles.
    Type: Application
    Filed: December 15, 2003
    Publication date: August 5, 2004
    Inventor: Hsien Tsung Wang
  • Publication number: 20040147238
    Abstract: An analog demodulator used in a low IF receiver to down-convert a pair of quadratureIF signals and to perform image-rejection operations. The analog demodulator includes at least one first calibration apparatus and/or at least one second calibration apparatus so that the analog demodulator can reduce DC offset that would cause LO leakage in the low IF receiver by using the first calibration apparatus and/or the second calibration apparatus. The analog demodulator further includes a filtering device connected to a LO generator for removing the 3rd and 5th order harmonic components.
    Type: Application
    Filed: January 28, 2004
    Publication date: July 29, 2004
    Inventors: Shou-Tsung Wang, Chung-Chiang Ku, En-Hsiang Yeh
  • Publication number: 20040087289
    Abstract: A phase lock loop receives a baseband signal which has an input frequency, and modulating the baseband signal to be a corresponding RF signal which has a predetermined transmission frequency for transmitting. The phase lock loop comprises a programmable divider, a modulator, a phase detector, a charging pump, a loop filter, a voltage-controlled oscillator and a frequency converter. The programmable divider divides the frequency of a local oscillating signal by a programmable divisor to generate a reference signal. The modulator receives the baseband signal, modulates the frequency of the reference signal according to the baseband signal, and generates a corresponding first comparison signal. The frequency converter receives the feedback RF signal and the local oscillating signal and outputs the second comparison signal according to the frequency difference. The divisor of the divider is programmable to avoid the spur frequency being generated because the local oscillating signal is interfered.
    Type: Application
    Filed: October 28, 2003
    Publication date: May 6, 2004
    Applicant: MediaTek Inc.
    Inventors: Chang-Fu Kuo, Ling-Wei Ke, Jen-Chiou Bo, Shou-Tsung Wang, Kuang-Kai Teng
  • Patent number: 6713338
    Abstract: A method for fabricating source/drain devices. A semiconductor substrate is provided with a gate formed thereon, a first doped area is formed on a first side of the gate on the semiconductor substrate, and a second doped area is formed on a second side of the gate on the semiconductor substrate in a manner such that the second doped area is separated from the gate by a predetermined distance. A patterned photo resist layer is formed on the semiconductor substrate having an opening on the second side, the exposed gate less than half the width of the gate. The semiconductor substrate is implanted and annealed to form a dual diffusion area on the second side of the gate using the patterned photo resist layer as a mask.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: March 30, 2004
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Wen-Tsung Wang, Yi-Tsung Jan, Sung-Min Wei, Chih-Cherng Liao, Zhe-Xiong Wu, Mao-Tsung Chen, Yuan-Heng Li
  • Publication number: 20040043589
    Abstract: A method for fabricating source/drain devices. A semiconductor substrate is provided with a gate formed on the semiconductor substrate, and a hard mask layer formed on the gate. A first doped area is formed on a first side of the gate on the semiconductor substrate, and a second doped area is formed on a second side of the gate on the semiconductor substrate in a manner such that the second doped area is separated from the gate by a predetermined distance. A patterned photo resist layer is formed on the semiconductor substrate having an opening on the second side, the exposed gate equal to half the width of the gate. The semiconductor substrate is implanted and annealed to form a dual diffusion area on the second side of the gate using the patterned photo resist layer and the hard mask layer as masks.
    Type: Application
    Filed: December 11, 2002
    Publication date: March 4, 2004
    Inventors: Yi-Tsung Jan, Wen-Tsung Wang, Sung-Min Wei, Chih-Cherng Liao, Zhe-Xiong Wu, Mao-Tsang Chen, Yuan-Heng Li
  • Publication number: 20040038484
    Abstract: A method for fabricating source/drain devices. A semiconductor substrate is provided with a gate formed thereon, a first doped area is formed on a first side of the gate on the semiconductor substrate, and a second doped area is formed on a second side of the gate on the semiconductor substrate in a manner such that the second doped area is separated from the gate by a predetermined distance. A patterned photo resist layer is formed on the semiconductor substrate having an opening on the second side, the exposed gate less than half the width of the gate. The semiconductor substrate is implanted and annealed to form a dual diffusion area on the second side of the gate using the patterned photo resist layer as a mask.
    Type: Application
    Filed: December 11, 2002
    Publication date: February 26, 2004
    Inventors: Wen-Tsung Wang, Yi-Tsung Jan, Sung-Min Wei, Chih-Cherng Liao, Zhe-Xiong Wu, Mao-Tsung Chen, Yuan-Heng Li
  • Patent number: 6614687
    Abstract: A new structure and method with a process tracking current source component to program a flash EPROM memory is proposed. By applying a current source which varies not only with the process variation but also with the source bias of the cell being programmed, a self-convergent and high-efficiency programming can be achieved. This process tracking current source component provides less current for cells with higher erased Vt and larger current for cells with lower erased Vt. A circuit for programming a floating gate transistor includes a current source component. The current source component couples in series between the floating gate transistor and an electrical sink during a programming interval. The current source component includes an electrical characteristic substantially matching the electrical characteristic of the floating gate transistor. An integrated circuit memory module on a semiconductor substrate is disclosed.
    Type: Grant
    Filed: May 3, 2001
    Date of Patent: September 2, 2003
    Assignee: Macronix International Co., Ltd.
    Inventors: Ming-Shang Chen, Wenpin Lu, Baw-Chyuan Lin, Mam-Tsung Wang
  • Patent number: 6569116
    Abstract: An intravenous (IV) flow controlling device comprises a flexible open container having a specific gravity less than one and an outer diameter smaller than that of the drip chamber, the container including a spherical bottom portion thinner than the shell upper portion thereof; a first plastic tube coupled to the bottom of the container being in communication with the exit; a flexible reservoir having one end coupled to the first tube; and a second plastic tube coupled to the other end of the reservoir being in communication therewith. The container is submerged as fluid filled in the drip chamber. Fluid flows through the exit, the first plastic tube, the reservoir, and the second plastic tube to cause the container to fall, thereby stopping fluid exiting when the bottom portion of the container clogs the exit and fluid in the drip chamber is used up.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: May 27, 2003
    Inventor: Hsien Tsung Wang
  • Patent number: 6525361
    Abstract: An asymmetric multilevel memory cell provides an inhibited source read current. The inhibited source read current dramatically reduces the likelihood of a cell type misread error for a memory array comprising multilevel cells. The method for fabricating the asymmetric multilevel memory cell comprises a source only implant, formation of a spacer on the drain side of the gate prior to source/drain implant, and the resultant formation of an offset region disposed between the channel and the drain. The offset region is not controlled by the gate voltage. The drain current at 1.5 volts is more than 3.5 times larger than the source current at 1.5 volts for spacer width of 0.12 micrometers. Asymmetric multilevel memory cells in a memory array, where the cells have a common source configuration, are accurately read in one direction because neighboring cells on the word line have substantially lower source current than the read cell drain current.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: February 25, 2003
    Assignee: Macronix International Co., Ltd.
    Inventors: Tao Cheng Lu, Chung Ju Chen, Hon Sui Lin, Mam Tsung Wang, Chin Hsi Lin, Ful Long Ni
  • Publication number: 20020163835
    Abstract: A new structure and method with a process tracking current source component to program a flash EPROM memory is proposed. By applying a current source which varies not only with the process variation but also with the source bias of the cell being programmed, a self-convergent and high-efficiency programming can be achieved. This process tracking current source component provides less current for cells with higher erased Vt and larger current for cells with lower erased Vt.
    Type: Application
    Filed: May 3, 2001
    Publication date: November 7, 2002
    Applicant: Macronix International Co., Ltd.
    Inventors: Ming-Shang Chen, Wenpin Lu, Baw-Chyuan Lin, Mam-Tsung Wang
  • Patent number: 6455898
    Abstract: An ESD protection structure for protecting an internal circuit comprising a primary protection device, a secondary protection device, and a substrate pickup is presented. The primary protection device and secondary protection device share a common source, and this common source implementation lowers the trigger voltage of the primary protection device to be about the same as the trigger voltage of the secondary protection device, thereby eliminating the need to use an isolation resistor between the primary and secondary protection devices.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: September 24, 2002
    Assignee: Macronix International Co., Ltd.
    Inventors: Meng-Hwang Liu, Tao-Cheng Lu, Mam-Tsung Wang
  • Patent number: 6432782
    Abstract: The present application discloses a non-volatile semiconductor memory device for storing up to eight-bits of information. The device has a semiconductor substrate of one conductivity type, a central bottom diffusion region on top of a portion of the semiconductor substrate, a second semiconductor layer on top of the bottom diffusion region, and left and right diffusion regions formed in the second semiconductor layer apart from the central bottom diffusion region thus forming a first vertical channel between the right and central bottom diffusion regions. The device further includes a trapping dielectric layer formed over exposed portions of the semiconductor substrate, left, central and right bottom diffusion regions and second semiconductor layer and a wordline formed over the trapping dielectric layer. A methods of fabricating this novel cell using trench technology is also disclosed.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: August 13, 2002
    Assignee: Macronix International Co., Ltd.
    Inventors: Hsing Lan Lung, Tao Cheng Lu, Mam Tsung Wang
  • Publication number: 20020070989
    Abstract: The present invention discloses a circuit for driving a heater of a printhead and a device employing the same. The device primarily includes a plurality of driving units and a plurality of electric resistant heaters. Each driving unit includes a transistor or at least one pair of transistors to form a Darlington pair, and has a base node connecting to a correspondent receive node for receiving correspondent address signals. Each electric resistant heater defines a first end connecting to the collector node of each driving unit, and a second end connecting to a current source. The driving unit of the present invention is a common emitter, which results in higher power gain. According to the driving circuit and device of the present invention, the power of electric resistant heaters is more controllable, and the stability of outputing current is improved.
    Type: Application
    Filed: January 24, 2001
    Publication date: June 13, 2002
    Inventors: Li-Chang Yang, Yun-Lung Yang, Hung-Tsung Wang
  • Patent number: 6397377
    Abstract: The present invention provides a method of performing optical proximity corrections of a photo mask pattern by using a computer. The photo mask pattern is formed on a photo mask which is used when performing photolithography for forming a predetermined original pattern by exposing a photo-resist layer in a predetermined area of a semiconductor wafer. The photo mask pattern is divided into a plurality of rectangular blocks. Each block can be bright or dark, and a least one side and two corners of the block are shared with another block. Each of shared corners is checked to find corners which may be affected by an optic proximity effect, and those corners are modified so as to prevent them from being affected by the optic proximity effect.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: May 28, 2002
    Assignee: Macronix International Co. Ltd.
    Inventors: Bing-Ying Wang, Chun-Yi Yang, Chun-Jung Lin, Jui-Chin Chang, Mam-Tsung Wang
  • Publication number: 20020034854
    Abstract: An asymmetric multilevel memory cell provides an inhibited source read current. The inhibited source read current dramatically reduces the likelihood of a cell type misread error for a memory array comprising multilevel cells. The method for fabricating the asymmetric multilevel memory cell comprises a source only implant, formation of a spacer on the drain side of the gate prior to source/drain implant, and the resultant formation of an offset region disposed between the channel and the drain. The offset region is not controlled by the gate voltage. The drain current at 1.5 volts is more than 3.5 times larger than the source current at 1.5 volts for spacer width of 0.12 micrometers. Asymmetric multilevel memory cells in a memory array, where the cells have a common source configuration, are accurately read in one direction because neighboring cells on the word line have substantially lower source current than the read cell drain current.
    Type: Application
    Filed: July 6, 2001
    Publication date: March 21, 2002
    Inventors: Tao Cheng Lu, Chung Ju Chen, Hon Sui Lin, Mam Tsung Wang, Chin Hsi Lin, Ful Long Ni