Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes: providing an interposer having a front surface and a back surface, the interposer comprising a substrate, at least one routing region, and at least one non-routing region; forming at least one warpage-reducing trench in the at least one non-routing region, wherein the at least one warpage-reducing trench extends from the front surface of the interposer to a first depth, the first depth smaller than a thickness between the front surface and the back surface of the interposer; depositing a warpage-relief material in the at least one warpage-reducing trench; and bonding the group of IC dies to the front surface of the interposer.

Abstract: An apparatus for testing a device under test (DUT) is provided. The apparatus includes a power supply device and a data generating device. The power supply device is configured to provide a first voltage and a second voltage to the DUT. The data generating device is configured to provide first data to the DUT. The power supply device is configured to provide the first voltage to the DUT in a first time duration. The data generating device is configured to provide the first data to the DUT in the first time duration. The power supply device is configured to provide the second voltage to the DUT in a second time duration after the first time duration. The second voltage is different from the first voltage.

Abstract: A microfluidic EP device for exogenous molecules transfection is disclosed that has high speed, high viability, and efficiency for collection of cells after EP. The microfluidic EP device has an EP chamber assembly, an adaptor, a pop up device, a syringe pump assembly, an EP controller, and a system controller. The EP chamber assembly has a MEMS nano channel plate, a MEMS cap, a cell cavity plate, and a cell cavity plate holder. The EP chamber assembly is connected to the pop up device through the adaptor. The pop up device may be an ultrasound vibrator or a motorized rotator. The MEMS cap has inlets/outlets for inputting/outputting cell solution, washing solution, transfected cells, exogenous material solution. The solution fluid is inputted/outputted by plastic tube and needle adaptor to the syringe pump assembly. All operation sequences are controlled by the system controller, which may perform batch operation continuously.

Abstract: The present application relates to a detection circuit for power load and a method for detection thereof. The detection circuit comprises a sensing circuit and a signal generation circuit. The signal generation circuit includes a calibration circuit. The sensing circuit senses an output power signal of a power supply unit for obtaining a sensing impedance. Thereby, a corresponding power sensing signal is generated according to the sensing impedance and the output power signal. The signal generation circuit generates a power ratio signal. The calibration circuit generates a calibrating signal according to the power ratio signal for driving the signal generation circuit to perform feedback control for generating the power ratio signal. The power ratio signal will match the load condition and be applied to provide the output power signal with less error.

Abstract: Semiconductor structures and fabrication methods are provided. In one example, a method includes forming a first dielectric layer on a semiconductor structure. The semiconductor structure includes a substrate and a multi-layer interconnect (MLI) structure on the substrate. The MLI structure includes multiple metallization layers. The first dielectric layer is formed on a topmost metallization layer. The method further includes forming a through-substrate-via (TSV) opening extending vertically through the first dielectric layer and the multiple metallization layers into the substrate, forming a TSV in the TSV opening, performing a first planarization process to planarize the TSV, forming multiple first metal vias and first metal lines in the first dielectric layer after the first planarization process, forming multiple first metal capping layers respectively on the multiple first metal lines, and performing a second planarization process to planarize the first metal capping layers.

Abstract: Semiconductor structures, die stack structures, and fabrication methods are provided. In one example, a semiconductor structure includes a die having a test pad disposed on a front side of the die. The test pad has a probe mark in an upper portion of the test pad. The probe mark has an open end at a top surface of the test pad, a bottom wall, a sidewall connected to the bottom wall, and a space between the open end, the bottom wall and the sidewall. The semiconductor structure further includes a first cover layer and a second cover layer. The first cover layer is disposed on the front side of the first test pad and the sidewall and the bottom wall of the probe mark. The second cover layer is disposed on the first cover layer. The first and second cover layers comprise different materials.

Abstract: A package comprises an interposer, comprising an interposer substrate including at least one layer, and a plurality of RDLs formed through at least a portion of the interposer substrate. The package also includes a die device structure comprising at least one device die, and a first test line (TL) structure interposed between the interposer and the die device structure. The first TL structure includes at least one first test line electrically coupled to the at least one device die, at least a portion of the at least one first test line extending beyond a peripheral edge of the die device structure to provide an electrical interface with the at least one device die.

Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes: providing an interposer having a front surface and a back surface, the interposer comprising a substrate, at least one routing region, and at least one non-routing region; forming at least one warpage-reducing trench in the at least one non-routing region, wherein the at least one warpage-reducing trench extends from the front surface of the interposer to a first depth, the first depth smaller than a thickness between the front surface and the back surface of the interposer; depositing a warpage-relief material in the at least one warpage-reducing trench; and bonding the group of IC dies to the front surface of the interposer.

Abstract: A universal security lock for portable electronic devices has a lock case and a lock core. The lock core, a displacement absorber, an expanding rod, and two gripping fingers are arranged in a passage of the lock case. An operating part of the lock core is movable inwardly into the passage to an engaged position. The displacement absorber is a spring or two mutually repelling magnets that drive the operating part and the expanding rod to move away from each other. The two gripping fingers are pivotally mounted on a front opening of the lock case. When the operating part is in the engaged position, the displacement absorber pushes the expanding rod toward the front opening to move the outer ends of the two gripping fingers away from each other gradually such that the gripping fingers engage with security slots of different widths.

Abstract: A universal security lock for portable electronic devices has a base and a lock core. An operating part, a blocker, a displacement absorber, an expanding rod, and two gripping fingers are arranged in the base. The operating part is slidably mounted through the rear opening and is slidable toward the front opening to an engaged position. The displacement absorber is a spring or two mutually repelling magnets that drive the operating part and the expanding rod away from each other. The two gripping fingers are pivotally mounted to the base and disposed on a front opening of the base. When the operating part is in the engaged position, the displacement absorber pushes the expanding rod toward the front opening to move the outer ends of the two gripping fingers away from each other gradually such that the gripping fingers engage with security slots of different widths.

Abstract: A universal security lock for portable electronic devices has an engaging mechanism which has a base, an expanding rod, and two gripping fingers. The expanding rod is slidable along an engaging direction. Each of the gripping fingers is pivotally mounted on the base and disposed on a respective side of the expanding rod. When the expanding rod is moved toward the engaging direction, an end of the expanding rod abuts against the two gripping fingers and expands the gripping fingers gradually such that the gripping fingers can be engaged in security slots of a portable electronic device. At least one of the gripping fingers has a protrusion extending toward the other gripping finger. The expanding rod selectively abuts against the protrusion to further expand the gripping finger.

Abstract: An over-current protection device for a power generator includes a first pin, configured to receive a signal; a detection and control module, coupled to the first pin, and configured to detect the signal to determine whether the signal conforms to a pre-determined condition or not, and to output a control signal when the signal conforms to the pre-determined condition; and an auto-trim and memory module, coupled to the detection and control module, configured to receive the control signal from the detection and control module, wherein the auto-trim and memory module is configured to execute a plurality of auto-trim measurements and to store adjustment data corresponding to the plurality of auto-trim measurements; a second pin, coupled to the detection and control module, configured to receive a second signal.

Abstract: A method is provided and includes several operations: testing multiple scan chains in multiple shift cycles to obtain multiple values; determining at least one fail chain in the scan chains and determining at least one fail shift cycle corresponding to at least one fail value in the values; mapping the at least one fail chain and the at least one fail shift cycle to the scan chains to identify the at least one fail flip flop; and identifying at least one fault site corresponding to the at least one fail flip flop.

Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.

Abstract: A circuit screening system including a target circuit under test receiving a first testing signal in a first period and a second testing signal in a second period; and a clock generating circuit providing a clock signal to the target circuit under test, the clock signal triggering the target circuit under test to receive the first testing signal in the first period and the second testing signal in the second period; the clock signal having a first profile and a second profile in the first period and the second period, respectively, and the first profile and the second profile having a phase difference.

Abstract: A liquid-cooling device includes multiple water blocks and at least one connection tube. Each of the water blocks has a water incoming end, a water outgoing end and a water-receiving space in communication with the water incoming end and the water outgoing end. The connection tube is disposed between each two water blocks. Two ends of the connection tube are respectively connected with the water incoming end of one of the two water blocks and the water outgoing end of the other water block, whereby the water-receiving spaces of the two water blocks communicate with each other via the connection tube. The connection tube has at least one bellows section between two ends of the connection tube. The liquid-cooling device solves the problems of the conventional liquid-cooling device that when the water block is welded, thermal deformation is produced to cause tolerance and the manufacturing cost is higher.

Abstract: A first integrated circuit (IC) die includes a first substrate. A second IC die includes a second substrate. At least one of the first substrate or the second substrate has a first surface orientation. The first IC die is spaced apart from the second IC die. A third die electrically interconnects the first IC die to the second IC die. The third die includes a third substrate having a second surface orientation. The second surface orientation is different from the first surface orientation.

Abstract: An adaptable liquid connector structure includes a case, an intermediate member and a liquid connector main body. The case is a hollow frame. The intermediate member is located in the case and includes an opening formed at a front area thereof for mounting the liquid connector main body therein, a locating bore located below the opening, and a plurality of elastic elements mounted on outer sides and a rear side of thereof. The intermediate member is supported by the elastic elements to suspend in the case and the elastic elements absorb assembly tolerance of the adaptable liquid connector structure, such that the liquid connector main body mounted therein is allowed for a positional floating adjustment in and relative to the case upward, downward, leftward and rightward to be smoothly, correctly and securely connected to an adaptor connector.

Abstract: An uninterruptible power system and an operation method thereof are provided. The uninterruptible power system comprises a DC-AC conversion circuit, a plurality of switches, a plurality of sensing units, a plurality of output ports and a control unit. Each output port is electrically coupled to an output terminal of the DC-AC conversion circuit sequentially through one of the sensing units and one of the switches. The control unit is configured to define members of at least one group from the output ports according to a system setting, and define which members of each group are non-critical output ports according to the system setting. The control unit is further configured to set, according to the system setting, at least one condition for all non-critical output ports in each group to simultaneously stop supplying power, and to accordingly control the operations of the corresponding switches.

Abstract: A circuit screening system including a target circuit under test receiving a first testing signal in a first period and a second testing signal in a second period; a power circuit providing a supply voltage to the target circuit under test, the supply voltage maintaining at a first voltage level in the first period and deviating from the first voltage level, and maintaining at the first voltage level in the second period; and a clock generating circuit providing a clock signal to the target circuit under test, the clock signal triggering the target circuit under test to receive the first testing signal in the first period and the second testing signal in the second period; the clock signal having a first profile and a second profile in the first period and the second period, respectively, and the first profile and the second profile having a phase difference.