Patents by Inventor Tsung Yang

Tsung Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990401
    Abstract: A device structure according to the present disclosure includes a passivation layer, a first conductor plate layer disposed on the passivation layer, a second conductor plate layer disposed over the first conductor layer, a third conductor plate layer disposed over the second conductor layer, and a fourth conductor plate layer disposed over the third conductor layer. The second conductor plate layer encloses the first conductor plate layer and the fourth conductor plate layer encloses the third conductor plate layer. The device structure, when used in a back-end-of-line passive device, reduces leakage and breakdown due to corner discharge effect.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Chieh Hsiao, Hsiang-Ku Shen, Yuan-Yang Hsiao, Chen-Chiu Huang, Dian-Hau Chen
  • Patent number: 11973040
    Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yang Hsieh, Chien-Chang Lee, Chia-Ping Lai, Wen-Chung Lu, Cheng-Kang Huang, Mei-Shih Kuo, Alice Huang
  • Publication number: 20240138063
    Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.
    Type: Application
    Filed: November 15, 2022
    Publication date: April 25, 2024
    Applicant: Unimicron Technology Corp.
    Inventors: Ping-Tsung Lin, Kai-Ming Yang, Chia-Yu Peng, Pu-Ju Lin, Cheng-Ta Ko
  • Patent number: 11961880
    Abstract: A semiconductor device includes first and second metal-insulator-metal structures. The first metal-insulator-metal structure includes a first bottom conductor plate, a first portion of a first dielectric layer, a first middle conductor plate, a first portion of a second dielectric layer, and a first top conductor plate stacked up one over another. The second metal-insulator-metal structure includes a second bottom conductor plate, a second portion of the first dielectric layer, a second middle conductor plate, a second portion of the second dielectric layer, and a second top conductor plate stacked up one over another. In a cross-sectional view, the first bottom conductor plate is wider than the first middle conductor plate that is wider than the first top conductor plate, and the second bottom conductor plate is narrower than the second middle conductor plate that is narrower than the first top conductor plate.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yuan-Yang Hsiao, Hsiang-Ku Shen, Tsung-Chieh Hsiao, Ying-Yao Lai, Dian-Hau Chen
  • Publication number: 20240100682
    Abstract: A flexible interface (130) may operably couple a head portion (110, 210) and a shaft (120, 220) of a hand tool (100, 200). The flexible interface may include a retention assembly (160) and a locking assembly (150) including an actuator (152, 250, 250?) defining a locked state and an unlocked state for the hand tool. In the unlocked state, an angle of the head portion may be pivotable relative to a pivot axis (225) substantially perpendicular to a direction of extension of the shaft and, in the locked state, the angle of the head portion is fixed. The actuator may be configured to move in a direction substantially perpendicular to the pivot axis to operate the locking assembly to transition between the locked state and the unlocked state, and configured to move in a direction substantially parallel to the pivot axis to operate the retention assembly to retain hand tool in the unlocked state. A hand tool comprising said flexible interface is also related.
    Type: Application
    Filed: January 28, 2021
    Publication date: March 28, 2024
    Inventors: Minglin Shi, Cheng Yang, Yi-Hsiang Tseng, Tsung-Hsien Shen
  • Publication number: 20240094288
    Abstract: A circuit screening system including a target circuit under test receiving a first testing signal in a first period and a second testing signal in a second period; and a clock generating circuit providing a clock signal to the target circuit under test, the clock signal triggering the target circuit under test to receive the first testing signal in the first period and the second testing signal in the second period; the clock signal having a first profile and a second profile in the first period and the second period, respectively, and the first profile and the second profile having a phase difference.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Inventors: CHI-CHE WU, TSUNG-YANG HUNG, JIA-MING GUO, YI-NA FANG, MING-YIH WANG
  • Publication number: 20240099086
    Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 21, 2024
    Inventors: Cheng-Ho Yu, Chin-Wei Lin, Shyuan Yang, Ting-Kuo Chang, Tsung-Ting Tsai, Warren S. Rieutort-Louis, Shih-Chang Chang, Yu Cheng Chen, John Z. Zhong
  • Patent number: 11934213
    Abstract: A liquid-cooling device includes multiple water blocks and at least one connection tube. Each of the water blocks has a water incoming end, a water outgoing end and a water-receiving space in communication with the water incoming end and the water outgoing end. The connection tube is disposed between each two water blocks. Two ends of the connection tube are respectively connected with the water incoming end of one of the two water blocks and the water outgoing end of the other water block, whereby the water-receiving spaces of the two water blocks communicate with each other via the connection tube. The connection tube has at least one bellows section between two ends of the connection tube. The liquid-cooling device solves the problems of the conventional liquid-cooling device that when the water block is welded, thermal deformation is produced to cause tolerance and the manufacturing cost is higher.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: March 19, 2024
    Assignee: ASIA VITAL COMPONENTS (CHINA) CO., LTD.
    Inventors: Pai-Ling Kao, Sung-Wei Lee, Kuan-Lin Huang, Ming-Tsung Yang
  • Publication number: 20240082995
    Abstract: A hand tool (100,200) may include a head portion (110,210) configured to interface with a fastener, a shaft (120,220) and a grip portion at which an operator is enabled to hold the hand tool during operation, and a flexible interface (130,230) configured to operably couple the shaft and the head portion in a locked state and an unlocked state. The flexible interface is also configured to enable the head portion to pivot relative to the shaft about a pivot axis that extends substantially perpendicular to a direction of extension of the shaft. In the unlocked state, an angle of the head portion may be pivotable relative to the pivot axis. In the locked state, the angle of the head portion may be fixed. The flexible interface may include a locking assembly (150) including an actuator (152, 250, 250?) having a locked position defining the locked state and an unlocked position defining the unlocked state.
    Type: Application
    Filed: January 28, 2021
    Publication date: March 14, 2024
    Inventors: Minglin Shi, Cheng Yang, Yi-Hsiang Tseng, Tsung-Hsien Shen
  • Publication number: 20240084454
    Abstract: A chuck vacuum line of a semiconductor processing tool includes a first portion that penetrates a sidewall of a main pumping line of the semiconductor processing tool. The chuck vacuum line includes a second portion that is substantially parallel to the sidewall of the main pumping line and to a direction of flow in the main pumping line. A size of the second portion increases between an inlet end of the second portion and an outlet end of the second portion along the direction of flow in the main pumping line.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Yung-Tsun LIU, Kuang-Wei CHENG, Sheng-chun YANG, Chih-Tsung LEE, Chyi-Tsong NI
  • Patent number: 11929418
    Abstract: A gate structure includes a substrate divided into an N-type transistor region and a P-type transistor region. An interlayer dielectric covers the substrate. A first trench is embedded in the interlayer dielectric within the N-type transistor region. A first gate electrode having a bullet-shaped profile is disposed in the first trench. A gate dielectric contacts the first trench. An N-type work function layer is disposed between the gate dielectric layer and the first gate electrode. A second trench is embedded in the interlayer dielectric within the P-type transistor region. A second gate electrode having a first mushroom-shaped profile is disposed in the second trench. The gate dielectric layer contacts the second trench. The N-type work function layer is disposed between the gate dielectric layer and the second gate electrode. A first P-type work function layer is disposed between the gate dielectric layer and the N-type work function layer.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: March 12, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jie-Ning Yang, Wen-Tsung Chang, Po-Wen Su, Kuan-Ying Lai, Bo-Yu Su, Chun-Mao Chiou, Yao-Jhan Wang
  • Patent number: 11923405
    Abstract: The present disclosure is directed to a semiconductor device. The semiconductor device includes a substrate, an insulating layer disposed on the substrate, a first conductive feature disposed in the insulating layer, and a capacitor structure disposed on the insulating layer. The capacitor structure includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode sequentially stacked. The semiconductor device also includes a first via connected to the first electrode and the third electrode, a second via connected to the second electrode, and a third via connected to the first conductive feature. A part of the first via is disposed in the insulating layer. A portion of the first conductive feature is directly under the capacitor structure.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20240055354
    Abstract: A first integrated circuit (IC) die includes a first substrate. A second IC die includes a second substrate. At least one of the first substrate or the second substrate has a first surface orientation. The first IC die is spaced apart from the second IC die. A third die electrically interconnects the first IC die to the second IC die. The third die includes a third substrate having a second surface orientation. The second surface orientation is different from the first surface orientation.
    Type: Application
    Filed: August 12, 2022
    Publication date: February 15, 2024
    Inventors: Yu-Sheng Lin, Chin-Fu Kao, Tsung-Yang Hsieh, Jyun-Lin Wu, Yao-Chun Chuang
  • Patent number: 11892252
    Abstract: An adaptable liquid connector structure includes a case, an intermediate member and a liquid connector main body. The case is a hollow frame. The intermediate member is located in the case and includes an opening formed at a front area thereof for mounting the liquid connector main body therein, a locating bore located below the opening, and a plurality of elastic elements mounted on outer sides and a rear side of thereof. The intermediate member is supported by the elastic elements to suspend in the case and the elastic elements absorb assembly tolerance of the adaptable liquid connector structure, such that the liquid connector main body mounted therein is allowed for a positional floating adjustment in and relative to the case upward, downward, leftward and rightward to be smoothly, correctly and securely connected to an adaptor connector.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: February 6, 2024
    Assignee: ASIA VITAL COMPONENTS CO., LTD.
    Inventors: Ming-Tsung Yang, Kuan-Lin Huang, Sung-Wei Lee
  • Patent number: 11870296
    Abstract: An uninterruptible power system and an operation method thereof are provided. The uninterruptible power system comprises a DC-AC conversion circuit, a plurality of switches, a plurality of sensing units, a plurality of output ports and a control unit. Each output port is electrically coupled to an output terminal of the DC-AC conversion circuit sequentially through one of the sensing units and one of the switches. The control unit is configured to define members of at least one group from the output ports according to a system setting, and define which members of each group are non-critical output ports according to the system setting. The control unit is further configured to set, according to the system setting, at least one condition for all non-critical output ports in each group to simultaneously stop supplying power, and to accordingly control the operations of the corresponding switches.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: January 9, 2024
    Assignee: CYBER POWER SYSTEMS, INC.
    Inventors: Kai-Tsung Yang, Jui-Hung Chou, Fang-Yu Hsu, Shou-Ting Yeh
  • Patent number: 11852682
    Abstract: A circuit screening system including a target circuit under test receiving a first testing signal in a first period and a second testing signal in a second period; a power circuit providing a supply voltage to the target circuit under test, the supply voltage maintaining at a first voltage level in the first period and deviating from the first voltage level, and maintaining at the first voltage level in the second period; and a clock generating circuit providing a clock signal to the target circuit under test, the clock signal triggering the target circuit under test to receive the first testing signal in the first period and the second testing signal in the second period; the clock signal having a first profile and a second profile in the first period and the second period, respectively, and the first profile and the second profile having a phase difference.
    Type: Grant
    Filed: November 14, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chi-Che Wu, Tsung-Yang Hung, Jia-Ming Guo, Yi-Na Fang, Ming-Yih Wang
  • Publication number: 20230386944
    Abstract: A package comprises an interposer, comprising an interposer substrate including at least one layer, and a plurality of RDLs formed through at least a portion of the interposer substrate. The package also includes a die device structure comprising at least one device die, and a first test line (TL) structure interposed between the interposer and the die device structure. The first TL structure includes at least one first test line electrically coupled to the at least one device die, at least a portion of the at least one first test line extending beyond a peripheral edge of the die device structure to provide an electrical interface with the at least one device die.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yang Hsieh, Chien-Chang Lee, Chia-Ping Lai, Wen-Chung Lu, Cheng-Kang Huang, Mei-Shih Kuo, Alice Huang
  • Publication number: 20230371668
    Abstract: A contact lens packaging container and a contact lens product are provided. The contact lens packaging container is formed by a plastic material and a color powder material dispersed in the plastic material. The contact lens packaging container has a light blocking rate of not less than 20% under a wavelength measurement range between 380 nanometers and 780 nanometers through a spectrophotometer.
    Type: Application
    Filed: September 15, 2022
    Publication date: November 23, 2023
    Inventors: TSUNG-YANG LEE, WEI-AN YEH
  • Patent number: 11808061
    Abstract: An anti-theft lock for a portable electronic device has a mounting shaft, two buckling units, a split-abutting unit, and a controlling unit. The two buckling units are moveably mounted around the mounting shaft. The split-abutting unit is moveable and has an engaging end and a split-abutting end. The split-abutting end selectively abuts the two buckling units via the movement of the split-abutting unit. The controlling unit has an annular curved surface. The annular curved surface slidably abuts the engaging end of the split-abutting unit. During the rotation of the controlling unit, the annular curved surface is capable of pushing the split-abutting unit to make the split-abutting end abut the two buckling units with inclined surfaces to move the two buckling units away from each other. The larger a distance the split-abutting unit moves, the larger a distance the two buckling units move away from each other.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: November 7, 2023
    Assignee: Jin Tay Industries Co., Ltd.
    Inventor: Kuo-Tsung Yang
  • Patent number: 11778739
    Abstract: A thermally conductive board includes a metal substrate, a metal layer, a thermal conductive insulating polymer layer, and a ceramic material layer. The thermal conductive insulating polymer layer is located between the metal layer and the metal substrate. The ceramic material layer includes an upper ceramic layer or a lower ceramic layer, or includes both the upper ceramic layer and the lower ceramic layer. The upper ceramic layer is disposed between the metal layer and the thermal conductive insulating polymer layer, and the lower ceramic layer is disposed between the thermal conductive insulating polymer layer and the metal substrate.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: October 3, 2023
    Assignee: POLYTRONICS TECHNOLOGY CORP.
    Inventors: Kuo Hsun Chen, Cheng Tsung Yang, Feng-Chun Yu, Kai-Wei Lo