Patents by Inventor Tsutomu Haruta

Tsutomu Haruta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7920188
    Abstract: An NchMOS transistor Q71 on the input side of a current mirror 70 is made function as a voltage operating-point setting portion so that a pixel signal line potential (voltage of a horizontal signal line 20) would be constantly stable nearly at the GND. Then, an amplification factor and linearity become good in an amplification transistor in the solid imaging device 3. A current copier 90 is made function as a current sampling portion so as to receive a signal current IIN of the solid imaging device 3 through the current mirror 70 to carry out sampling of a pixel signal in a resetting period in the shape of current component as the pixel signal is. Calculating differential between a current component in a detecting period and an offset current, which is the current component in a resetting period in sampling, allows an offset component included in the pixel signal to be removed and only pure signal Isig to be picked up at an output terminal Iout, so that the FPN restraining function can be fulfilled.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: April 5, 2011
    Assignee: Sony Corporation
    Inventors: Ken Koseki, Tsutomu Haruta, Yukihiro Yasui, Yasuaki Hisamatsu
  • Patent number: 7816711
    Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: October 19, 2010
    Assignee: Sony Corporation
    Inventors: Takashi Abe, Ryoji Suzuki, Keiji Mabuchi, Testuya Iizuka, Takahisa Ueno, Tsutomu Haruta
  • Patent number: 7804116
    Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: September 28, 2010
    Assignee: Sony Corporation
    Inventors: Takashi Abe, Ryoji Suzuki, Keiji Mabuchi, Testuya Iizuka, Takahisa Ueno, Tsutomu Haruta
  • Patent number: 7742092
    Abstract: A solid-state imaging device including: an imaging pixel region where a plurality of imaging pixels is disposed; a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns; charge integrating amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns; holding elements that allow the input pixel signals to be held in the charge integrating amps even in periods when the charge integrating amps are in a standby state; and a horizontal selecting circuit for transferring pixel signals output from the respective charge integrating amps by a horizontal signal line.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: June 22, 2010
    Assignee: Sony Corporation
    Inventors: Ken Koseki, Tsutomu Haruta
  • Publication number: 20100141796
    Abstract: A solid-state imaging device includes: an imaging unit taking a subject image focused by an imaging optical system; a digital signal processing unit generating image data of the subject image taken by the imaging unit and luminance data thereof; an input/output unit inputting and outputting data; a focus evaluation value generating unit generating a focus evaluation value of the subject image based on the luminance data outputted from the digital signal processing unit and outputting the focus evaluation value from the input/output unit; and an imaging drive unit starting an imaging operation by the imaging unit when an imaging instruction signal is inputted from the input/output unit, and outputting an imaging-end timing signal from the input/output unit when the imaging operation is completed.
    Type: Application
    Filed: November 17, 2009
    Publication date: June 10, 2010
    Applicant: Sony Corporation
    Inventors: Tsutomu Haruta, Eiji Makino, Takeshi Yamaguchi, Shinsuke Shimomoto
  • Patent number: 7719586
    Abstract: From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: May 18, 2010
    Assignee: Sony Corporation
    Inventors: Ken Koseki, Tsutomu Haruta
  • Publication number: 20100110249
    Abstract: From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.
    Type: Application
    Filed: January 11, 2010
    Publication date: May 6, 2010
    Applicant: Sony Corporation
    Inventors: Ken Koseki, Tsutomu Haruta
  • Publication number: 20100073536
    Abstract: A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided. An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Application
    Filed: November 30, 2009
    Publication date: March 25, 2010
    Applicant: SONY CORPORATION
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Patent number: 7646412
    Abstract: A dc level control method for holding a dc level of a clamp portion in an electric signal to be a prescribed value is disclosed, wherein the method comprises the steps of: comparing a dc level of a sampling interval in said electric signal with a predetermined reference value to obtain a difference between said dc level and said reference value using an A/D converting section for dc level comparison which has a lower bit resolution than an A/D converting section for digital signal processing of said electric signal; and feeding back a clamp signal to said electric signal so that said obtained difference between said dc level and said reference value substantially becomes zero. This method is suitable for applying to a signal processing system for a solid state imaging apparatus.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: January 12, 2010
    Assignee: Sony Corporation
    Inventors: Yasuaki Hisamatsu, Tsutomu Haruta, Ken Koseki
  • Patent number: 7626625
    Abstract: A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided. An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: December 1, 2009
    Assignee: Sony Corporation
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Patent number: 7508433
    Abstract: From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: March 24, 2009
    Assignee: Sony Corporation
    Inventors: Ken Koseki, Tsutomu Haruta
  • Patent number: 7508975
    Abstract: An image sensor is disclosed, which includes: a pixel unit having a plurality of pixels each outputting incident light as a pixel signal; an amplifier amplifying the pixel signal output from the pixel unit; and a defective pixel detection circuit performing a defective pixel detection on signals output from the amplifier, wherein the defective pixel detection circuit adjusts the detection accuracy of the defective pixel detection in accordance with an exposure condition of the pixel unit.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: March 24, 2009
    Assignee: Sony Corporation
    Inventors: Daisaku Izumi, Tsutomu Haruta, Eiji Makino
  • Publication number: 20090046188
    Abstract: From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.
    Type: Application
    Filed: September 29, 2008
    Publication date: February 19, 2009
    Applicant: SONY CORPORATION
    Inventors: Ken Koseki, Tsutomu Haruta
  • Patent number: 7485903
    Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: February 3, 2009
    Assignee: Sony Corporation
    Inventors: Takashi Abe, Ryoji Suzuki, Keiji Mabuchi, Testuya Iizuka, Takahisa Ueno, Tsutomu Haruta
  • Publication number: 20090027536
    Abstract: A solid-state imaging device including: an imaging pixel region where a plurality of imaging pixels is disposed; a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns; charge integrating amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns; holding elements that allow the input pixel signals to be held in the charge integrating amps even in periods when the charge integrating amps are in a standby state; and a horizontal selecting circuit for transferring pixel signals output from the respective charge integrating amps by a horizontal signal line.
    Type: Application
    Filed: September 29, 2008
    Publication date: January 29, 2009
    Applicant: Sony Corporation
    Inventors: Ken Koseki, Tsutomu Haruta
  • Patent number: 7477302
    Abstract: A solid-state image pickup apparatus and an image pickup method are disclosed which can detect and correct fixed pattern noise efficiently and accurately. Pickup image signals produced by reading out signals in parallel from a pixel sensor section are subject to an analog gain process, an A/D conversion process and a digital gain process. Within a period within which the pickup image signals which are based on a fixed value are inputted within a one-frame period, a reference signal average is produced from the signals. Sum values of difference values of the signals from the reference signal average are stored. Within a period within which the pickup image signals from valid pixels are inputted within the one-frame period, fixed pattern noise is removed from the pickup image signals using division averages obtained by dividing the stored sum values.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: January 13, 2009
    Assignee: Sony Corporation
    Inventors: Yasuaki Hisamatsu, Tsutomu Haruta, Ken Matsumoto
  • Publication number: 20080284903
    Abstract: An image sensor includes a solid-state image pickup device, an optical system, and a flash. The solid-state image pickup device has an electronic shutter function of outputting accumulated signal charges at a timing corresponding to a shutter speed. The optical system collects incident light to an image pickup area of the solid-state image pickup device. The flash irradiates light to an object to be photographed by the solid-state image pickup device. The solid-state image pickup device includes a pulse generator circuit for generating one or more of an electronic shutter pulse for controlling an accumulation time of signal charges by using the electronic shutter function, an optical system movement pulse for controlling movement of the optical system, and a flash pulse for controlling an emission timing of the flash.
    Type: Application
    Filed: May 14, 2008
    Publication date: November 20, 2008
    Applicant: Sony Corporation
    Inventors: Tsutomu Haruta, Eiji Makino, Takeshi Yamaguchi, Tatsuya Matsumura
  • Publication number: 20080239127
    Abstract: An NchMOS transistor Q71 on the input side of a current mirror 70 is made function as a voltage operating-point setting portion so that a pixel signal line potential (voltage of a horizontal signal line 20) would be constantly stable nearly at the GND. Then, an amplification factor and linearity become good in an amplification transistor in the solid imaging device 3. A current copier 90 is made function as a current sampling portion so as to receive a signal current IIN of the solid imaging device 3 through the current mirror 70 to carry out sampling of a pixel signal in a resetting period in the shape of current component as the pixel signal is. Calculating differential between a current component in a detecting period and an offset current, which is the current component in a resetting period in sampling, allows an offset component included in the pixel signal to be removed and only pure signal Isig to be picked up at an output terminal Iout, so that the FPN restraining function can be fulfilled.
    Type: Application
    Filed: April 30, 2008
    Publication date: October 2, 2008
    Inventors: Ken Koseki, Tsutomu Haruta, Yukihiro Yasui, Yasuaki Hisamatsu
  • Publication number: 20080210947
    Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.
    Type: Application
    Filed: June 29, 2007
    Publication date: September 4, 2008
    Inventors: Takashi Abe, Ryoji Suzuki, Keiji Mabuchi, Testuya Iizuka, Takahisa Ueno, Tsutomu Haruta
  • Patent number: 7397507
    Abstract: An NchMOS transistor Q71 on the input side of a current mirror 70 is made function as a voltage operating-point setting portion so that a pixel signal line potential (voltage of a horizontal signal line 20) would be constantly stable nearly at the GND. Then, an amplification factor and linearity become good in an amplification transistor in the solid imaging device 3. A current copier 90 is made function as a current sampling portion so as to receive a signal current IIN of the solid imaging device 3 through the current mirror 70 to carry out sampling of a pixel signal in a resetting period in the shape of current component as the pixel signal is. Calculating differential between a current component in a detecting period and an offset current, which is the current component in a resetting period in sampling, allows an offset component included in the pixel signal to be removed and only pure signal Isig to be picked up at an output terminal Iout, so that the FPN restraining function can be fulfilled.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: July 8, 2008
    Assignee: Sony Corporation
    Inventors: Ken Koseki, Tsutomu Haruta, Yukihiro Yasui, Yasuaki Hisamatsu