Abstract: An imaging apparatus includes a solid-state imaging device that outputs a captured image signal in current mode, which in turn is subjected to CDS processing in current mode by a current signal detector, thus suppressing FPN noise. A captured image signal output by the current signal detector is amplified by a programmable gain amplifier to a certain level, and the amplified signal is converted by a current-to-voltage transducer into a voltage signal. In a clamp circuit including a current-output differential amplifier and a current adder, the differential amplifier compares the voltage signal with a reference voltage from a reference voltage source and feeds back a clamp current to the current adder so that the difference between the voltage signal and the reference voltage becomes substantially zero. The current adder is required to simply add a signal current and the clamp current.

Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.

Abstract: A dc level control method for holding a dc level of a clamp portion in an electric signal to be a prescribed value is disclosed, wherein the method comprises the steps of: comparing a dc level of a sampling interval in said electric signal with a predetermined reference value to obtain a difference between said dc level and said reference value using an A/D converting section for dc level comparison which has a lower bit resolution than an A/D converting section for digital signal processing of said electric signal; and feeding back a clamp signal to said electric signal so that said obtained difference between said dc level and said reference value substantially becomes zero. This method is suitable for applying to a signal processing system for a solid state imaging apparatus.

Abstract: A dc level control method for holding a dc level of a clamp portion in an electric signal to be a prescribed value is disclosed, wherein the method comprises the steps of: comparing a dc level of a sampling interval in said electric signal with a predetermined reference value to obtain a difference between said dc level and said reference value using an A/D converting section for dc level comparison which has a lower bit resolution than an A/D converting section for digital signal processing of said electric signal; and feeding back a clamp signal to said electric signal so that said obtained difference between said dc level and said reference value substantially becomes zero. This method is suitable for applying to a signal processing system for a solid state imaging apparatus.

Abstract: In a charge-pump booster circuit, the control clock is controlled on a small-step basis to thereby suppress the boost amplitude and the occurrence of various noises. Provided are a charge-pump booster circuit section for boosting an external power voltage in absolute value level, a boost-voltage feedback section for controlling the booster circuit section, and a clock buffer section. In the boost-voltage feedback section, an output level of the booster circuit section is detected by a voltage detecting section. This is compared with a reference level, and depending upon the comparison result, a count operation is made in an up/down counter section. Based on the count value, the control amount is shifted on a small-step basis from the D/A converter section, thereby controlling the power voltage of the clock buffer section 300 through the level shifter section.

Abstract: An image sensor is disclosed, which includes: a pixel unit having a plurality of pixels each outputting incident light as a pixel signal; an amplifier amplifying the pixel signal output from the pixel unit; and a defective pixel detection circuit performing a defective pixel detection on signals output from the amplifier, wherein the defective pixel detection circuit adjusts the detection accuracy of the defective pixel detection in accordance with an exposure condition of the pixel unit.

Abstract: A solid-state image pickup apparatus and an image pickup method are disclosed which can detect and correct fixed pattern noise efficiently and accurately. Pickup image signals produced by reading out signals in parallel from a pixel sensor section are subject to an analog gain process, an A/D conversion process and a digital gain process. Within a period within which the pickup image signals which are based on a fixed value are inputted within a one-frame period, a reference signal average is produced from the signals. Sum values of difference values of the signals from the reference signal average are stored. Within a period within which the pickup image signals from valid pixels are inputted within the one-frame period, fixed pattern noise is removed from the pickup image signals using division averages obtained by dividing the stored sum values.

Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.

Abstract: From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.

Abstract: An imaging apparatus includes a solid-state imaging device that outputs a captured image signal in current mode, which in turn is subjected to CDS processing in current mode by a current signal detector, thus suppressing FPN noise. A captured image signal output by the current signal detector is amplified by a programmable gain amplifier to a certain level, and the amplified signal is converted by a current-to-voltage transducer into a voltage signal. In a clamp circuit including a current-output differential amplifier and a current adder, the differential amplifier compares the voltage signal with a reference voltage from a reference voltage source and feeds back a clamp current to the current adder so that the difference between the voltage signal and the reference voltage becomes substantially zero. The current adder is required to simply add a signal current and the clamp current.

Abstract: In a charge-pump booster circuit, the control clock is controlled on a small-step basis to thereby suppress the boost amplitude and the occurrence of various noises. Provided are a charge-pump booster circuit section for boosting an external power voltage in absolute value level, a boost-voltage feedback section for controlling the booster circuit section, and a clock buffer section. In the boost-voltage feedback section, an output level of booster circuit section is detected by a voltage detecting section. This is compared with a reference level, and depending upon the comparison result, count operation is made in an up/down counter section. Based on the count value, control amount is shifted on a small-step basis from the D/A converter section, thereby controlling the power voltage of the clock buffer section 300 through the level shifter section.

Abstract: A dc level control method for holding a dc level of a clamp portion in an electric signal to be a prescribed value is disclosed, wherein the method comprises the steps of: comparing a dc level of a sampling interval in said electric signal with a predetermined reference value to obtain a difference between said dc level and said reference value using an A/D converting section for dc level comparison which has a lower bit resolution than an A/D converting section for digital signal processing of said electric signal; and feeding back a clamp signal to said electric signal so that said obtained difference between said dc level and said reference value substantially becomes zero. This method is suitable for applying to a signal processing system for a solid state imaging apparatus.

Abstract: An NchMOS transistor Q71 on the input side of a current mirror 70 is made function as a voltage operating-point setting portion so that a pixel signal line potential (voltage of a horizontal signal line 20) would be constantly stable nearly at the GND. Then, an amplification factor and linearity become good in an amplification transistor in the solid imaging device 3. A current copier 90 is made function as a current sampling portion so as to receive a signal current IIN of the solid imaging device 3 through the current mirror 70 to carry out sampling of a pixel signal in a resetting period in the shape of current component as the pixel signal is. Calculating differential between a current component in a detecting period and an offset current, which is the current component in a resetting period in sampling, allows an offset component included in the pixel signal to be removed and only pure signal Isig to be picked up at an output terminal Iout, so that the FPN restraining function can be fulfilled.

Abstract: An automatic gain control method and device capable of maintaining the gain within a predetermined proper range by first amplifying an input analog signal from a microphone or the like, then sampling the amplified analog signal while comparing the voltage thereof with a predetermined reference voltage, and when the number of times that the voltage of the amplified analog signal is higher than the reference voltage exceeds a predetermined number of times, varying the gain of the amplified analog signal stepwise in response to every excess beyond the predetermined number of times. Consequently it becomes possible to eliminate the necessity of an input amplifier of a sufficient bandwidth and an A-D converter, hence realizing manufacture of an improved device composed of a single-chip CMOS integrated circuit, with further advantages of minimizing the number of required component parts, reducing the production processes, achieving a higher integration density and lowering the power consumption.