Patents by Inventor Tsutomu Murakawa

Tsutomu Murakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200381556
    Abstract: A semiconductor device having a high on-state current is provided. The semiconductor device includes a first oxide; a first conductor and a second conductor provided over the first oxide to be separated from each other; and a second oxide provided over the first oxide and between the first conductor and the second conductor. Each of the first oxide and the second oxide has crystallinity, the first oxide includes a region where a c-axis is aligned substantially perpendicularly to a top surface of the first oxide, and the second oxide includes a region where the c-axis is aligned substantially perpendicularly to the top surface of the first oxide, a region where the c-axis is aligned substantially perpendicularly to a side surface of the first conductor, and a region where the c-axis is aligned substantially perpendicularly to a side surface of the second conductor.
    Type: Application
    Filed: November 28, 2018
    Publication date: December 3, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Tsutomu MURAKAWA, Hiroki KOMAGATA, Katsuaki TOCHIBAYASHI, Kentaro SUGAYA
  • Publication number: 20200357923
    Abstract: A semiconductor device with a high on-state current is provided. The semiconductor device includes a first insulator, a first oxide over the first insulator, a second oxide over the first oxide, a first conductor and a second conductor over the second oxide, a third oxide over the second oxide, a second insulator over the third oxide, a third conductor that is located over the second insulator and overlaps with the third oxide, a third insulator that is located over the first insulator and in contact with a side surface of the first oxide, a side surface of the second oxide, a side surface of the first conductor, a top surface of the first conductor, a side surface of the second conductor, and a top surface of the second conductor, and a fourth insulator over the third conductor, the second insulator, the third oxide, and the third insulator. The fourth insulator is in contact with a top surface of each of the third conductor, the second insulator, and the third oxide.
    Type: Application
    Filed: November 27, 2018
    Publication date: November 12, 2020
    Inventors: Shunpei YAMAZAKI, Hiromi SAWAI, Ryo TOKUMARU, Toshihiko TAKEUCHI, Tsutomu MURAKAWA, Sho NAGAMATSU, Tomoaki MORIWAKA
  • Publication number: 20200273886
    Abstract: A semiconductor device which can suppress leakage current between a wiring and a connection electrode connected to a floating node is provided. The semiconductor device includes a first insulator, a first conductor over the first insulator, a second conductor over the first insulator, and a second insulator over the first insulator, the first conductor, and the second conductor. The first conductor and the second conductor contain a metal A (one kind or a plurality of kinds of aluminum, copper, tungsten, chromium, silver, gold, platinum, tantalum, nickel, molybdenum, magnesium, beryllium, indium, and ruthenium). The metal A is detected in an interface between the first insulator and the second insulator by an energy dispersive X-ray spectroscopy (EDX). The second insulator includes a groove for exposing the first insulator between the first conductor and the second conductor.
    Type: Application
    Filed: March 12, 2020
    Publication date: August 27, 2020
    Inventors: Hajime KIMURA, Tsutomu MURAKAWA, Kosei NEI, Hiroaki HONDA, Yusuke SHINO
  • Publication number: 20200266289
    Abstract: A semiconductor device with favorable electrical characteristics and reliability is provided. A first insulator is formed. A second insulator is formed over the first insulator. An island-shaped oxide is formed over the second insulator. A stacked body of a third insulator and a conductor is formed over the oxide. The resistance of the oxide is selectively reduced by forming a film containing a metal element over the oxide and the stacked body. After a fourth insulator is formed over the second insulator, the oxide, and the stacked body, an opening portion exposing the second insulator is formed in the fourth insulator. A fifth insulator is formed over the second insulator and the fourth insulator. Oxygen introduction treatment is performed on the fifth insulator.
    Type: Application
    Filed: August 28, 2018
    Publication date: August 20, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Toshihiko TAKEUCHI, Tsutomu MURAKAWA, Hiroki KOMAGATA, Naoki OKUNO, Noritaka ISHIHARA, Yusuke NONAKA
  • Publication number: 20200243685
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device which includes a first insulator provided over a substrate; an oxide provided over the first insulator; a second insulator provided over the oxide; a conductor provided over the second insulator; a third insulator provided in contact with a side surface of the second insulator and a side surface of the conductor; a fourth insulator provided in contact with at least a top surface of the oxide and in contact with a side surface of the third insulator and a top surface of the conductor; a fifth insulator provided over the fourth insulator; a sixth insulator provided over the fifth insulator; and a seventh insulator provided over the sixth insulator, in which the sixth insulator contains oxygen and the sixth insulator and the first insulator include a region where the sixth insulator and the first insulator are in contact with each other.
    Type: Application
    Filed: February 23, 2018
    Publication date: July 30, 2020
    Inventors: Shunpei YAMAZAKI, Tsutomu MURAKAWA, Hajime KIMURA
  • Publication number: 20200203533
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a first insulator, a second insulator over the first insulator, a third insulator over the second insulator, a fourth insulator and a first conductor over the third insulator, a fifth insulator over the fourth insulator and the first conductor, a first oxide over the fifth insulator, a second conductor and a third conductor over the first oxide, a second oxide over the first oxide and between the second conductor and the third conductor, a sixth insulator over the second oxide, and a fourth conductor over the sixth insulator. The hydrogen concentration of the second insulator is lower than that of the first insulator. The hydrogen concentration of the third insulator is lower than that of the second insulator.
    Type: Application
    Filed: November 21, 2019
    Publication date: June 25, 2020
    Inventors: Shunpei YAMAZAKI, Tsutomu MURAKAWA, Hideomi SUZAWA
  • Publication number: 20200194310
    Abstract: A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.
    Type: Application
    Filed: August 28, 2018
    Publication date: June 18, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Toshihiko TAKEUCHI, Tsutomu MURAKAWA, Hiroki KOMAGATA, Daisuke MATSUBAYASHI, Noritaka ISHIHARA, Yusuke NONAKA
  • Patent number: 10658395
    Abstract: A semiconductor device which can suppress leakage current between a wiring and a connection electrode connected to a floating node is provided. The semiconductor device includes a first insulator, a first conductor over the first insulator, a second conductor over the first insulator, and a second insulator over the first insulator, the first conductor, and the second conductor. The first conductor and the second conductor contain a metal A (one kind or a plurality of kinds of aluminum, copper, tungsten, chromium, silver, gold, platinum, tantalum, nickel, molybdenum, magnesium, beryllium, indium, and ruthenium). The metal A is detected in an interface between the first insulator and the second insulator by an energy dispersive X-ray spectroscopy (EDX). The second insulator includes a groove for exposing the first insulator between the first conductor and the second conductor.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: May 19, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Tsutomu Murakawa, Kosei Nei, Hiroaki Honda, Yusuke Shino
  • Publication number: 20200135867
    Abstract: A semiconductor device includes a first conductor; a first insulator thereover; a first oxide thereover; a second oxide thereover; a second conductor and a third conductor that are separate from each other thereover; a third oxide over the first insulator, the second oxide, the second conductor, and the third conductor; a second insulator thereover; a fourth conductor thereover; and a third insulator over the first insulator, the second insulator, and the fourth conductor. The second oxide includes a region where the energy of the conduction band minimum of an energy band is low and a region where the energy of the conduction band minimum of the energy band is high. The energy of the conduction band minimum of the third oxide is higher than that of the region of the second oxide where the energy of the conduction band minimum is low. Side surfaces of the first oxide and the second oxide are covered with the third oxide.
    Type: Application
    Filed: January 2, 2020
    Publication date: April 30, 2020
    Inventors: Tsutomu MURAKAWA, Toshihiko TAKEUCHI, Hiroki KOMAGATA, Hiromi SAWAI, Yasumasa YAMANE, Shota SAMBONSUGE, Kazuya SUGIMOTO, Shunpei YAMAZAKI
  • Publication number: 20200105883
    Abstract: A highly integrated semiconductor device is provided. The semiconductor device includes an oxide semiconductor including a first region, a second region, a third region adjacent to the first region and the second region, and a fourth region adjacent to the second region; a first insulator over the oxide semiconductor; a first conductor over the first insulator; a second insulator over the oxide semiconductor, the first insulator, and the first conductor; a third insulator provided to overlap with a side surface of the first insulator and a side surface of the first conductor with the second insulator therebetween; a fourth insulator over the second insulator and the third insulator; and a second conductor in contact with the oxide semiconductor.
    Type: Application
    Filed: March 20, 2018
    Publication date: April 2, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Naoto YAMADE, Hiroshi FUJIKI, Tsutomu MURAKAWA, Toshihiko TAKEUCHI
  • Patent number: 10600875
    Abstract: A semiconductor device includes a first conductor; a first insulator thereover; a first oxide thereover; a second oxide thereover; a second conductor and a third conductor that are separate from each other thereover; a third oxide over the first insulator, the second oxide, the second conductor, and the third conductor; a second insulator thereover; a fourth conductor thereover; and a third insulator over the first insulator, the second insulator, and the fourth conductor. The second oxide includes a region where the energy of the conduction band minimum of an energy band is low and a region where the energy of the conduction band minimum of the energy band is high. The energy of the conduction band minimum of the third oxide is higher than that of the region of the second oxide where the energy of the conduction band minimum is low. Side surfaces of the first oxide and the second oxide are covered with the third oxide.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: March 24, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tsutomu Murakawa, Toshihiko Takeuchi, Hiroki Komagata, Hiromi Sawai, Yasumasa Yamane, Shota Sambonsuge, Kazuya Sugimoto, Shunpei Yamazaki
  • Publication number: 20180286886
    Abstract: A semiconductor device which can suppress leakage current between a wiring and a connection electrode connected to a floating node is provided. The semiconductor device includes a first insulator, a first conductor over the first insulator, a second conductor over the first insulator, and a second insulator over the first insulator, the first conductor, and the second conductor. The first conductor and the second conductor contain a metal A (one kind or a plurality of kinds of aluminum, copper, tungsten, chromium, silver, gold, platinum, tantalum, nickel, molybdenum, magnesium, beryllium, indium, and ruthenium). The metal A is detected in an interface between the first insulator and the second insulator by an energy dispersive X-ray spectroscopy (EDX). The second insulator includes a groove for exposing the first insulator between the first conductor and the second conductor.
    Type: Application
    Filed: March 19, 2018
    Publication date: October 4, 2018
    Inventors: Hajime KIMURA, Tsutomu MURAKAWA, Kosei NEI, Hiroaki HONDA, Yusuke SHINO
  • Publication number: 20180182894
    Abstract: To provide a highly reliable semiconductor device manufactured by giving stable electric characteristics to a semiconductor device including an oxide semiconductor. In a manufacturing process of a transistor, an oxide semiconductor layer, a source electrode layer, a drain electrode layer, a gate insulating film, a gate electrode layer, and an aluminum oxide film are formed in this order, and then heat treatment is performed on the oxide semiconductor layer and the aluminum oxide film, whereby an oxide semiconductor layer from which an impurity containing a hydrogen atom is removed and which includes a region containing oxygen more than the stoichiometric proportion is formed. In addition, when the aluminum oxide film is formed, entry and diffusion of water or hydrogen into the oxide semiconductor layer from the air due to heat treatment in a manufacturing process of a semiconductor device or an electronic appliance including the transistor can be prevented.
    Type: Application
    Filed: February 26, 2018
    Publication date: June 28, 2018
    Inventors: Yuhei SATO, Keiji SATO, Toshinari SASAKI, Tetsunori MARUYAMA, Atsuo ISOBE, Tsutomu MURAKAWA, Sachiaki TEZUKA
  • Patent number: 9960278
    Abstract: To provide a highly reliable semiconductor device manufactured by giving stable electric characteristics to a semiconductor device including an oxide semiconductor. In a manufacturing process of a transistor, an oxide semiconductor layer, a source electrode layer, a drain electrode layer, a gate insulating film, a gate electrode layer, and an aluminum oxide film are formed in this order, and then heat treatment is performed on the oxide semiconductor layer and the aluminum oxide film, whereby an oxide semiconductor layer from which an impurity containing a hydrogen atom is removed and which includes a region containing oxygen more than the stoichiometric proportion is formed. In addition, when the aluminum oxide film is formed, entry and diffusion of water or hydrogen into the oxide semiconductor layer from the air due to heat treatment in a manufacturing process of a semiconductor device or an electronic appliance including the transistor can be prevented.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: May 1, 2018
    Inventors: Yuhei Sato, Keiji Sato, Toshinari Sasaki, Tetsunori Maruyama, Atsuo Isobe, Tsutomu Murakawa, Sachiaki Tezuka
  • Publication number: 20180006124
    Abstract: A semiconductor device includes a first conductor; a first insulator thereover; a first oxide thereover; a second oxide thereover; a second conductor and a third conductor that are separate from each other thereover; a third oxide over the first insulator, the second oxide, the second conductor, and the third conductor; a second insulator thereover; a fourth conductor thereover; and a third insulator over the first insulator, the second insulator, and the fourth conductor. The second oxide includes a region where the energy of the conduction band minimum of an energy band is low and a region where the energy of the conduction band minimum of the energy band is high. The energy of the conduction band minimum of the third oxide is higher than that of the region of the second oxide where the energy of the conduction band minimum is low. Side surfaces of the first oxide and the second oxide are covered with the third oxide.
    Type: Application
    Filed: June 21, 2017
    Publication date: January 4, 2018
    Inventors: Tsutomu MURAKAWA, Toshihiko TAKEUCHI, Hiroki KOMAGATA, Hiromi SAWAI, Yasumasa YAMANE, Shota SAMBONSUGE, Kazuya SUGIMOTO, Shunpei YAMAZAKI
  • Publication number: 20170338349
    Abstract: A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V0 is supplied. Change in a potential VFN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, ? is a constant with a unit of time, and ? is a constant greater than or equal to 0.4 and less than or equal to 0.6.
    Type: Application
    Filed: May 3, 2017
    Publication date: November 23, 2017
    Inventors: Masashi TSUBUKU, Kazuaki OHSHIMA, Masashi FUJITA, Daigo SHIMADA, Tsutomu MURAKAWA
  • Patent number: 9825181
    Abstract: A transistor in which a change in characteristics is small is provided. A circuit, a semiconductor device, a display device, or an electronic device in which a change in characteristics of the transistor is small is provided. The transistor includes an oxide semiconductor; a channel region is formed in the oxide semiconductor; the channel region contains indium, an element M, and zinc; the element M is one or more selected from aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium; a gate insulator contains silicon and oxygen whose atomic number is 1.5 times or more as large as the atomic number of silicon; the carrier density of the channel region is higher than or equal to 1×109 cm?3 and lower than or equal to 5×1016 cm?3; and the energy gap of the channel region is higher than or equal to 2.7 eV and lower than or equal to 3.1 eV.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: November 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Kazuya Sugimoto, Tsutomu Murakawa, Motoki Nakashima, Shinpei Matsuda, Noritaka Ishihara, Daisuke Kurosaki, Toshimitsu Obonai, Hiroshi Kanemura, Junichi Koezuka
  • Publication number: 20170170326
    Abstract: A transistor in which a change in characteristics is small is provided. A circuit, a semiconductor device, a display device, or an electronic device in which a change in characteristics of the transistor is small is provided. The transistor includes an oxide semiconductor; a channel region is formed in the oxide semiconductor; the channel region contains indium, an element M, and zinc; the element M is one or more selected from aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium; a gate insulator contains silicon and oxygen whose atomic number is 1.5 times or more as large as the atomic number of silicon; the carrier density of the channel region is higher than or equal to 1×109 cm?3 and lower than or equal to 5×1016 cm?3; and the energy gap of the channel region is higher than or equal to 2.7 eV and lower than or equal to 3.1 eV.
    Type: Application
    Filed: December 9, 2016
    Publication date: June 15, 2017
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi TSUBUKU, Kazuya SUGIMOTO, Tsutomu MURAKAWA, Motoki NAKASHIMA, Shinpei MATSUDA, Noritaka ISHIHARA, Daisuke KUROSAKI, Toshimitsu OBONAI, Hiroshi KANEMURA, Junichi KOEZUKA
  • Patent number: 9647132
    Abstract: A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V0 is supplied. Change in a potential VFN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, ? is a constant with a unit of time, and ? is a constant greater than or equal to 0.4 and less than or equal to 0.6.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: May 9, 2017
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Masashi Tsubuku, Kazuaki Ohshima, Masashi Fujita, Daigo Shimada, Tsutomu Murakawa
  • Patent number: 9647152
    Abstract: A sensor circuit includes a transistor comprising an oxide semiconductor; a first circuit which supplies one of a first potential and a second potential; a first switch; a second switch; and a second circuit to which a current flowing between a source and a drain of the transistor is applied via the second switch when the first potential is applied to a gate of the transistor. The first potential is lower than a potential of the source or a potential of the drain of the transistor, and the second potential is higher than the potential of the source or the potential of the drain of the transistor. The first switch electrically connects the source and the drain of the transistor when the second potential is applied to the gate of the transistor, and electrically isolates them when the first potential is applied to the gate of the transistor.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: May 9, 2017
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun Koyama, Tomokazu Yokoi, Tsutomu Murakawa