Patents by Inventor Tsutomu Murakawa

Tsutomu Murakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9960278
    Abstract: To provide a highly reliable semiconductor device manufactured by giving stable electric characteristics to a semiconductor device including an oxide semiconductor. In a manufacturing process of a transistor, an oxide semiconductor layer, a source electrode layer, a drain electrode layer, a gate insulating film, a gate electrode layer, and an aluminum oxide film are formed in this order, and then heat treatment is performed on the oxide semiconductor layer and the aluminum oxide film, whereby an oxide semiconductor layer from which an impurity containing a hydrogen atom is removed and which includes a region containing oxygen more than the stoichiometric proportion is formed. In addition, when the aluminum oxide film is formed, entry and diffusion of water or hydrogen into the oxide semiconductor layer from the air due to heat treatment in a manufacturing process of a semiconductor device or an electronic appliance including the transistor can be prevented.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: May 1, 2018
    Inventors: Yuhei Sato, Keiji Sato, Toshinari Sasaki, Tetsunori Maruyama, Atsuo Isobe, Tsutomu Murakawa, Sachiaki Tezuka
  • Publication number: 20180006124
    Abstract: A semiconductor device includes a first conductor; a first insulator thereover; a first oxide thereover; a second oxide thereover; a second conductor and a third conductor that are separate from each other thereover; a third oxide over the first insulator, the second oxide, the second conductor, and the third conductor; a second insulator thereover; a fourth conductor thereover; and a third insulator over the first insulator, the second insulator, and the fourth conductor. The second oxide includes a region where the energy of the conduction band minimum of an energy band is low and a region where the energy of the conduction band minimum of the energy band is high. The energy of the conduction band minimum of the third oxide is higher than that of the region of the second oxide where the energy of the conduction band minimum is low. Side surfaces of the first oxide and the second oxide are covered with the third oxide.
    Type: Application
    Filed: June 21, 2017
    Publication date: January 4, 2018
    Inventors: Tsutomu MURAKAWA, Toshihiko TAKEUCHI, Hiroki KOMAGATA, Hiromi SAWAI, Yasumasa YAMANE, Shota SAMBONSUGE, Kazuya SUGIMOTO, Shunpei YAMAZAKI
  • Publication number: 20170338349
    Abstract: A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V0 is supplied. Change in a potential VFN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, ? is a constant with a unit of time, and ? is a constant greater than or equal to 0.4 and less than or equal to 0.6.
    Type: Application
    Filed: May 3, 2017
    Publication date: November 23, 2017
    Inventors: Masashi TSUBUKU, Kazuaki OHSHIMA, Masashi FUJITA, Daigo SHIMADA, Tsutomu MURAKAWA
  • Patent number: 9825181
    Abstract: A transistor in which a change in characteristics is small is provided. A circuit, a semiconductor device, a display device, or an electronic device in which a change in characteristics of the transistor is small is provided. The transistor includes an oxide semiconductor; a channel region is formed in the oxide semiconductor; the channel region contains indium, an element M, and zinc; the element M is one or more selected from aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium; a gate insulator contains silicon and oxygen whose atomic number is 1.5 times or more as large as the atomic number of silicon; the carrier density of the channel region is higher than or equal to 1×109 cm?3 and lower than or equal to 5×1016 cm?3; and the energy gap of the channel region is higher than or equal to 2.7 eV and lower than or equal to 3.1 eV.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: November 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Kazuya Sugimoto, Tsutomu Murakawa, Motoki Nakashima, Shinpei Matsuda, Noritaka Ishihara, Daisuke Kurosaki, Toshimitsu Obonai, Hiroshi Kanemura, Junichi Koezuka
  • Publication number: 20170170326
    Abstract: A transistor in which a change in characteristics is small is provided. A circuit, a semiconductor device, a display device, or an electronic device in which a change in characteristics of the transistor is small is provided. The transistor includes an oxide semiconductor; a channel region is formed in the oxide semiconductor; the channel region contains indium, an element M, and zinc; the element M is one or more selected from aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium; a gate insulator contains silicon and oxygen whose atomic number is 1.5 times or more as large as the atomic number of silicon; the carrier density of the channel region is higher than or equal to 1×109 cm?3 and lower than or equal to 5×1016 cm?3; and the energy gap of the channel region is higher than or equal to 2.7 eV and lower than or equal to 3.1 eV.
    Type: Application
    Filed: December 9, 2016
    Publication date: June 15, 2017
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi TSUBUKU, Kazuya SUGIMOTO, Tsutomu MURAKAWA, Motoki NAKASHIMA, Shinpei MATSUDA, Noritaka ISHIHARA, Daisuke KUROSAKI, Toshimitsu OBONAI, Hiroshi KANEMURA, Junichi KOEZUKA
  • Patent number: 9647132
    Abstract: A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V0 is supplied. Change in a potential VFN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, ? is a constant with a unit of time, and ? is a constant greater than or equal to 0.4 and less than or equal to 0.6.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: May 9, 2017
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Masashi Tsubuku, Kazuaki Ohshima, Masashi Fujita, Daigo Shimada, Tsutomu Murakawa
  • Patent number: 9647152
    Abstract: A sensor circuit includes a transistor comprising an oxide semiconductor; a first circuit which supplies one of a first potential and a second potential; a first switch; a second switch; and a second circuit to which a current flowing between a source and a drain of the transistor is applied via the second switch when the first potential is applied to a gate of the transistor. The first potential is lower than a potential of the source or a potential of the drain of the transistor, and the second potential is higher than the potential of the source or the potential of the drain of the transistor. The first switch electrically connects the source and the drain of the transistor when the second potential is applied to the gate of the transistor, and electrically isolates them when the first potential is applied to the gate of the transistor.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: May 9, 2017
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun Koyama, Tomokazu Yokoi, Tsutomu Murakawa
  • Publication number: 20160225772
    Abstract: A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V0 is supplied. Change in a potential VFN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, ? is a constant with a unit of time, and ? is a constant greater than or equal to 0.4 and less than or equal to 0.6.
    Type: Application
    Filed: January 27, 2016
    Publication date: August 4, 2016
    Inventors: Masashi TSUBUKU, Kazuaki OHSHIMA, Masashi FUJITA, Daigo SHIMADA, Tsutomu MURAKAWA
  • Patent number: 9236218
    Abstract: There is provided a defect inspection apparatus including: an electron scanning unit configured to scan a surface of a sample with an electron beam; a plurality of detectors arranged around an optical axis of the electron beam and configured to detect electrons emitted from the surface of the sample by scanning the electron beam; a signal processing unit configured to generate image data of the surface of the sample based on detection signals from the detectors; an analysis unit configured to detect a defect due to irregularities of the surface of the sample based on the image data; and a control unit configured to control a scanning speed of the electron beam depending on the type of the sample.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: January 12, 2016
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Tsutomu Murakawa, Isao Yonekura
  • Patent number: 9196743
    Abstract: Provided is a semiconductor device in which generation of a parasitic channel in an end region of an oxide semiconductor film is suppressed. The semiconductor device includes a gate electrode, an oxide semiconductor film, a source electrode and a drain electrode, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface of the source electrode and a second side surface of the drain electrode opposite to the first side surface. The oxide semiconductor film has an end region which does not overlap with the gate electrode. The end region which does not overlap with the gate electrode is positioned between a first region that is the nearest to one end of the first side surface and a second region that is the nearest to one end of the second side surface.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: November 24, 2015
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Masatoshi Yokoyama, Tsutomu Murakawa, Kenichi Okazaki, Masayuki Sakakura, Takuya Matsuo, Akihiro Oda, Shigeyasu Mori, Yoshitaka Yamamoto
  • Patent number: 9092042
    Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: July 28, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Inoue, Kiyoshi Kato, Shuhei Nagatsuka, Koichiro Kamata, Tsutomu Murakawa, Takahiro Tsuji, Kaori Ikada
  • Patent number: 8890859
    Abstract: Provided is a liquid crystal display device having a pixel including a transistor and a liquid crystal element and a protection circuit electrically connected to one of a source and a drain of the transistor through a data line. The protection circuit includes a first terminal supplied with a first power supply potential and a second terminal supplied with a second power supply potential higher than the first power supply potential. In a moving image display mode, an image signal is input from the data line to the liquid crystal element through the transistor, and the first power supply potential is set at the first potential. In a still image display mode, supply of the image signal is stopped, and the first power supply potential is set at the second potential. The second potential is substantially the same as the minimum value of the image signal.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: November 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kouhei Toyotaka, Hiroyuki Miyake, Ryo Arasawa, Koji Kusunoki, Tsutomu Murakawa
  • Publication number: 20140312224
    Abstract: A first differential image of a defect observation region including an observation target pattern is generated by a differential value between signals from electron detectors arranged in a direction of edges of the observation target pattern. A three-dimensional shape of a defect is obtained by subjecting the first differential image to integral process. Subsequently, a second differential image of a reference observation region, including a reference pattern having the same shape as the observation target pattern is generated by a differential value between signals from electron detectors arranged in a direction orthogonal to edges of the reference pattern. A three-dimensional shape of the reference pattern is obtained by subjecting the second differential image to the integral process. Then, a three-dimensional shape of the observation target pattern including the defect is obtained by combining the three-dimensional shapes of the defect and the reference pattern together.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 23, 2014
    Applicants: ADVANTEST CORPORATION, TOPPAN PRINTING CO. LTD.
    Inventors: Tsutomu Murakawa, Isao Yonekura, Shinya Morisaki
  • Publication number: 20140312225
    Abstract: There is provided a defect inspection apparatus including: an electron scanning unit configured to scan a surface of a sample with an electron beam; a plurality of detectors arranged around an optical axis of the electron beam and configured to detect electrons emitted from the surface of the sample by scanning the electron beam; a signal processing unit configured to generate image data of the surface of the sample based on detection signals from the detectors; an analysis unit configured to detect a defect due to irregularities of the surface of the sample based on the image data; and a control unit configured to control a scanning speed of the electron beam depending on the type of the sample.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 23, 2014
    Applicants: ADVANTEST CORPORATION, TOPPAN PRINTING CO., LTD.
    Inventors: Tsutomu Murakawa, Isao Yonekura
  • Publication number: 20140246667
    Abstract: A sensor circuit includes a transistor comprising an oxide semiconductor; a first circuit which supplies one of a first potential and a second potential; a first switch; a second switch; and a second circuit to which a current flowing between a source and a drain of the transistor is applied via the second switch when the first potential is applied to a gate of the transistor. The first potential is lower than a potential of the source or a potential of the drain of the transistor, and the second potential is higher than the potential of the source or the potential of the drain of the transistor. The first switch electrically connects the source and the drain of the transistor when the second potential is applied to the gate of the transistor, and electrically isolates them when the first potential is applied to the gate of the transistor.
    Type: Application
    Filed: February 26, 2014
    Publication date: September 4, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun KOYAMA, Tomokazu Yokoi, Tsutomu Murakawa
  • Publication number: 20140204073
    Abstract: Provided is a liquid crystal display device having a pixel including a transistor and a liquid crystal element and a protection circuit electrically connected to one of a source and a drain of the transistor through a data line. The protection circuit includes a first terminal supplied with a first power supply potential and a second terminal supplied with a second power supply potential higher than the first power supply potential. In a moving image display mode, an image signal is input from the data line to the liquid crystal element through the transistor, and the first power supply potential is set at the first potential. In a still image display mode, supply of the image signal is stopped, and the first power supply potential is set at the second potential. The second potential is substantially the same as the minimum value of the image signal.
    Type: Application
    Filed: March 19, 2014
    Publication date: July 24, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kouhei Toyotaka, Hiroyuki Miyake, Ryo Arasawa, Koji Kusunoki, Tsutomu Murakawa
  • Patent number: 8785926
    Abstract: The semiconductor conductor device includes a gate electrode 106, an oxide semiconductor film 110, a source electrode 114a and a drain electrode 114b, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface 214a of the source electrode and a second side surface 214b of the drain electrode opposite to the first side surface 214a. The oxide semiconductor film has a side surface which overlaps with the gate electrode, which has a first high resistance region positioned between a first region 206a that is the nearest to one end 314a of the first side surface 214a and a second region 206b that is the nearest to one end 314b of the second side surface 214b. The first high resistance region has a corrugated side surface or the like.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: July 22, 2014
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Masatoshi Yokoyama, Tsutomu Murakawa, Kenichi Okazaki, Masayuki Sakakura, Takuya Matsuo, Yosuke Kanzaki, Hiroshi Matsukizono, Yoshitaka Yamamoto
  • Patent number: 8698081
    Abstract: The pattern inspection apparatus includes: an irradiator irradiating a sample with an electron beam; an electron detector detecting an amount of electrons generated on the sample having a pattern formed thereon, by the irradiation of the electron beam; an image processor generating a SEM image of the pattern on the basis of the electron amount; and a controller acquiring defect position information on the pattern formed on the sample from an optical defect inspection device. The controller specifies a defect candidate pattern from the SEM image on the basis of the defect position information and judges whether a defect in the defect candidate pattern is to be transferred onto a wafer. The controller determines a view field of the SEM image on the basis of the defect position information and specifies the defect candidate pattern from image information on patterns displayed in the view field.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: April 15, 2014
    Assignee: Advantest Corp.
    Inventors: Takayuki Nakamura, Tsutomu Murakawa
  • Patent number: 8692823
    Abstract: Provided is a liquid crystal display device having a pixel including a transistor and a liquid crystal element and a protection circuit electrically connected to one of a source and a drain of the transistor through a data line. The protection circuit includes a first terminal supplied with a first power supply potential and a second terminal supplied with a second power supply potential higher than the first power supply potential. In a moving image display mode, an image signal is input from the data line to the liquid crystal element through the transistor, and the first power supply potential is set at the first potential. In a still image display mode, supply of the image signal is stopped, and the first power supply potential is set at the second potential. The second potential is substantially the same as the minimum value of the image signal.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: April 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kouhei Toyotaka, Hiroyuki Miyake, Ryo Arasawa, Koji Kusunoki, Tsutomu Murakawa
  • Patent number: 8675948
    Abstract: A mask inspection apparatus includes irradiation means for irradiating a sample with an electron beam, electron detection means for detecting a quantity of electrons generated from the sample having a pattern formed thereon by the irradiation with the electron beam, image processing means for generating image data of the pattern on the basis of the quantity of the electrons, and control means for creating a line profile and a differential profile of the pattern formed on the sample on the basis of the quantity of the electrons detected by the electron detection means. The control means detects a rising edge and a falling edge of the pattern on the basis of the differential profile, and then generates mask data of a multi-level structure on the basis of data of the edges and the image data created by the image processing means.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: March 18, 2014
    Assignee: Advantest Corp.
    Inventors: Yoshiaki Ogiso, Tsutomu Murakawa