Patents by Inventor Tsutomu Murakawa

Tsutomu Murakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100181985
    Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 22, 2010
    Inventors: Hiroki Inoue, Kiyoshi Kato, Shuhei Nagatsuka, Koichiro Kamata, Tsutomu Murakawa, Takahiro Tuji, Kaori Ikada
  • Publication number: 20090140053
    Abstract: A semiconductor device in which damages to an element such as a transistor are reduced even when external force such as bending is applied and stress is generated in the semiconductor device. The semiconductor device includes a first island-like reinforcement film over a substrate having flexibility; a semiconductor film including a channel formation region and an impurity region over the first island-like reinforcement film; a first conductive film over the channel formation region with a gate insulating film interposed therebetween; a second island-like reinforcement film covering the first conductive film and the gate insulating film.
    Type: Application
    Filed: November 21, 2008
    Publication date: June 4, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yuugo GOTO, Tsutomu MURAKAWA
  • Patent number: 4598679
    Abstract: A fuel control system for a motor vehicle has an accelerator pedal switch for detecting deceleration of the vehicle, an engine speed detecting circuit for detecting high engine speed and low engine speed. The system has gate circuits responsive to the outputs of the accelerator pedal switch and engine speed detecting circuit at high engine speed for producing a signal for cutting off fuel supplied to cylinders of the engine, and to responsive to the output of the engine speed detecting circuit at low engine speed for intermittently supplying the fuel and thereafter for continuously supplying the fuel.
    Type: Grant
    Filed: May 13, 1985
    Date of Patent: July 8, 1986
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Hiroya Ohkumo, Tsutomu Murakawa