Patents by Inventor Tsutomu Takahashi

Tsutomu Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6169698
    Abstract: Drop in the power supply level right after change can be suppressed greatly when changing the power to the internal power supply voltage from the external power supply voltage of an overdrive system. Voltage generating circuit VG0 is connected to the VDL line which raises the VDL line to a voltage higher than VDL beforehand prior to changing to internal power supply voltage VDL from external power supply voltage VDD, and restores the VDL line voltage which drops after the change to VDL.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: January 2, 2001
    Assignees: Texas Instruments Incorporated, Hitachi, Ltd.
    Inventors: Shunichi Sukegawa, Shinji Bessho, Masayuki Hira, Yasushi Takahashi, Tsutomu Takahashi, Koji Arai
  • Patent number: 6155338
    Abstract: First heat transfer plates S1 and second heat transfer plates S2 folded along crest folding lines L1 and valley folding lines L2 are bonded to an inner periphery of an outer casing 6 and an outer periphery of an inner casing 7, so that the first and second heat transfer plates S1 and S2 are disposed radiately, thereby forming combustion gas passages and air passages circumferentially alternately. One end of both the combustion gas passages and the air passages is cut into an angle shape, and one side and the other side of the angle shape are closed to form combustion gas passage inlets 11 and air passage outlets 16. In a similar manner, combustion gas passage outlets 12 and air passage inlets 15 are formed at the other end of the combustion gas passages and the air passages. Thus, it is possible to provide a heat exchanger which has a simple structure and is easy to manufacture, and in which the pressure loss due to bending of flow paths can be suppressed to the minimum.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: December 5, 2000
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Tsuneo Endou, Tsutomu Takahashi, Hideyuki Yanai, Toshiki Kawamura, Tokiyuki Wakayama
  • Patent number: 6121171
    Abstract: Provided is a composite film comprising a continuous phase of para-oriented aromatic polyamide and a phase of low-dielectric resin, said film having a dielectric constant at 1 MHz of not more than 3.2 and a linear thermal expansion coefficient at 200 to 300.degree. C. of within .+-.50.times.10.sup.-6 /.degree.C. The composite film has characteristics such as a low dielectric constant, favorable mechanical strength, homogeneous structure, light weight, and a low linear thermal expansion coefficient, and the film is useful as a base substrate for a flexible printed circuit board.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: September 19, 2000
    Assignee: Sumitomo Chemical Company, Ltd.
    Inventors: Tsutomu Takahashi, Hiroaki Kumada
  • Patent number: 6097648
    Abstract: An equalizer control line BLEQ shared by all sense amplifiers SA in each row in each submat SM is connected to a first equalizer control line driver consisting of P-type MOS transistors installed at the left end of the submat SM and is connected to several second equalizer control line drivers 32 consisting of N-type MOS transistors installed by dividing in a cross area 16 of each row through which the equalizer control line BLEQ passes. In order to turn on the equalizers of the bit line pair connected to each sense amplifier S, the first equalizer control line driver is operated to drive the equalizer control line BLEQ to the H level potential. In order to turn off the equalizers of each bit line pair, the second equalizer control line drivers 32 are operated to drive the equalizer control line BLEQ to the L level potential. The first and second equalizer control line drivers are complementarily operated. One of them is driven, and the other is turned off (blocked).
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: August 1, 2000
    Assignees: Texas Instruments Incorporated, Hitachi, Ltd.
    Inventors: Shinji Bessho, Shunichi Sukegawa, Masayuki Hira, Yasushi Takahashi, Tsutomu Takahashi, Koji Arai
  • Patent number: 6081663
    Abstract: An information processing apparatus comprises: a memory to store emulation information which is designated from a host computer that is connected to a printer via a general parallel interface; a judging circuit to judge a delimiter of print data; and a control unit to switch the emulation on the basis of the emulation information stored in the memory and the result of the judgment by the judging circuit. When each section of the apparatus is in the inoperative state, they are set into the power saving mode and are sequentially controlled. Thus, the power saving of the whole apparatus can be realized.
    Type: Grant
    Filed: July 24, 1995
    Date of Patent: June 27, 2000
    Inventors: Tsutomu Takahashi, Naohisa Suzuki, Koji Fukunaga, Jiro Tateyama, Jun Oida
  • Patent number: 6052573
    Abstract: An off-hook/on-hook signal discriminating means 5a is provided in a control portion 5 of the FSU in order to make discrimination between a pulse dial signal and a hooking signal. When a telephone turns to an off-hook state after an on-hook state and turns to an on-hook state again and the on-hook state is continued for a predetermined time, the FSU performs a terminating process so as to be returned into a standby state. When an off-hook signal is detected again in a time smaller than a predetermined time, the FSU recognizes that the signal is either a dial pulse signal or a hooking signal, and the off-hook/on-hook signal discriminating means 5a monitors the time required for detecting an on-hook signal again. When the time required for detecting an on-hook signal again is smaller than the predetermined time, the FSU decides that the signal is a dial pulse signal, and controls a tone generating circuit 7f to stop the dial tone.
    Type: Grant
    Filed: May 5, 1998
    Date of Patent: April 18, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadashi Ohmori, Tsutomu Takahashi
  • Patent number: 6049499
    Abstract: To reduce both the noise level according to separation or short-circuitng of the electrical supply line of the sense amplifiers and the electrical supply line of the word line driving circuit and to effectively prevent destruction of the stored data in the nonselecteded memory cell. Electrical supply line (Vssw) of the power supply voltage with respect to word line driving circuit (SWD) and electrical supply line (Vssa) of power supply voltage with respect to sense amplifier driving circuit (SAD) are arranged separately in memory array area 2 (e.g., in the space in the row direction of memory array (SMAx,y)) and connected to shared electrical supply wiring (Vsso) within peripheral circuit area 3.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: April 11, 2000
    Assignees: Texas Instruments Incorporated, Hitachi, Ltd.
    Inventors: Shunichi Sukegawa, Shinji Bessho, Masayuki Hira, Yasushi Takahashi, Tsutomu Takahashi, Koji Arai
  • Patent number: 6036326
    Abstract: A resinous member with a character visually arranged therein, including a resinous body, a character formed by a laser beam machining on a surface of the body, and a light transmittable coating arranged on the surface of the body for covering at least the character. The light transmittable coating is provided with a generally uniform thickness to form a roughened outer surface substantially corresponding to a machined surface of the character. The light transmittable coating may be formed through a spray coating process. The resinous member may be used as a key top member of a key in a keyboard of an electronic machine. The key top member comprises a resinous body, a character arranged on a surface of the body, and optical means arranged in association with the character for highlighting the character in an optical manner using an external light. The optical means may comprise a phosphorescent or fluorescent member.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: March 14, 2000
    Assignee: Fujitsu Takamisawa Component Limited
    Inventors: Hiroshi Yoshikawa, Tsutomu Takahashi, Tamotsu Koike
  • Patent number: 6038158
    Abstract: The objective is to realize a semiconductor memory capable of avoiding an increase in the load of the sense amplifiers, easily realizing a large capacity and high integration of the memory, reducing the current consumption by the bit lines, and improving the access speed. Because the levels of the selection signal lines SHUS1, SHUE1, SHDS1, and SHDE1 are set by the control circuit, only one of the aforementioned four selection signal lines is selected at the time of memory access, other selection signal lines are held in unselect status, and the sense amplifiers in the sense amplifier bank SB1a and prescribed bit line pairs or extended bit line pairs are connected to each other by response in order to carry out read or write; thus, the load of the sense amplifiers can be reduced, and high speed, large capacity, and high integration can be achieved.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: March 14, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Shinji Bessho, Shunichi Sukegawa, Masayuki Hira, Yasushi Takahashi, Tsutomu Takahashi, Kohji Arai
  • Patent number: 6033765
    Abstract: The present invention provides a printed circuit substrate comprising a lightweight prepreg and a conductive layer. The prepeg having uniform formation, low linear thermal expansion coefficient and good mechanical strength, comprising a porous para-oriented aromatic polyamide film and a thermoplastic resin and/or a thermosetting resin, the porous para-oriented aromatic polyamide film being impregnated with the thermoplastic resin and/or the thermosetting resin, a process for producing the same, and a printed circuit substrate/board using the same.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: March 7, 2000
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Tsutomu Takahashi, Yoshifumi Tsujimoto, Hiroaki Kumada, Hiroyuki Sato
  • Patent number: 6031779
    Abstract: Described herein is a dynamic memory. An N channel type voltage clamp MOSFET is provided which has a drain supplied with a supply voltage supplied from an external terminal, a gate to which a boosted constant voltage is applied, and a source which outputs a constant voltage. The clamp voltage outputted from the source of the voltage clamp MOSFET is supplied to a common source line for each of P channel type amplification MOSFETs constituting a sense amplifier via a P channel type first power MOSFET switch-controlled by a sense amplifier activation signal, as a voltage for operating the sense amplifier. Further, the constant voltage outputted from the source of the voltage clamp MOSFET is supplied to an N-well region in which the P channel type first power MOSFET and the P channel type MOSFETs constituting the sense amplifier are formed, as a bias voltage.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: February 29, 2000
    Assignees: Hitachi, Ltd., Texas Instruments Incorporated
    Inventors: Yasushi Takahashi, Tsutomu Takahashi, Kouji Arai, Tsugio Takahashi, Shunichi Sukegawa, Shinji Bessho, Masayuki Hira
  • Patent number: 6002162
    Abstract: Realizing a reduction of the layout surface area by rendering unnecessary the region used for well isolation. In this DRAM, a triple well construction is used, and all of the regions for the unit memory cell array MA, the word line driver bank WDB, the sense amplifier bank SAB, and the cross area CR are surrounded by a lower layer N-type deep (deep layer) well 12. A back bias VPP corresponding to the power supply voltage of the word line driver is applied to the N well 14, and a back bias VBB corresponding to the characteristics of the memory cell are applied to the P well 16. In the N well 14, in regard to the P-type MOS transistors of the sense amplifier that undergo the substrate bias effect due to the back bias VPP, the threshold voltage is set to a low value so as to cancel that bias effect.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: December 14, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Yasushi Takahashi, Tsutomu Takahashi, Koji Arai, Shinji Bessho, Shunichi Sukegawa, Masayuki Hira
  • Patent number: 5970010
    Abstract: Controlling the timing for the overdrive of the sense amplifiers in response to the wiring length between the sense amplifiers and the power supply voltage supply nodes, and designing a reduction of the power consumption by preventing excessive overdrive of the bit lines.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: October 19, 1999
    Assignees: Texas Instruments Incorporated, Hitachi, Ltd.
    Inventors: Masayuki Hira, Shunichi Sukegawa, Shinji Bessho, Yasushi Takahashi, Koji Arai, Tsutomu Takahashi, Tsugio Takahashi
  • Patent number: 5949449
    Abstract: A printing method is for printing per line by driving a printing head to travel in the main scanning direction. This printing head is provided with a plurality of printing elements arranged in the direction almost but not exactly perpendicular to the main scanning direction. In this method, when the printing head is driven to travel in a speed faster or slower than the standard speed for the usual printing operation, the number of printing elements of the printing head to be used for printing is reduced, hence making it possible to provide a printing apparatus and method capable of reducing the difference in printing quality to be caused by the application of plural printing speeds without changing the driving conditions of the printing head.
    Type: Grant
    Filed: July 11, 1995
    Date of Patent: September 7, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tsutomu Takahashi
  • Patent number: 5873738
    Abstract: A communication apparatus is provided which permits system configuration to be freely changed even after electronic circuit boards are mounted to a shelf. The apparatus is a combination of an open rack and a shelf mounted on the rack, office cables for interconnecting external electronic devices are guided toward the rear of the apparatus and connected directly to external connectors of the electronic circuit boards, and a back wiring board is arranged on the rear surface of the shelf and has sheet connectors to which power supply connectors of the electronic circuit boards are connected.
    Type: Grant
    Filed: November 2, 1994
    Date of Patent: February 23, 1999
    Assignee: Fujitsu Limited
    Inventors: Shozo Shimada, Noboru Nakama, Tsutomu Takahashi, Hiroshi Kadoya, Junichi Hayama
  • Patent number: 5869951
    Abstract: A battery monitoring routine is executed at a short period such as one minute as an initial value when a key switch is turned on to drive an electric vehicle (so that the battery is discharged). On the other hand, when the key switch is turned off to stop or park the electric vehicle so that the battery is released open from discharge, the battery monitoring routine is executed at a short period such as one minute to measure the battery data finely within a specified time such as 30 minutes, but at a long period such as one hour to measure the battery data coarsely after the specified time such as 30 minutes to save monitoring power. The battery deterioration can be monitored by measuring the restoration status of the battery after released open from discharge, for recharging or replacement of the battery.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: February 9, 1999
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventor: Tsutomu Takahashi
  • Patent number: 5856426
    Abstract: A para-oriented polyamide porous film comprising a fibril having a diameter of not more than 1.mu., with fibrils planarly arranged as a network or nonwoven fabric and laminated in a layer, the thermal linear expansion coefficient at 200.degree.-300.degree. C. within .+-.50.times.10.sup.-6 /.degree.C. and 30-95% vacant spaces. Also, a battery separator using the porous film. Also, a production process of: (a) forming a film-like material from a solution containing 1-10% of a para-oriented aromatic polyamide having an inherent viscosity of 1.0-2.8 dl/g and 1-10% of a chloride of an alkali metal or an alkali earth metal in a polar amide or polar urea solvent; (b) maintaining the film-like material at not less than 20.degree. C. and not more than -5.degree. C.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: January 5, 1999
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Tsutomu Takahashi, Tatsuo Tateno, Yoshifumi Tsujimoto
  • Patent number: 5851646
    Abstract: The present invention provides a lightweight prepreg having uniform formation, low linear thermal expansion coefficient and good mechanical strength, comprising a porous para-oriented aromatic polyamide film and a thermoplastic resin and/or a thermosetting resin, the porous para-oriented aromatic polyamide film being impregnated with the thermoplastic resin and/or the thermosetting resin, a process for producing the same, and a printed circuit substrate/board using the same.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: December 22, 1998
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Tsutomu Takahashi, Yoshifumi Tsujimoto, Hiroaki Kumada, Hiroyuki Sato
  • Patent number: 5848042
    Abstract: An apparatus for recording and/or reproducing a recording medium, for example, an optical disk, a tape cassette or the like, has an apparatus body having an opening in the front surface side thereof, a front panel and a guard plate. The apparatus body includes therein a recording and/or reproducing unit for recording and/or reproducing the recording medium. The recording medium is inserted into the apparatus body or discharged from the apparatus body through the opening. The front panel is rotatively provided at the front surface side of said apparatus body. The front panel is rotated between a first position for closing the opening and a second position for opening the opening. The guard plate projects to a position for covering a portion of the front panel when the front panel has been rotated from the first position to the second position.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: December 8, 1998
    Assignee: Sony Corporation
    Inventors: Tsutomu Takahashi, Shinichi Kojima, Tsuyoshi Ohba
  • Patent number: 5838886
    Abstract: A printing method and apparatus according to the present invention is capable of instructing whether or not a printing portion is used in a case where data is received from a host so as to be printed, and the initializing control required to perform printing can be skipped at the time of power supply if the printing portion is not used, or arranged to store a fact whether or not initialization has been performed so that whether or not the initialization is performed is controlled at the time of the power supply or when a printing opportunity has been issued.
    Type: Grant
    Filed: September 30, 1992
    Date of Patent: November 17, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tsutomu Takahashi, Susumu Takase, Naohisa Suzuki, Koji Fukunaga, Masaki Nishiyama, Jiro Tateyama, Hisatsugu Naito