Patents by Inventor Tsuyoshi Takeda

Tsuyoshi Takeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150303051
    Abstract: Provided is a technique of forming a film containing a first element and a second element on a substrate by performing a cycle a predetermined number of times. The cycle includes: (a) supplying a hydro-based precursor containing the first element and a halogen-based precursor containing the second element into a process chamber accommodating a substrate to confine the hydro-based precursor and the halogen-based precursor in the process chamber; (b) maintaining a state where the hydro-based precursor and the halogen-based precursor are confined in the process chamber; and (c) exhausting the process chamber.
    Type: Application
    Filed: March 27, 2015
    Publication date: October 22, 2015
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Tsuyoshi TAKEDA
  • Publication number: 20150294854
    Abstract: A semiconductor device manufacturing method includes: accommodating a substrate in a processing chamber; and supplying a silicon-based gas and an amine-based gas into the processing chamber that is heated to form a film including silicon and carbon on the substrate. The forming of the film including silicon and carbon includes: supplying the silicon-based gas and the amine-based gas into the processing chamber and confining the silicon-based gas and the amine-based gas in the processing chamber; maintaining a state in which the silicon-based gas and the amine-based gas are confined in the processing chamber, and exhausting an inside of the processing chamber.
    Type: Application
    Filed: June 23, 2015
    Publication date: October 15, 2015
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tsuyoshi TAKEDA, Taketoshi SATO
  • Publication number: 20150271924
    Abstract: A wiring method is provided in which an insulating layer is formed on a surface of a semiconductor device 1 of which a plurality of connecting terminals are exposed, a resin film is formed on a surface of the insulating layer, a groove of a depth equal to or exceeding a thickness of the resin film is formed from a surface side of the resin film so that the groove passes in a vicinity of connecting terminals that are to be connected, and furthermore communicating holes which reach the connecting terminals to be connected from this portion that groove passes in the vicinity thereof are formed.
    Type: Application
    Filed: June 8, 2015
    Publication date: September 24, 2015
    Inventors: Shingo YOSHIOKA, Hiroaki FUJIWARA, Hiromitsu TAKASHITA, Tsuyoshi TAKEDA, Yuko KONNO
  • Patent number: 9111748
    Abstract: A method of manufacturing a semiconductor device includes forming thin films on substrates by performing a cycle a predetermined number of times. The cycle includes: supplying a process gas into a process container and confining the gas in the container including an outer reaction tube and an inner reaction tube having a flat top inner surface at an upper end portion covering a portion of a top surface of the support arranging and supporting the substrates and including a communication section connecting an inside of the inner reaction tube to an inside of the outer reaction tube, wherein the communication section is disposed at a region other than a region horizontally encompassing a substrate arrangement region; maintaining a state where the gas is confined in the container; and exhausting the gas from the container via the communication section and a space between the inner and outer reaction tubes.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: August 18, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Daigo Yamaguchi, Tsuyoshi Takeda, Taketoshi Sato, Hidenari Yoshida
  • Patent number: 9090969
    Abstract: A semiconductor device manufacturing method includes: accommodating a substrate in a processing chamber; and supplying a silicon-based gas and an amine-based gas into the processing chamber that is heated to form a film including silicon and carbon on the substrate. The forming of the film including silicon and carbon includes: supplying the silicon-based gas and the amine-based gas into the processing chamber and confining the silicon-based gas and the amine-based gas in the processing chamber; maintaining a state in which the silicon-based gas and the amine-based gas are confined in the processing chamber, and exhausting an inside of the processing chamber.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: July 28, 2015
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tsuyoshi Takeda, Taketoshi Sato
  • Publication number: 20150200104
    Abstract: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.
    Type: Application
    Filed: March 25, 2015
    Publication date: July 16, 2015
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Arito OGAWA, Tsuyoshi TAKEDA
  • Publication number: 20150200103
    Abstract: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.
    Type: Application
    Filed: March 25, 2015
    Publication date: July 16, 2015
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Arito OGAWA, Tsuyoshi TAKEDA
  • Publication number: 20150200102
    Abstract: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.
    Type: Application
    Filed: March 25, 2015
    Publication date: July 16, 2015
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Arito OGAWA, Tsuyoshi TAKEDA
  • Patent number: 9082438
    Abstract: One aspect of the present invention is a three-dimensional structure that has a concave-convex form including a gutter for wiring having at least partially a width of 20 ?m or less, wherein at least a part of a wiring conductor is embedded in the gutter for wiring, and a wiring that extends in such a manner as to creep along the concave-convex form is provided.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: July 14, 2015
    Assignee: PANASONIC CORPORATION
    Inventors: Shingo Yoshioka, Hiroaki Fujiwara, Hiromitsu Takashita, Tsuyoshi Takeda
  • Patent number: 9082635
    Abstract: A wiring method is provided in which an insulating layer is formed on a surface of a semiconductor device 1 of which a plurality of connecting terminals are exposed, a resin film is formed on a surface of the insulating layer, a groove of a depth equal to or exceeding a thickness of the resin film is formed from a surface side of the resin film so that the groove passes in a vicinity of connecting terminals that are to be connected, and furthermore communicating holes which reach the connecting terminals to be connected from this portion that groove passes in the vicinity thereof are formed.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: July 14, 2015
    Assignee: PANASONIC CORPORATION
    Inventors: Shingo Yoshioka, Hiroaki Fujiwara, Hiromitsu Takashita, Tsuyoshi Takeda, Yuko Konno
  • Patent number: 9082825
    Abstract: One aspect of the present invention resides in a manufacturing method for a semiconductor package, including a covering step of forming a covering insulating layer that covers the surface of a semiconductor element, a film-forming step of forming a resin film on the surface of the covering insulating layer, a circuit pattern-forming step of forming a circuit pattern portion including recesses reaching the surfaces of electrodes of the semiconductor element and a circuit groove having a desired shape and a desired depth, a catalyst-depositing step of depositing a plating catalyst or a precursor thereof on the surface of the circuit pattern portion, a film-separating step of separating the resin film from the covering insulating layer, and a plating processing step of forming a circuit electrically connected to the electrodes, by applying electroless plating to the covering insulating layer, from which the resin film is separated.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: July 14, 2015
    Assignee: PANASONIC CORPORATION
    Inventors: Hiromitsu Takashita, Tsuyoshi Takeda, Keiko Kashihara, Hiroaki Fujiwara, Shingo Yoshioka
  • Patent number: 9070393
    Abstract: One aspect of the present invention is a three-dimensional structure in which a wiring is formed on a surface, the three-dimensional structure having an insulating resin layer that contains a filler formed from at least one element selected from typical non-metal elements and typical metal elements, wherein a recessed gutter for wiring is formed on a surface of the insulating resin layer, and at least a part of a wiring conductor is embedded in the recessed gutter for wiring.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: June 30, 2015
    Assignee: PANASONIC CORPORATION
    Inventors: Shingo Yoshioka, Hiroaki Fujiwara, Hiromitsu Takashita, Tsuyoshi Takeda
  • Publication number: 20150156873
    Abstract: A circuit board includes an electric circuit having a wiring section and a pad section in the surface of an insulating base substrate. The electric circuit is configured such that a conductor is embedded in a circuit recess formed in the surface of the insulating base substrate, and the surface roughness of the conductor is different in the wiring section and the pad section of the electric circuit. In this case, it is preferable that the surface roughness of the conductor in the pad section is greater than the surface roughness of the conductor in the wiring section.
    Type: Application
    Filed: November 26, 2014
    Publication date: June 4, 2015
    Inventors: Shingo YOSHIOKA, Hiroaki FUJIWARA, Hiromitsu TAKASHITA, Tsuyoshi TAKEDA
  • Publication number: 20150132607
    Abstract: Flame retardant synthetic leather having high flame retardancy and excellent physical properties (light resistance, heat resistance and feeling). The flame retardant synthetic leather contains an organic phosphorus compound (component A) represented by the following formula (1). (In the formula, X1 and X2 are the same or different and each an aromatic substituted alkyl group represented by the following formula (2).) —(AL)—(Ar)n ??(2) (In the formula, AL is a branched or linear aliphatic hydrocarbon group having 1 to 5 carbon atoms, and Ar is a phenyl group, riaphthyl group or anthryl group, all of which may have a substituent. “n” is an integer of 1 to 3, and Ar may be bonded to any carbon atom contained in AL.
    Type: Application
    Filed: June 7, 2013
    Publication date: May 14, 2015
    Applicants: TEIJIN LIMITED, MARUBISHI OIL CHEMICAL CO., LTD.
    Inventors: Katsuhiro Yamanaka, Tsuyoshi Takeda, Kuniaki Kondo, Masaki Haruyoshi
  • Patent number: 9018340
    Abstract: A copolycarbonate that is derived from a renewable resource, is excellent in heat resistance, flowability and transparency, and prevented from undergoing a dimensional change by water absorption and coloring during molding as well as a transparent molded article obtained therefrom. The copolycarbonate contains predetermined amounts of a unit (A) constituted of an ether diol residue represented by the formula (1), a unit (B) constituted of a bisphenol residue represented by the formula (2), and a unit (C) constituted of another diol residue, wherein the ratio of terminal groups falls within the ranges of the expressions (i) and (ii).
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: April 28, 2015
    Assignee: Teijin Limited
    Inventors: Tsuyoshi Takeda, Tetsuya Motoyoshi, Hiroshi Okamoto
  • Patent number: 9012323
    Abstract: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: April 21, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Arito Ogawa, Tsuyoshi Takeda
  • Patent number: 8951912
    Abstract: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: February 10, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Arito Ogawa, Tsuyoshi Takeda
  • Publication number: 20150034366
    Abstract: One aspect of the present invention relates to a circuit board including an insulating base substrate; and a circuit layer that is formed of a conductor and that is provided on the surface of the insulating base substrate, wherein the insulating base substrate has a smooth surface having a surface roughness Ra of 0.5 ?m or less, and the conductor is at least partially embedded in a wiring groove formed in the surface of the insulating base substrate.
    Type: Application
    Filed: September 9, 2014
    Publication date: February 5, 2015
    Inventors: Shingo YOSHIOKA, Hiroaki FUJIWARA, Hiromitsu TAKASHITA, Tsuyoshi TAKEDA
  • Publication number: 20150035202
    Abstract: The present invention relates to a manufacturing method of a molded article, including: a molded article forming step of forming a molded article by curing a resin composition on a main surface, on the side of a bendable first supporting medium, of a laminated supporting medium obtained by laminating the first supporting medium and a second supporting medium that is harder than the first supporting medium; a second-supporting medium peeling step of peeling the second supporting medium from the first supporting medium after the molded article forming step; and a first-supporting medium peeling step of peeling the first supporting medium from the molded article while bending the first supporting medium after the second-supporting medium peeling step. The shape of the first supporting medium can be maintained at a curing temperature at which the resin composition is cured in the molded article forming step.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Inventors: Tsuyoshi TAKEDA, Hiromitsu TAKASHITA, Keiko KASHIHARA, Shingo YOSHIOKA
  • Publication number: 20150038036
    Abstract: A flameproofing agent for fibers which has high flameproofness and excellent physical properties (light resistance, heat resistance, texture), a process for manufacturing a flameproof fiber product and a flameproof fiber product. The flameproofing agent comprises an organic phosphorus compound (component A) represented by the following formula (1). (In the above formula, X1 and X2 are the same or different and each an aromatic substituted alkyl group represented by the following formula (2).) ?AL??Ar)n??(2) (In the above formula, AL is a branched or linear aliphatic hydrocarbon group having 1 to 5 carbon atoms, Ar is a phenyl group, naphthyl group or anthryl group all of which may have a substituent, “n” is an integer of 1 to 3, and Ar may be bonded to any carbon atom contained in AL.
    Type: Application
    Filed: March 26, 2013
    Publication date: February 5, 2015
    Applicants: TEIJIN LIMITED, MARUBISHI OIL CHEMICAL CO., LTD.
    Inventors: Katsuhiro Yamanaka, Tsuyoshi Takeda, Kuniaki Kondo, Masaki Haruyoshi