Abstract: Disclosed is a sealing detection mechanism for detecting sealing of a closure fastened to a container having a top open end. The sealing detection mechanism includes a RFID tag mounted at a selected position of the closure, at least one operable tear portion formed at the closure, and at least one conductive unit electrically connected to the RFID tag and extended from the RFID tag to the closure to form a conductive circuit loop across the operable tear portion of the closure. A sealing guarantee device mounted is selectively mounted between the top open end of the container and the closure, which includes an upper portion, a lower portion, and a middle portion connected between the upper portion and the lower portion. The lower portion of the sealing guarantee device is provided with an annular flange protruding downward from the lower portion and a hollow portion between the lower portion and the flange.

Abstract: A method for manufacturing a semiconductor package is proposed. A circuit board with a circuit layer on at least one surface thereof is provided. The circuit board has at least one free area, and the circuit layer has a plurality of electrically connecting pads distributed on the periphery of the free area. A metal protecting layer is plated on the electrically connecting pads by non-plating line. The free area is removed, to form a cavity penetrating the circuit board. The present invention prevents burrs which may otherwise form on the periphery of a cavity, to increase the yield and throughput.

Abstract: A method for manufacturing a circuit board for a semiconductor package is proposed. The method includes providing a circuit board having a circuit layer formed on at least one surface thereof, wherein the circuit board is defined with at least one predetermined area, the circuit layer includes a plurality of electrically conductive pads and conductive wires for electroplating and being connected with the electrically conductive pads, the conductive wires are formed within the predetermined area, and a metal protecting layer formed to cover the electrically conductive pads and the conductive wires; removing the portion of the metal protecting layer and the conductive wires covered by the portion of the metal protecting layer to electrically disconnect the electrically conductive pads from the conductive wires; and removing the predetermined area to form a through hole in the circuit board. Thus, formation of burrs in the metal protecting layer can be prevented after formation of the through hole.

Abstract: A substrate structure of a semiconductor package is proposed. The structure includes a substrate with at least one opening; a grounding ring formed on the substrate and around the opening; and a plurality of plating through holes (PTH) formed in the substrate and corresponding to the grounding ring. The grounding area is increased by the grounding ring, so that the grounding quality of the substrate in package is improved. Meanwhile, it also simplifies the process, increases process yield and reduces cost of the process.

Abstract: A circuit board structure and a method for fabricating the same are proposed in the present invention. Firstly, a core layer covered with a first metal layer on a surface thereof is provided. Also, the core layer is formed with at least one through hole penetrating therethrough. A second metal layer is formed on a surface of the core layer and a wall of the through hole, such that a plated through hole can be formed penetrating through the core layer. Then, a filling material is filled in the plated through hole. A surface of the second metal layer is thinned to expose the first metal layer. A resist layer is formed on the first metal layer on the surface of the core layer by a circuit patterning process, such that a patterned circuit layer can be subsequently formed by an electrical plating process. Moreover, the circuit layer formed on the surface of the core layer can be electrically connected by the means of the plated through hole.

Abstract: A method for fabricating an interlayer conducting structure of a circuit board is proposed. The method includes providing a core layer, and a first insulating layer and a second insulating layer formed on the upper and lower surfaces of the core layer successively, forming a through hole penetrating the core layer and the first and second insulating layers, and filling the through hole with a conductive material; removing the second insulating layer, a portion of the conductive material in the through hole at a position corresponding to the second insulating layer, and the first insulating layer; and pressing a metal layer onto the first and second surfaces of the core layer such that the conductive material protruded from the through hole corresponding to the core layer is fully packed in the through hole, so as to form a conductive through hole.

Abstract: An antenna assembly includes a circuit board, and one antenna device disposed on one side of the circuit board, for receiving and transmitting signals laterally, and another antenna device disposed on the other side of the circuit board, for receiving and transmitting signals vertically, to prevent the signal receiving and transmitting operations of the antenna devices from being interfered with each other. The antenna devices each includes two antenna members for receiving and transmitting signals toward different directions relative to each other, and each having two or more antenna segments for receiving and transmitting signals of different frequencies.

Abstract: A semiconductor package substrate is provided having a plurality of bonding pads on at least one surface thereof and covered by a conductive film. A photoresist layer formed over the conductive film has a plurality of first openings for exposing portions of the conductive film corresponding to the bonding pads. The exposed portions of the conductive film is removed to expose the bonding pads respectively via the first openings. The exposed bonding pads are plated with a metal layer respectively. Then, the photoresist layer and the remainder of the conductive film covered by the photoresist layer are removed. A solder mask having a plurality of second openings may be formed on the surface of the substrate, and allows the plated metal layer on the bonding pads respectively to be exposed via the second openings.

Abstract: A wall hanging apparatus for a projection apparatus comprises a fixing seat installed at the lower surface of the projection apparatus, supporting arm whose lower end is fixed on the surface of the fixing seat and reflection mirror fixed at the upper end of the supporting arm and corresponded to a projection lens of the projection apparatus. Whereby, the projection apparatus can have both the portability of a prone type projection apparatus and space saving characteristic of a ceiling hanging type projection apparatus and can be used in an indoor space with a lower height to allow the usage of the projection apparatus is diversified. And, a trapezoid deformation of an image caused from the deviation of the angle of incidence can be modified effectively and quickly by adjusting the angle of the reflection mirror.

Abstract: A semiconductor package substrate is provided having a plurality of bonding pads on at least one surface thereof and covered by a conductive film. A photoresist layer formed over the conductive film has a plurality of first openings for exposing portions of the conductive film corresponding to the bonding pads. The exposed portions of the conductive film is removed to expose the bonding pads respectively via the first openings. The exposed bonding pads are plated with a metal layer respectively. Then, the photoresist layer and the remainder of the conductive film covered by the photoresist layer are removed. A solder mask having a plurality of second openings may be formed on the surface of the substrate, and allows the plated metal layer on the bonding pads respectively to be exposed via the second openings.

Abstract: An arithmetic unit which performs all basic arithmetic operations in a finite field GF(2m) and includes an arithmetic processor, an arithmetic logic unit and a control unit is disclosed. The arithmetic unit of the present invention is structured with a low circuit complexity, so that an error-correcting decoder applying this calculating processor can be greatly simplified.

Abstract: A surface treatment method for aluminum nitride includes the steps of:

Abstract: An uninterruptible power supply (UPS) is electrically coupled to a main board, a hard disk and a power supply of the computer. The UPS comprises a power detection circuit for detecting a power supplying state of the power supply when the computer is halting, a power management circuit for receiving a blackout signal sent from the power detection circuit when a blackout in the power supply is detected, and a power switch circuit is commanded by the power management circuit to switch power of the main board and the hard disk from the power supply to the rechargeable battery for maintaining a normal operation. At the same time, the power management circuit sends a power ready signal to the main board through a power switch on the main board to cause CPU to boot the computer normally and the CPU commands to store temporary data and programs in the memory in the hard disk. Such safely stored data and programs may be retrieved from hard disk by CPU for use when computer is powered on again.