Abstract: A QFN semiconductor package includes a die attach pad; a semiconductor die mounted on the die attach pad; an inner terminal lead disposed adjacent to the die attach pad; a first wire bonding the inner terminal lead to the semiconductor die; an extended, outer terminal lead disposed along periphery of the QFN semiconductor package, wherein the extended, outer terminal lead is disposed beyond a maximum wire length which is provided for a specific minimum pad opening size on the semiconductor die; an intermediary terminal disposed between the inner terminal lead and the extended, outer terminal lead; a second wire bonding the intermediary terminal to the semiconductor die; and a trace interconnecting the intermediary terminal to the extended, outer terminal lead.

Abstract: A quad flat non-lead (QFN) semiconductor package includes a die attach pad having a recessed area; a semiconductor die mounted inside the recessed area of the die attach pad; at least one row of inner terminal leads disposed adjacent to the die attach pad; first wires bonding respective said inner terminal leads to the semiconductor die; at least one row of extended, outer terminal leads disposed along periphery of the QFN semiconductor package; at least one row of intermediary terminals disposed between the inner terminal leads and the extended, outer terminal leads; second wires bonding respective the intermediary terminals to the semiconductor die; and third wires bonding respective the intermediary terminals to the extended, outer terminal leads.

Abstract: A wire bond chip package includes a chip carrier; a semiconductor die having a die face and a die edge, the semiconductor die being mounted on a die attach surface of the chip carrier, wherein a plurality of input/output (I/O) pads are situated in or on the semiconductor die; a rewiring laminate structure on the semiconductor die, the rewiring laminate structure comprising a plurality of redistribution bond pads; a plurality of bond wires interconnecting the redistribution bond pads with the chip carrier; and a mold cap encapsulating at least the semiconductor die and the bond wires.

Abstract: A multi-chip package includes a chip carrier; a semiconductor die mounted on a die attach surface of the chip carrier, wherein a plurality of input/output (I/O) pads are situated in or on the semiconductor die; a rewiring laminate structure on the semiconductor die, the rewiring laminate structure comprising a plurality of redistribution pads for the I/O pads; at least one bond wire interconnecting at least one of the redistribution pads with the chip carrier; a chip package mounted on at least another of the redistribution pads; and a mold cap encapsulating at least a portion of the bond wire.

Abstract: Means for measuring a working machine's structural deviation from five reference axes includes a main sensing body bonded with a main axis of the working machine (or controlled to revolve), and a lighting unit set around the main sensing body to circle about the main sensing body with a fixed radius (or the lighting unit radiates a light on the main sensing body from that radial distance and circles along with the main sensing body) such that as soon as the main sensing body has detected an optical signal, it is converted to an error signal informing of the working machine's structural deviation in two or three dimensional displacement.

Abstract: Means for measuring a working machine's structural deviation from five reference axes includes a main sensing body bonded with a main axis of the working machine (or controlled to revolve), and a lighting unit set around the main sensing body to circle about the main sensing body with a fixed radius (or the lighting unit radiates a light on the main sensing body from that radial distance and circles along with the main sensing body) such that as soon as the main sensing body has detected an optical signal, it is converted to an error signal informing of the working machine's structural deviation in two or three dimensional displacement.

Abstract: A static/dynamic multi-function measuring device for linear unit, includes a foundation, a multi-direction sliding unit having eddy current detector, a linear motor, a linear unit with a sensing element and an optical measuring unit; the static/dynamic multi-function measuring device uses the linear motor to drive the multi-direction sliding unit with low friction to provide a non-contact measurement of a parallel alignment of the linear unit, a linear accuracy measurement of the linear unit, and a vibration measurement of the linear unit to detect the parallel alignment of the linear unit and the linear accuracy of a slide rail and so on, the static/dynamic multi-function measuring device also measures errors of the linear unit and a slide block moving in the vibrating and the rolling direction.

Abstract: A quad flat non-lead (QFN) semiconductor package includes a die attach pad having a recessed area; a semiconductor die mounted inside the recessed area of the die attach pad; at least one row of inner terminal leads disposed adjacent to the die attach pad; first wires bonding respective said inner terminal leads to the semiconductor die; at least one row of extended, outer terminal leads disposed along periphery of the QFN semiconductor package; at least one row of intermediary terminals disposed between the inner terminal leads and the extended, outer terminal leads; second wires bonding respective the intermediary terminals to the semiconductor die; and third wires bonding respective the intermediary terminals to the extended, outer terminal leads.

Abstract: A semiconductor chip package is disclosed. The semiconductor chip package comprises a package substrate having a bottom surface. At least four adjacent ball pads are on the bottom surface, arranged in a first two-row array along a first direction and a second direction. At least four vias are drilled through the package substrate, arranged in a second two-row array, wherein each of the vias in a row of the second two-row array is offset by a first distance along the first direction and a second distance along the second direction from the connecting ball pads in a row of the first two-row array, and each of the vias in the other adjacent row of the second two-row array is offset by the first distance along an opposite direction to the first direction and the second distance along the second direction from the connecting ball pads in the other adjacent row of the first two-row array.