Abstract: The present invention relates to the use of triterpenoid-based compounds of formula (1) for inhibiting viral activity. The triterpenoid-based compounds have an excellent effect of inhibiting viral activity, and thus will be useful as therapeutic agents against virus-related diseases.

Abstract: The present invention relates to a diaryl hepatonoid-based compound of formula (1) having viral inhibitory activity; its pharmaceutically acceptable salt; or a hydrate, a solvate or a prodrug of any of the foregoing, and a pharmaceutical composition comprising the same, and the use thereof therapeutic agents. The diaryl hepatonoid-based compounds according to present invention have an excellent effect of inhibiting viral activity, and thus will be useful as therapeutic agents against virus-related diseases.

Abstract: The invention relates to a device and a method for estimating the rotational speed ? of an electric motor when freewheeling, the method being carried out in a variable speed drive for controlling the motor by generating reference alternating voltages Va, Vb. The method comprises a step for measuring the measured flux and torque currents Id and Iq of the motor in an orthogonal two-phase marker d, q, a step for determining said reference voltages Va, Vb, by carrying out a current regulation on the basis of said measured currents, and on the basis of zero reference currents Idref and Iqref in said marker d, q, and a step for calculating the rotational speed ? by evaluating the angle of rotation of the voltage vector, the components of which are said voltages Va, Vb in a fixed orthogonal two-phase marker a, b.

Abstract: A method for improved Logic Built-In Self-Test (LBIST) includes providing a plurality of control signal sets, by an LBIST controller, to an LBIST domain comprising a plurality of LBIST satellite modules. Each of the plurality of LBIST satellite modules receives an individual one of the plurality of control signal sets. The LBIST controller interleaves the LBIST channel scan and LBIST sequence operations for each of the LBIST satellite modules, through the plurality of control signal sets. A test system includes a Logic Built-In Self-Test (LBIST) domain comprising a plurality of LBIST satellite modules. An LBIST controller couples to the LBIST domain and provides a plurality of control signal sets to the LBIST domain, wherein each of the plurality of LBIST satellite modules receives an individual one of the plurality of control signal sets. The LBIST controller interleaves LBIST channel scan operations for each of the LBIST satellite modules, through the plurality of control signal sets.

Abstract: This client-server system partitions Windows applications into multi-media and other less-observable instructions such that client may run audio/visual-related commands remotely, thereby enabling an application appearance to client-user as when application were run solely by a single machine. Clients may access applications through web-sites or remote access servers. Client requests may be atomized such that instruction set sub-sets are partitioned correspondingly. Operating system parameters on which application is run may be accessed selectably. Server may centralize administration and provide metering of application usage.

Abstract: The present invention provides for a system. The system includes a plurality of controllers, each controller comprising at least an output pin and a plurality of input pins and configured to receive self-identify control signals through one or more of the plurality of input pins and to transmit a controller self-identify signal through the output pin based on the self-identify control signals. Each output pin is coupled to an external system. A processor couples to a first input pin of the plurality of input pins of each of the plurality of controllers and is configured to generate self-identify control signals and to transmit the self-identify control signals to the plurality of controllers.

Abstract: A method for improved Logic Built-In Self-Test (LBIST) includes providing a plurality of control signal sets, by an LBIST controller, to an LBIST domain comprising a plurality of LBIST satellite modules. Each of the plurality of LBIST satellite modules receives an individual one of the plurality of control signal sets. The LBIST controller interleaves the LBIST channel scan and LBIST sequence operations for each of the LBIST satellite modules, through the plurality of control signal sets. A test system includes a Logic Built-In Self-Test (LBIST) domain comprising a plurality of LBIST satellite modules. An LBIST controller couples to the LBIST domain and provides a plurality of control signal sets to the LBIST domain, wherein each of the plurality of LBIST satellite modules receives an individual one of the plurality of control signal sets. The LBIST controller interleaves LBIST channel scan operations for each of the LBIST satellite modules, through the plurality of control signal sets.

Abstract: The present invention provides for a system, comprising a controller and a processor. The controller comprises at least an output pin and a plurality of input pins, and is configured to receive self-identify control signals through one or more of the plurality of input pins and to transmit a controller self-identify signal through the output pin based on the self-identify control signals. The processor is coupled to the controller and configured to generate self-identify control signals and to transmit the self-identify control signals to the controller.

Abstract: The invention relates to a device and a method for estimating the rotational speed ? of an electric motor when freewheeling, the method being carried out in a variable speed drive for controlling the motor by generating reference alternating voltages Va, Vb. The method comprises a step for measuring the measured flux and torque currents Id and Iq of the motor in an orthogonal two-phase marker d,q, a step for determining said reference voltages Va, Vb, by carrying out a current regulation on the basis of said measured currents, and on the basis of zero reference currents Idref and Iqref in said marker d,q, and a step for calculating the rotational speed ? by evaluating the angle of rotation of the voltage vector, the components of which are said voltages Va, Vb in a fixed orthogonal two-phase marker a,b.

Abstract: A system, apparatus, method and article to perform radial fall-off correction are described. The apparatus may include a coefficient determination module and a fall-off correction module. The coefficient determination module determines a fall-off correction coefficient for a pixel of an image sensor, and the fall-off correction module corrects the pixel based on an intensity value of the pixel and the fall-off correction coefficient. The fall-off correction coefficient may be based on one or more stored coefficient values, where the one or more coefficient values correspond to a squared distance between the pixel and a center position of the image sensor. In this manner, improvements in computational efficiency and reductions in implementation complexity are attained. Other embodiments may be described and claimed.

Abstract: An interpenetrating polymer network (IPN) composition and a process for the manufacture of hydrogel contact lens using the invention material. The polymeric materials are formed by polymerization of: (1) an unsaturated alkyl(meth)acrylate or its derivatives such as 2-hydroxyethyl methacrylate as the principle monomer; (2) optionally vinyl containing comonomer(s) to enhance the resulting hydrogel water absorbing capability; (3) polymerizable multi-functional crosslinking agent(s); (4) an irradiation initiator and/or thermal initiator; (5) optionally other additives to impart the resulting hydrogel specific properties such as ultra-violet blocking ability and handling colors; in the presence of a soluble, hydrophilic IPN agent such as polyvinylpyrrolidone (PVP) or poly-2-ethyl-2-oxazoline (PEOX) with a specific molecular weight range.

Abstract: Methods and systems for processing data communicated over a network. In one aspect, an exemplary embodiment includes processing a first group of network packets in a first processor which executes a first network protocol stack, where the first group of network packets are communicated through a first network interface port, and processing a second group of network packets in a second processor which executes a second network protocol stack, where the second group of network packets is communicated through the first network interface port. Other methods and systems are also described.

Abstract: A method and system for managing the voltage of a DC bus of a speed controller for an AC electric motor linked to a current distribution network. The method includes comparing a value of the voltage measured on the DC bus with a determined limit value, when the value of the voltage measured on the DC bus becomes greater than the limit value, forcing the slope of an internal ramp to a zero value so as to confer a constant frequency on the stator, and when the value of the voltage measured on the DC bus again becomes less than the limit value, progressively increasing the value of the slope of the internal ramp.

Abstract: An apparatus, a method, and a computer program product are provided for identifying signals in analogue electrical systems. The ID select signals that control the timing of this signal identification circuit comprise sequential numbers that count up and identify a corresponding signal. The signals to be identified are located on a group of input/output (I/O) pins. One multiplexer (first) selects a specific I/O pin in response to the ID select signals. An isolated voltage source is connected to this multiplexer and provides the selected signal to another multiplexer (second). The second multiplexer switches from this isolated voltage source to ground potential in response to the ID select signals. The isolated voltage source floats at the DC level of the selected I/O driver pin. Therefore, by connecting to the selected signal's I/O pin and the output of the second multiplexer, the selected signal can be identified and then probed.

Abstract: The present invention relates to a method for limiting the current output by a speed controller (V) for three-phase asynchronous electric motor (M), said controller (V) operating according to a control law (LC) of pure U/F type. Said method is characterized in that it consists in calculating with the aid of a limitation function a correction value for the frequency of the stator (Wstat) then in applying thereto, so as to obtain, in the voltage control law (LC) of U/F type, a corrected frequency of the stator (Wstatc). According to the voltage control law of U/F type, the method thereafter consists on the basis of this corrected frequency of the stator (Wstatc) in obtaining the control voltage (Vqref) applied to the motor. The invention also relates to a system for limiting the current able to implement said method.

Abstract: A method of mapping logical track numbers to a collection of physical tracks on at least two disk surfaces within a disk drive. The method further includes accessing logical tracks at assigned physical tracks. The invention includes making disk drives using the mapping of logical tracks to physical tracks and those disk drives as a product of that manufacturing process. The invention also includes program systems implementing the mapping of logical tracks to physical tracks within the disk drive and disk drives implementing the method of assigning logical tracks to physical tracks and/or accessing logical tracks based upon the physical track assignment.

Abstract: A method for writing servo information onto a disk of a hard disk drive with a servo writer. The method includes writing a plurality of spiral servo signals with a head. The spiral servo signals are used to write servo patterns using at least one timing window. The timing window is adjusted using a position error signal generated from the spiral servo signals. The adjusted timing window is then used to write servo patterns onto the disk. Adjusting the timing window compensates for irregularities in the spiral servo signals.

Abstract: The present invention is a method and apparatus for positioning a read/write head in a hard disk drive. The method comprises providing a disk having a at least one side with a plurality of tracks, where each of the tracks has a servo field with servo bits. The servo bits are read to provide a position signal for positioning a read/write head. The method determines a difference in position between an initial and a subsequent position of the read/write head on a track, where the subsequent location occurs after the read/write head has moved one revolution from the initial position on the track. The initial and subsequent positions are offset laterally. The method generates a compensation signal based on the initial position, the subsequent position and the difference. The position signal and the compensation signal are combined to provide a compensated position signal for positioning the read/write head. Various embodiments are described.

Abstract: Read positioning method includes adjusting at least one read head position when accessing read track on at least one rotating disk surface based upon Burst Correction Value of nearest write track, when PES burst patterns of read track and nearest write track match. Apparatus supporting read positioning method may include means for at least partly performing each step. At least one means may include at least one instance of at least one of following: computer, finite state machine, neural network and inferential engine. At least one read method for the hard disk drive included. These read methods may be used during initialization and/or normal hard disk drive operation. Hard disk drive may include servo controller driving voice coil actuator and, preferably further driving micro-actuator. The hard disk drive may include more than one rotating disk surface and more than one rotating disk surface.

Abstract: A cache coherent distributed shared memory multi-processor computer system is provided with a memory controller which includes a recall unit. The recall unit allows selective forced write-backs of dirty cache lines to the home memory. After a request is posted in the recall unit, a recall (“flush”) command is issued which forces the owner cache to write-back the dirty cache line to be flushed. The memory controller will inform the recall unit as each recall operation is completed. The recall unit operation will be interrupted when all flush requests are completed.