Patents by Inventor Tung Yang

Tung Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12373386
    Abstract: The invention provides an electronic file parsing and generation system and method. The system specializes in processing a GDSII file, parsing a library, a structure and an element code therein, and storing parsed data in a relational database. The method also allows the extraction of the parsed data from the database to generate a new electronic file that are fully compatible with other electronic design automation tools. The invention realizes efficient analysis and generation of the GDSII file, can save memory resources, and also improves the speed of data processing, thereby providing greater flexibility and convenience for users.
    Type: Grant
    Filed: March 5, 2024
    Date of Patent: July 29, 2025
    Assignee: AIP TECHNOLOGY CORPORATION
    Inventors: Tung-Yang Chen, Chu Hsu
  • Publication number: 20250238586
    Abstract: A system for auto-generating arrangement is configured to generate a virtual integrated circuit (IC) layout. The system for auto-generating arrangement includes a grouping module and an arranging module. The grouping module receives an electronic file that includes the device structures of testing devices and divides the testing devices into different testing device groups according to classification conditions. The arranging module, connected to the grouping module, arranges the different testing device groups in a virtual area based on an arrangement rule to form the virtual IC layout. Accordingly, the system can shorten design time, reduce labor, and avoid errors caused by manual work. Simultaneously, the testing devices of different types/heights/widths can be arranged in a limited space to automatically generate a virtual IC layout.
    Type: Application
    Filed: March 20, 2024
    Publication date: July 24, 2025
    Applicant: AIP Technology Corporation
    Inventors: Tung-Yang CHEN, Yu-Ting HUANG, Chu HSU
  • Publication number: 20250231907
    Abstract: The invention provides an electronic file parsing and generation system and method. The system specializes in processing a GDSII file, parsing a library, a structure and an element code therein, and storing parsed data in a relational database. The method also allows the extraction of the parsed data from the database to generate a new electronic file that are fully compatible with other electronic design automation tools. The invention realizes efficient analysis and generation of the GDSII file, can save memory resources, and also improves the speed of data processing, thereby providing greater flexibility and convenience for users.
    Type: Application
    Filed: March 5, 2024
    Publication date: July 17, 2025
    Applicant: AIP Technology Corporation
    Inventors: Tung-Yang CHEN, Chu HSU
  • Publication number: 20250231230
    Abstract: The disclosure describes a method, a device, and a system for processing transmission line pulse data. In the method, the component characteristic of a protection component is determined. A voltage-current characteristic generated by applying transmission pulses to the protection component is analyzed based on the transmission line pulse data of the protection component. Based on the design window such as an operation voltage value, a breakdown voltage value, and a required current capability, a corresponding visual graph is generated to determine the characteristic, advantages, and disadvantages of the protection component more accurately.
    Type: Application
    Filed: March 5, 2024
    Publication date: July 17, 2025
    Applicant: AIP Technology Corporation
    Inventors: Tung-Yang CHEN, Pi-Yuan HSIAO, Yu-An CHEN, Chang-Lin WU
  • Publication number: 20250212431
    Abstract: A semiconductor device includes an emitter, a first base encircling the emitter, a first collector encircling the emitter and the first base, a second base encircling the emitter, the first base and the first collector, and a second collector encircling the second base. The first collector is separated from the emitter by the first base, and the second collector is separated from the emitter, the first base and the first collector by the second base. The emitter, the first base, the first collector, the second base and the second collector form a concentric pattern.
    Type: Application
    Filed: December 25, 2023
    Publication date: June 26, 2025
    Inventors: TUNG-YANG LIN, HUNG-CHIH TSAI, RUEY-HSIN LIU
  • Patent number: 12326370
    Abstract: A temperature sensing device includes a substrate, a first reflective module, a first window cover, and a dual thermopile sensor. The first reflective module is disposed on the substrate, including a first mirror chamber with a narrow field of view (FOV), and the first reflective module focuses a thermal radiation from measured object to a first image plane in the first mirror chamber. The first window cover is disposed on the first reflective module, and the first window cover allows a selected band of the thermal radiation to pass through. The dual thermopile sensor is disposed on the substrate and located in the first mirror chamber, and the dual thermopile sensor senses a temperature data from the first image plane. Additional second reflective module, LED source plus pin hole with same FOV of dual thermopile sensor can illuminate the measured object for ease of placement of object to be heated.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: June 10, 2025
    Assignee: ORIENTAL SYSTEM TECHNOLOGY INC.
    Inventors: Chein-Hsun Wang, Ming Le, Tung-Yang Lee, Yu-Chih Liang, Wen-Chie Huang, Chen-Tang Huang, Jenping Ku
  • Publication number: 20250159843
    Abstract: A cooling system assembly may include a heatsink unit and a water block unit. The heatsink unit is configured to enable a first cooling liquid to undergo a phase-change. The heatsink unit includes a heat pipe heatsink comprising a first thermal transfer surface and a second thermal transfer surface. The second thermal transfer surface is opposite the first thermal transfer surface. The first thermal transfer surface is configured to enable a heat to be transported from at least one packaged integrated circuit to the heat pipe heatsink. The water block unit is configured to enable a second cooling liquid to flow through the water block unit. The water block unit is thermally coupled to the second thermal transfer surface. The second thermal transfer surface is configured to enable the heat to be further transported from the heat pipe heatsink to the water block unit.
    Type: Application
    Filed: November 13, 2024
    Publication date: May 15, 2025
    Inventors: Tung-Yang Shieh, Chia-Chin Chan, Keng-Yu Lin
  • Publication number: 20250149403
    Abstract: A cooling system for a heterogeneous integrated semiconductor package structure is disclosed. The heterogeneous integrated semiconductor package structure is arranged on a circuit board. The cooling system may include a cooling component. The cooling component may be arranged on the heterogeneous integrated semiconductor package structure, and is configured to dissipate heat from the heterogeneous integrated semiconductor package structure by using a cooling fluid.
    Type: Application
    Filed: January 29, 2024
    Publication date: May 8, 2025
    Inventors: Tung-Yang TANG, Chu-Shun CHO, Wen-Hua LIU, Chu-Chia TSAI
  • Publication number: 20250140637
    Abstract: A cooling module for a heterogeneous integrated semiconductor package structure is disclosed. The heterogeneous integrated semiconductor package structure is arranged on a circuit board. The cooling module includes a cooling plate and a plurality of nanowires. The nanowires may be configured to be bonded to the cooling plate, or may be configured to bond the cooling plate to the heterogeneous integrated semiconductor package structure, or may be configured to bond the cooling plate to the circuit board, or may be configured to bond the cooling plate to both the heterogeneous integrated semiconductor package structure and the circuit board.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 1, 2025
    Inventors: Chu-Chia TSAI, Tung-Yang TANG, Wen-Hua LIU, Chu-Shun CHO
  • Patent number: 12249764
    Abstract: A transparent electromagnetic wave focusing device is provided, which includes a plurality of metamaterial unit cells arranged to form a metamaterial array plate, and each metamaterial unit cell includes a plurality of metal layers and a plurality of transparent substrates stacked alternately. Each of the metal layers has a comb-tooth pattern, and the plurality of metamaterial unit cells correspond to a plurality of comb-tooth pattern combinations, respectively. The metamaterial array plate has an incident surface and an exit surface opposite to each other, and for an incident electromagnetic wave with a predetermined operating frequency band incident from the incident surface, the metamaterial unit cells correspond to a plurality of compensation phase differences, such that the incident electromagnetic wave that passes through the exit surface are focused on a reference point. The comb-tooth pattern combinations vary with the corresponding compensation phase differences.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: March 11, 2025
    Assignee: WISTRON NEWEB CORPORATION
    Inventors: Chin-Hsien Wu, Wei-Tung Yang, Tsun-Che Huang
  • Patent number: 12230709
    Abstract: Present disclosure provides a transistor structure, including a substrate, a first gate extending along a longitudinal direction over the substrate, the first gate including a gate electrode, a second gate over the substrate and apart from the first gate, a source region of a first conductivity type in the substrate, aligning to an edge in proximity to a side of the first gate, a P-type well surrounding the source region, a drain region of the first conductivity type in the substrate, an N-type well surrounding the drain region, the second gate is entirely within a vertical projection area of the N-type well and a bottom surface of the P-type well and a bottom surface of the N-type well are substantially at a same depth from the first gate.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: February 18, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tung-Yang Lin, Hsueh-Liang Chou
  • Publication number: 20240345634
    Abstract: A computing system is disclosed. The computing system includes a housing configured to receive a plurality of electronic components including a first electronic component and a second electronic component; and a divider wall assembly mounted to the housing to separate the first electronic component from the second electronic component. The divider wall assembly includes a plurality of sheets including a first sheet and a second sheet, each sheet of the plurality of sheets having a sheet through-hole, a coupling rod positioned between the first and second sheets, the coupling rod having a flat surface formed between cylindrical ends, the coupling rod having a rod through-hole on the flat surface, the rod through-hole being perpendicular to an axis of the coupling rod, and a fastener fixedly attaching the plurality of sheets and the coupling rod, the fastener being inserted through the sheet through-hole of each sheet and the rod through-hole.
    Type: Application
    Filed: June 21, 2023
    Publication date: October 17, 2024
    Inventors: Yaw-Tzorng TSORNG, Jen-Jia LIOU, Chun-Chen HSU, Hsi-Chi CHIEN, Yu-Tung YANG
  • Publication number: 20240321894
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first well region, a second well region, and a third well region disposed within a semiconductor substrate. The second well region is disposed between the first and second well regions. A first source/drain region is in the first well region. A second source/drain region is in the second well region. A gate structure is on the semiconductor substrate and spaced laterally between the first and second source/drain regions. A contact region is disposed in the third well region. A conductive structure is on the semiconductor substrate and spaced laterally between the second source/drain region and the contact region.
    Type: Application
    Filed: May 20, 2024
    Publication date: September 26, 2024
    Inventors: Hsin-Chih Chiang, Tung-Yang Lin, Ruey-Hsin Liu, Ming-Ta Lei
  • Patent number: 12085451
    Abstract: An infrared thermopile sensor includes a silicon cover having an infrared lens, an infrared sensing chip having duo-thermopile sensing elements, and a microcontroller chip calculating a temperature of an object. The components are in a stacked 3D package to decrease the size of the infrared thermopile sensor. The infrared sensing chip and the microcontroller chip have metal layers to shield the thermal radiation. To measure object temperature accurately under acute change in environmental temperature, this disclosure uses the duo-thermopile sensing elements, that one is the active unit for measuring the object temperature and another one is the dummy unit for compensating the effect from the package structure.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: September 10, 2024
    Assignee: ORIENTAL SYSTEM TECHNOLOGY INC.
    Inventors: Wen-Chie Huang, Yu-Chih Liang, Chein-Hsun Wang, Ming Le, Chen-Tang Huang, Chein-Hsing Yu, Tung-Yang Lee, Jenping Ku
  • Patent number: 12062860
    Abstract: An antenna system includes a dielectric substrate, a ground element, and a first antenna element. The dielectric substrate has a first surface and a second surface, which are opposite to each other. The ground element is disposed on the first surface of the dielectric substrate. The first antenna element includes a first radiation element, a feeding radiation element, a second radiation element, and a shorting radiation element. The first radiation element has a feeding point, and is disposed on the second surface of the dielectric substrate. The feeding radiation element is adjacent to the first radiation element. The second radiation element is coupled to the feeding radiation element. The second radiation element is further coupled through the shorting radiation element to the ground element.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: August 13, 2024
    Assignee: WISTRON NEWEB CORP.
    Inventors: Wei-Tung Yang, Tsun-Che Huang
  • Publication number: 20240230414
    Abstract: A temperature sensing device includes a substrate, a first reflective module, a first window cover, and a dual thermopile sensor. The first reflective module is disposed on the substrate, including a first mirror chamber with a narrow field of view (FOV), and the first reflective module focuses a thermal radiation from measured object to a first image plane in the first mirror chamber. The first window cover is disposed on the first reflective module, and the first window cover allows a selected band of the thermal radiation to pass through. The dual thermopile sensor is disposed on the substrate and located in the first mirror chamber, and the dual thermopile sensor senses a temperature data from the first image plane. Additional second reflective module, LED source plus pin hole with same FOV of dual thermopile sensor can illuminate the measured object for ease of placement of object to be heated.
    Type: Application
    Filed: October 20, 2022
    Publication date: July 11, 2024
    Inventors: Chein-Hsun WANG, Ming LE, Tung-Yang LEE, Yu-Chih LIANG, Wen-Chie HUANG, Chen-Tang HUANG, Jenping KU
  • Patent number: 12027526
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a semiconductor substrate having a device substrate overlying a handle substrate and an insulator layer disposed between the device substrate and the handle substrate. A gate electrode overlies the device substrate between a drain region and a source region. A conductive via extends through the device substrate and the insulator layer to contact the handle substrate. A first isolation structure is disposed within the device substrate and comprises a first isolation segment disposed laterally between the gate electrode and the conductive via. A contact region is disposed within the device substrate between the first isolation segment and the conductive via. A conductive gate electrode directly overlies the first isolation segment and is electrically coupled to the contact region.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: July 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Chih Chiang, Tung-Yang Lin, Ruey-Hsin Liu, Ming-Ta Lei
  • Publication number: 20240133745
    Abstract: A temperature sensing device includes a substrate, a first reflective module, a first window cover, and a dual thermopile sensor. The first reflective module is disposed on the substrate, including a first mirror chamber with a narrow field of view (FOV), and the first reflective module focuses a thermal radiation from measured object to a first image plane in the first mirror chamber. The first window cover is disposed on the first reflective module, and the first window cover allows a selected band of the thermal radiation to pass through. The dual thermopile sensor is disposed on the substrate and located in the first mirror chamber, and the dual thermopile sensor senses a temperature data from the first image plane. Additional second reflective module, LED source plus pin hole with same FOV of dual thermopile sensor can illuminate the measured object for ease of placement of object to be heated.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: Chein-Hsun WANG, Ming LE, Tung-Yang LEE, Yu-Chih LIANG, Wen-Chie HUANG, Chen-Tang HUANG, Jenping KU
  • Patent number: 11940388
    Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 26, 2024
    Assignee: IXENSOR CO., LTD.
    Inventors: Yenyu Chen, An Cheng Chang, Tai I Chen, Su Tung Yang, Chih Jung Hsu, Chun Cheng Lin, Min Han Wang, Shih Hao Chiu
  • Publication number: 20240063549
    Abstract: A transparent electromagnetic wave focusing device is provided, which includes a plurality of metamaterial unit cells arranged to form a metamaterial array plate, and each metamaterial unit cell includes a plurality of metal layers and a plurality of transparent substrates stacked alternately. Each of the metal layers has a comb-tooth pattern, and the plurality of metamaterial unit cells correspond to a plurality of comb-tooth pattern combinations, respectively. The metamaterial array plate has an incident surface and an exit surface opposite to each other, and for an incident electromagnetic wave with a predetermined operating frequency band incident from the incident surface, the metamaterial unit cells correspond to a plurality of compensation phase differences, such that the incident electromagnetic wave that passes through the exit surface are focused on a reference point. The comb-tooth pattern combinations vary with the corresponding compensation phase differences.
    Type: Application
    Filed: March 9, 2023
    Publication date: February 22, 2024
    Inventors: CHIN-HSIEN WU, WEI-TUNG YANG, TSUN-CHE HUANG