Patents by Inventor Tza-Jing Gung

Tza-Jing Gung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220138396
    Abstract: Methods, systems, and non-transitory computer readable medium are described for generating assessment maps for corrective action. A method includes receiving a first vector map including a first set of vectors each indicating a distortion of a particular location of a plurality of locations on a substrate. The method further includes generating a second vector map including a second set of vectors by rotating a position of each vector in the first set of vectors. The method further includes generating a third vector map including a third set of vectors based on vectors in the second set of vectors and corresponding vectors in the first set of vectors. The method further includes generating a fourth vector map by subtracting each vector of the third set of vectors from a corresponding vector in the first set of vectors. The fourth vector map indicates a planar component of the first vector map.
    Type: Application
    Filed: November 3, 2020
    Publication date: May 5, 2022
    Inventors: Wenjiao Wang, Joshua Maher, Xinhai Han, Deenesh Padhi, Tza-Jing Gung
  • Patent number: 11289312
    Abstract: Embodiments of process kit shields and process chambers incorporating same are provided herein. In some embodiments a process kit configured for use in a process chamber for processing a substrate includes a shield having a cylindrical body having an upper portion and a lower portion; an adapter section configured to be supported on walls of the process chamber and having a resting surface to support the shield; and a heater coupled to the adapter section and configured to be electrically coupled to at least one power source of the processes chamber to heat the shield.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: March 29, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Adolph M. Allen, Vanessa Faune, Zhong Qiang Hua, Kirankumar Neelasandra Savandaiah, Anantha K. Subramani, Philip A. Kraus, Tza-Jing Gung, Lei Zhou, Halbert Chong, Vaibhav Soni, Kishor Kalathiparambil
  • Patent number: 11276569
    Abstract: Embodiments described herein relate to manufacturing layer stacks of oxide/nitride (ON) layers with minimized in-plane distortion (IPD) and lithographic overlay errors. A method of forming a layer stack ON layers includes flowing a first silicon-containing gas, an oxygen-containing gas, and a first dilution gas. A RF power is symmetrically applied to form a first material layer of SiO2. A second silicon-containing gas, a nitrogen-containing gas, and a second dilution gas are flowed. A second RF power is symmetrically applied to form a second material layer of Si3N4. The flowing the first silicon-containing gas, the oxygen-containing gas, and the first dilution gas, the symmetrically applying the first RF power, the flowing the second silicon-containing gas, the nitrogen-containing gas, and the second dilution gas, and the symmetrically applying the second RF power is repeated until a desired number of first material layers and second material layers make up a layer stack.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: March 15, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Yongjing Lin, Tza-Jing Gung, Masaki Ogata, Yusheng Zhou, Xinhai Han, Deenesh Padhi, Juan Carlos Rocha, Amit Kumar Bansal, Mukund Srinivasan
  • Publication number: 20210366722
    Abstract: Described is a process to clean up junction interfaces for fabricating semiconductor devices involving forming low-resistance electrical connections between vertically separated regions. An etch can be performed to remove silicon oxide on silicon surface at the bottom of a recessed feature. Described are methods and apparatus for etching up the bottom oxide of a hole or trench while minimizing the effects to the underlying epitaxial layer and to the dielectric layers on the field and the corners of metal gate structures. The method for etching features involves a reaction chamber equipped with a combination of capacitively coupled plasma and inductive coupled plasma. CHxFy gases and plasma are used to form protection layer, which enables the selectively etching of bottom silicon dioxide by NH3—NF3 plasma. Ideally, silicon oxide on EPI is removed to ensure low-resistance electric contact while the epitaxial layer and field/corner dielectric layers are—etched only minimally or not at all.
    Type: Application
    Filed: May 22, 2020
    Publication date: November 25, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Yu Lei, Xuesong Lu, Tae Hong Ha, Xianmin Tang, Andrew Nguyen, Tza-Jing Gung, Philip A. Kraus, Chung Nang Liu, Hui Sun, Yufei Hu
  • Publication number: 20210343508
    Abstract: Embodiments of process kits for use in a process chamber are provided herein. In some embodiments, a process kit for use in a process chamber includes: a chamber liner having a tubular body with an upper portion and a lower portion; a confinement plate coupled to the lower portion of the chamber liner and extending radially inward from the chamber liner, wherein the confinement plate includes a plurality of slots; a shield ring disposed within the chamber liner and movable between the upper portion of the chamber liner and the lower portion of the chamber liner; and a plurality of ground straps coupled to the shield ring at a first end of each ground strap of the plurality of ground straps and to the confinement plate at a second end of each ground strap to maintain electrical connection between the shield ring and the chamber liner when the shield ring moves.
    Type: Application
    Filed: April 30, 2020
    Publication date: November 4, 2021
    Inventors: Andrew NGUYEN, Xue Yang CHANG, Yu LEI, Xianmin TANG, John C. FORSTER, Yogananda Sarode VISHWANATH, Abilash SAINATH, Tza-Jing GUNG
  • Patent number: 11152248
    Abstract: Embodiments disclosed herein relate to cluster tools for forming and filling trenches in a substrate with a flowable dielectric material. In one or more embodiments, a cluster tool for processing a substrate contains a load lock chamber, a first vacuum transfer chamber coupled to the load lock chamber, a second vacuum transfer chamber, a cooling station disposed between the first vacuum transfer chamber and the second vacuum transfer chamber, a factory interface coupled to the load lock chamber, a plurality of first processing chambers coupled to the first vacuum transfer chamber, wherein each of the first processing chambers is a deposition chamber capable of performing a flowable layer deposition, and a plurality of second processing chambers coupled to the second vacuum transfer chamber, wherein each of the second processing chambers is a plasma chamber capable of performing a plasma curing process.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: October 19, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Jingmei Liang, Yong Sun, Jinrui Guo, Praket P. Jha, Jung Chan Lee, Tza-Jing Gung, Mukund Srinivasan
  • Publication number: 20210319989
    Abstract: Methods and apparatus for cleaning a process kit configured for processing a substrate are provided. For example, a process chamber for processing a substrate can include a chamber wall; a sputtering target disposed in an upper section of the inner volume; a pedestal including a substrate support having a support surface to support a substrate below the sputtering target; a power source configured to energize sputtering gas for forming a plasma in the inner volume; a process kit surrounding the sputtering target and the substrate support; and an ACT connected to the pedestal and a controller configured to tune the pedestal using the ACT to maintain a predetermined potential difference between the plasma in the inner volume and the process kit, wherein the predetermined potential difference is based on a percentage of total capacitance of the ACT and a stray capacitance associated with a grounding path of the process chamber.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 14, 2021
    Inventors: Halbert CHONG, Rong TAO, Jianxin LEI, Rongjun WANG, Keith A. Miller, Irena H. Wysok, Tza-Jing Gung, Xing Chen
  • Publication number: 20200395198
    Abstract: Embodiments of process kit shields and process chambers incorporating same are provided herein. In some embodiments a process kit configured for use in a process chamber for processing a substrate includes a shield having a cylindrical body having an upper portion and a lower portion; an adapter section configured to be supported on walls of the process chamber and having a resting surface to support the shield; and a heater coupled to the adapter section and configured to be electrically coupled to at least one power source of the processes chamber to heat the shield.
    Type: Application
    Filed: June 12, 2019
    Publication date: December 17, 2020
    Inventors: ADOLPH M. ALLEN, VANESSA FAUNE, ZHONG QIANG HUA, KIRANKUMAR NEELASANDRA SAVANDAIAH, ANANTHA K. SUBRAMANI, PHILIP A. KRAUS, TZA-JING GUNG, LEI ZHOU, HALBERT CHONG, VAIBHAV SONI, KISHOR KALATHIPARAMBIL
  • Publication number: 20200357616
    Abstract: Embodiments of the invention generally provide a processing chamber used to perform a physical vapor deposition (PVD) process and methods of depositing multi-compositional films. The processing chamber may include: an improved RF feed configuration to reduce any standing wave effects; an improved magnetron design to enhance RF plasma uniformity, deposited film composition and thickness uniformity; an improved substrate biasing configuration to improve process control; and an improved process kit design to improve RF field uniformity near the critical surfaces of the substrate. The method includes forming a plasma in a processing region of a chamber using an RF supply coupled to a multi-compositional target, translating a magnetron relative to the multi-compositional target, wherein the magnetron is positioned in a first position relative to a center point of the multi-compositional target while the magnetron is translating and the plasma is formed, and depositing a multi-compositional film on a substrate.
    Type: Application
    Filed: July 24, 2020
    Publication date: November 12, 2020
    Inventors: Adolph Miller ALLEN, Lara HAWRYLCHAK, Zhigang XIE, Muhammad M. RASHEED, Rongjun WANG, Xianmin TANG, Zhendong LIU, Tza-Jing GUNG, Srinivas GANDIKOTA, Mei CHANG, Michael S. COX, Donny YOUNG, Kirankumar SAVANDAIAH, Zhenbin GE
  • Patent number: 10790180
    Abstract: Electrostatic chucks with variable pixelated magnetic field are described. For example, an electrostatic chuck (ESC) includes a ceramic plate having a front surface and a back surface, the front surface for supporting a wafer or substrate. A base is coupled to the back surface of the ceramic plate. A plurality of electromagnets is disposed in the base, the plurality of electromagnets configured to provide pixelated magnetic field tuning capability for the ESC.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: September 29, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Chih-Hsun Hsu, Tza-Jing Gung, Benjamin Schwarz, Shahid Rauf, Ankur Agarwal, Vijay D. Parkhe, Michael D. Willwerth, Zhiqiang Guo
  • Publication number: 20200286773
    Abstract: Embodiments disclosed herein relate to cluster tools for forming and filling trenches in a substrate with a flowable dielectric material. In one or more embodiments, a cluster tool for processing a substrate contains a load lock chamber, a first vacuum transfer chamber coupled to the load lock chamber, a second vacuum transfer chamber, a cooling station disposed between the first vacuum transfer chamber and the second vacuum transfer chamber, a factory interface coupled to the load lock chamber, a plurality of first processing chambers coupled to the first vacuum transfer chamber, wherein each of the first processing chambers is a deposition chamber capable of performing a flowable layer deposition, and a plurality of second processing chambers coupled to the second vacuum transfer chamber, wherein each of the second processing chambers is a plasma chamber capable of performing a plasma curing process.
    Type: Application
    Filed: May 26, 2020
    Publication date: September 10, 2020
    Inventors: Jingmei LIANG, Yong SUN, Jinrui GUO, Praket P. JHA, Jung Chan LEE, Tza-Jing GUNG, Mukund SRINIVASAN
  • Patent number: 10763090
    Abstract: Embodiments of the invention generally provide a processing chamber used to perform a physical vapor deposition (PVD) process and methods of depositing multi-compositional films. The processing chamber may include: an improved RF feed configuration to reduce any standing wave effects; an improved magnetron design to enhance RF plasma uniformity, deposited film composition and thickness uniformity; an improved substrate biasing configuration to improve process control; and an improved process kit design to improve RF field uniformity near the critical surfaces of the substrate.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: September 1, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Adolph Miller Allen, Lara Hawrylchak, Zhigang Xie, Muhammad M. Rasheed, Rongjun Wang, Xianmin Tang, Zhendong Liu, Tza-Jing Gung, Srinivas Gandikota, Mei Chang, Michael S. Cox, Donny Young, Kirankumar Savandaiah, Zhenbin Ge
  • Patent number: 10707116
    Abstract: Implementations disclosed herein relate to methods for forming and filling trenches in a substrate with a flowable dielectric material. In one implementation, the method includes subjecting a substrate having at least one trench to a deposition process to form a flowable layer over a bottom surface and sidewall surfaces of the trench in a bottom-up fashion until the flowable layer reaches a predetermined deposition thickness, subjecting the flowable layer to a first curing process, the first curing process being a UV curing process, subjecting the UV cured flowable layer to a second curing process, the second curing process being a plasma or plasma-assisted process, and performing sequentially and repeatedly the deposition process, the first curing process, and the second curing process until the plasma cured flowable layer fills the trench and reaches a predetermined height over a top surface of the trench.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: July 7, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jingmei Liang, Yong Sun, Jinrui Guo, Praket P. Jha, Jung Chan Lee, Tza-Jing Gung, Mukund Srinivasan
  • Publication number: 20200173022
    Abstract: Embodiments of the disclosure describe an apparatus and a method for depositing a film layer that may have minimum contribution to overlay error after a sequence of deposition and lithographic exposure processes. In one example, a method includes positioning a substrate on a substrate support in a process chamber, and flowing a deposition gas mixture comprising a silicon containing gas and a reacting gas to the process chamber through a showerhead having a convex surface facing the substrate support or a concave surface facing the substrate support in accordance with a stress profile of the substrate. A plasma is formed in the presence of the deposition gas mixture in the process chamber by applying an RF power to multiple coupling points of the showerhead that are symmetrically arranged about a center point of the showerhead. A deposition process is then performed on the substrate.
    Type: Application
    Filed: November 8, 2019
    Publication date: June 4, 2020
    Inventors: Xinhai HAN, Deenesh PADHI, Daemian Raj BENJAMIN RAJ, Kristopher ENSLOW, Wenjiao WANG, Masaki OGATA, Sai Susmita ADDEPALLI, Nikhil Sudhindrarao JORAPUR, Gregory Eugene CHICHKANOFF, Shailendra SRIVASTAVA, Jonghoon BAEK, Zakaria IBRAHIMI, Juan Carlos ROCHA-ALVAREZ, Tza-Jing GUNG
  • Publication number: 20200144029
    Abstract: Embodiments described herein relate to magnetic and electromagnetic systems and a method for controlling the density profile of plasma generated in a process volume of a PECVD chamber to affect deposition profile of a film. In one embodiment, a plurality of retaining brackets is disposed in a rotational magnetic housing of the magnetic housing systems. Each retaining bracket of the plurality of retaining brackets is disposed in the rotational magnetic housing with a distance d between each retaining bracket. The plurality of retaining brackets has a plurality of magnets removably disposed therein. The plurality of magnets is configured to travel in a circular path when the rotational magnetic housing is rotated around the round central opening.
    Type: Application
    Filed: November 1, 2019
    Publication date: May 7, 2020
    Inventors: Srinivas GANDIKOTA, Tza-Jing GUNG, Samuel E. GOTTHEIM, Timothy Joseph FRANKLIN, Pramit MANNA, Eswaranand VENKATASUBRAMANIAN, Edward HAYWOOD, Stephen C. GARNER
  • Patent number: 10595477
    Abstract: Aspects disclosed herein relate to methods of depositing pure silicon oxide on a substrate using Octamethylcyclotetrasiloxane (OMCTS) precursor. In one aspect, the method generally includes positioning a substrate in a processing chamber, introducing an oxygen-containing gas into the processing chamber, introducing OMCTS precursor into the processing chamber, and reacting the oxygen-containing gas and the OMCTS precursor to remove carbon and deposit pure silicon oxide on the substrate.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: March 24, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Lei Guo, Praket P. Jha, Milind Gadre, Deenesh Padhi, Tza-Jing Gung
  • Patent number: 10597785
    Abstract: Implementations described herein generally relate to metal oxide deposition in a processing chamber. More specifically, implementations disclosed herein relate to a combined chemical vapor deposition and physical vapor deposition chamber. Utilizing a single oxide metal deposition chamber capable of performing both CVD and PVD advantageously reduces the cost of uniform semiconductor processing. Additionally, the single oxide metal deposition system reduces the time necessary to deposit semiconductor substrates and reduces the foot print required to process semiconductor substrates. In one implementation, the processing chamber includes a gas distribution plate disposed in a chamber body, one or more metal targets disposed in the chamber body, and a substrate support disposed below the gas distribution plate and the one or more targets.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: March 24, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Anantha K. Subramani, Praburam Gopalraja, Tza-Jing Gung, Hari K. Ponnekanti, Philip Allan Kraus
  • Patent number: 10577689
    Abstract: In one implementation, a sputtering showerhead assembly is provided. The sputtering showerhead assembly comprises a faceplate comprising a sputtering surface comprising a target material and a second surface opposing the sputtering surface, wherein a plurality of gas passages extend from the sputtering surface to the second surface. The sputtering showerhead assembly comprises further comprises a backing plate positioned adjacent to the second surface of the faceplate. The backing plate comprises a first surface and a second surface opposing the first surface. The sputtering showerhead assembly has a plenum defined by the first surface of the backing plate and the second surface of the faceplate. The sputtering showerhead assembly comprises further comprises one or more magnetrons positioned along the second surface of the backing plate.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: March 3, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Anantha K. Subramani, Tza-Jing Gung, Praburam Gopalraja, Hari K. Ponnekanti
  • Publication number: 20200043723
    Abstract: Embodiments described herein relate to manufacturing layer stacks of oxide/nitride (ON) layers with minimized in-plane distortion (IPD) and lithographic overlay errors. A method of forming a layer stack ON layers includes flowing a first silicon-containing gas, an oxygen-containing gas, and a first dilution gas. A RF power is symmetrically applied to form a first material layer of SiO2. A second silicon-containing gas, a nitrogen-containing gas, and a second dilution gas are flowed. A second RF power is symmetrically applied to form a second material layer of Si3N4. The flowing the first silicon-containing gas, the oxygen-containing gas, and the first dilution gas, the symmetrically applying the first RF power, the flowing the second silicon-containing gas, the nitrogen-containing gas, and the second dilution gas, and the symmetrically applying the second RF power is repeated until a desired number of first material layers and second material layers make up a layer stack.
    Type: Application
    Filed: July 18, 2019
    Publication date: February 6, 2020
    Inventors: Yongjing LIN, Tza-Jing GUNG, Masaki OGATA, Yusheng ZHOU, Xinhai HAN, Deenesh PADHI, Juan Carlos ROCHA, Amit Kumar BANSAL, Mukund SRINIVASAN
  • Patent number: 10553398
    Abstract: Embodiments of inductively coupled plasma (ICP) reactors are provided herein. In some embodiments, a dielectric window for an inductively coupled plasma reactor includes: a body including a first side, a second side opposite the first side, an edge, and a center, wherein the dielectric window has a dielectric coefficient that varies spatially. In some embodiments, an apparatus for processing a substrate includes: a process chamber having a processing volume disposed beneath a lid of the process chamber; and one or more inductive coils disposed above the lid to inductively couple RF energy into and to form a plasma in the processing volume above a substrate support disposed within the processing volume; wherein the lid is a dielectric window comprising a first side and an opposing second side that faces the processing volume, and wherein the lid has a dielectric coefficient that spatially varies to provide a varied power coupling of RF energy from the one or more inductive coils to the processing volume.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: February 4, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Samer Banna, Tza-Jing Gung, Vladimir Knyazik, Kyle Tantiwong, Dan A. Marohl, Valentin N. Todorow, Stephen Yuen