Patents by Inventor Tzu-Hung Lin

Tzu-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10446721
    Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a via penetrating the second semiconductor layer and the active layer to expose a surface of the first semiconductor layer; a first electrode formed in the via and on the second semiconductor layer; a second electrode formed on the second semiconductor layer; and an insulating structure covering the first electrode, the second electrode and the semiconductor structure and including a first opening to expose the first electrode and a second opening to expose the second electrode, wherein the first electrode and the second electrode respectively include a metal layer contacting the insulating layer, the metal layer includes a material including a surface tension value larger than 1500 dyne/cm and a standard reduction potential larger than 0.3 V.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: October 15, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Yi-Hung Lin, Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Jen-Chieh Yu, Guan-Wu Chen
  • Patent number: 10431569
    Abstract: A method of transferring micro devices is provided. A carrier substrate including a buffer layer and a plurality of micro devices is provided. The buffer layer is located between the carrier substrate and the micro devices. The micro devices are separated from one another and positioned on the carrier substrate through the buffer layer. A receiving substrate contacts the micro devices disposed on the carrier substrate. A temperature of at least one of the carrier substrate and the receiving substrate is changed, so that at least a portion of the micro devices are released from the carrier substrate and transferred onto the receiving substrate. A number of the at least a portion of the micro devices is between 1000 and 2000000.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: October 1, 2019
    Assignee: PlayNitride Inc.
    Inventors: Yun-Li Li, Tzu-Yang Lin, Yu-Hung Lai, Pei-Hsin Chen
  • Patent number: 10431564
    Abstract: A chip package structure and a method for forming a chip package are provided. The chip package structure includes a chip package over a printed circuit board and multiple conductive bumps between the chip package and the printed circuit board. The chip package structure also includes one or more thermal conductive elements between the chip package and the printed circuit board. The thermal conductive element has a thermal conductivity higher than a thermal conductivity of each of the conductive bumps.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: October 1, 2019
    Assignee: MediaTek Inc.
    Inventor: Tzu-Hung Lin
  • Publication number: 20190296188
    Abstract: A ?LED chip having at least two light-emitting regions and including an epitaxial structure layer, a first-type electrode and at least two second-type electrodes is provided. The epitaxial structure layer includes a first-type semiconductor layer, at least two light-emitting layers and at least two second-type semiconductor layers. The light-emitting layers are respectively located in the light-emitting regions, one of the light-emitting layers has a first area, and the other light-emitting layer has a second area. A ratio of the first area to the second area is between 1.5 and 3, and a difference in current densities respectively passing through the at least two light-emitting regions is less than 10%. The light-emitting layers are located between the first-type semiconductor layer and the second-type semiconductor layers. The first-type electrode is electrically connected to the first-type semiconductor layer.
    Type: Application
    Filed: June 12, 2019
    Publication date: September 26, 2019
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Yu-Hung Lai, Yu-Yun Lo, Tzu-Yang Lin, Yun-Li Li
  • Publication number: 20190295980
    Abstract: A flip chip package includes a substrate having a die attach surface; and a die mounted on the die attach surface with an active surface of the die facing the substrate, wherein the die is interconnected to the substrate via a plurality of copper pillar bumps on the active surface, wherein at least one of the plurality of copper pillar bumps has a bump width that is substantially equal to or smaller than a line width of a trace on the die attach surface of the substrate.
    Type: Application
    Filed: June 13, 2019
    Publication date: September 26, 2019
    Inventors: Tzu-Hung Lin, Thomas Matthew Gregorich
  • Patent number: 10424615
    Abstract: A display panel including a backplane, a first bonding layer, a plurality of micro light-emitting diodes, a first insulation layer, and a second bonding layer is provided. The first bonding layer is disposed on the backplane. The micro light-emitting diodes are disposed on the first bonding layer and are electrically connected to the first bonding layer. The first insulation layer is located between any adjacent two of the micro light-emitting diodes. The first insulation layer has a concave-convex surface. The second bonding layer is disposed on the micro light-emitting diodes and the first insulation layer and is electrically connected to the micro light-emitting diodes. A micro light-emitting diode apparatus including a substrate, a plurality of micro light-emitting diodes, and a first insulation layer is provided. The first insulation layer is located between any adjacent two of the micro light-emitting diodes. The first insulation layer has a concave-convex surface.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: September 24, 2019
    Assignee: PlayNitride Inc.
    Inventors: Chih-Ling Wu, Yu-Hung Lai, Yi-Min Su, Yu-Yun Lo, Tzu-Yang Lin
  • Patent number: 10424563
    Abstract: A semiconductor package assembly is provided. The semiconductor package assembly includes a semiconductor package. The semiconductor package includes a semiconductor die. A redistribution layer (RDL) structure is disposed on the semiconductor die and is electrically connected to the semiconductor die. An active or passive element is disposed between the semiconductor die and the RDL structure. A molding compound surrounds the semiconductor die and the active or passive element.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: September 24, 2019
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, I-Hsuan Peng, Ching-Wen Hsiao
  • Publication number: 20190288245
    Abstract: A display including a back plate, a plurality of light emitting devices and a plurality of compensating light emitting devices is provided. The back plate has a plurality of pixels and at least one compensated region. The compensated region includes some of the pixels. The light emitting devices are arranged in all the pixels on the back plate. The compensated light emitting devices are disposed on the back plate and located in each pixel in the compensated region respectively. At least one of the pixels in the compensated region is dead pixel. Besides, a repair method of the display is also provided.
    Type: Application
    Filed: June 5, 2019
    Publication date: September 19, 2019
    Applicant: PlayNitride Inc.
    Inventors: Yu-Hung Lai, Yun-Li Li, Tzu-Yang Lin
  • Patent number: 10410969
    Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package and a second semiconductor package overlying a portion of the first semiconductor package. The first semiconductor package includes a first redistribution layer (RDL) structure, a first semiconductor die and a molding compound. The first semiconductor die is disposed on a first surface of the first RDL structure and electrically coupled to the first RDL structure. The molding compound is positioned overlying the first semiconductor die and the first surface of the first RDL structure. The second semiconductor package includes a first memory die and a second memory die vertically stacked on the first memory die. The second memory die is electrically coupled to first memory die by through silicon via (TSV) interconnects formed passing through the second memory die.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: September 10, 2019
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Hung Lin, Chia-Cheng Chang, I-Hsuan Peng
  • Patent number: 10410577
    Abstract: A display panel including a backplane and a plurality of micro LEDs is provided. The backplane includes a plurality of sub-pixels. Each of the sub-pixels has N sets of bonding pad. Each set of bonding pads includes a first electrical pad and X second electrical pads. N is an integer of 1˜3, X is an integer of 2˜4. The micro LEDs are respectively disposed in the sub-pixels, and the micro LED is electrically connected to one corresponding set of bonding pads of the N bonding pad sets. A first electrical carrier and a second electrical carrier are provided by the backplane to each of the micro LEDs through the one corresponding set of bonding pads.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: September 10, 2019
    Assignee: PlayNitride Inc.
    Inventors: Yu-Hung Lai, Tzu-Yang Lin, Yun-Li Li, Yu-Yun Lo
  • Patent number: 10411162
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer; a plurality of first trenches penetrating the second semiconductor layer and the active layer to expose the first semiconductor layer; a second trench penetrating the second semiconductor layer and the active layer to expose the first semiconductor layer, wherein the second trench is disposed near an outmost edge of the active layer, and surrounds the active layer and the plurality of first trenches; a patterned metal layer formed on the second semiconductor layer and formed in one of the plurality of first trenches or the second trench; and a first pad portion and a second pad portion both formed on the second semiconductor layer and electrically connecting the second semiconductor layer and the first semiconductor layer respectively.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: September 10, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Tsung-Hsun Chiang, Bo-Jiun Hu, Wen-Hung Chuang, Yu-Ling Lin
  • Publication number: 20190252574
    Abstract: A method for manufacturing a micro light emitting diode device is provided. A connection layer and epitaxial structures are formed on a substrate. A first pad is formed on each of the epitaxial structures. A first adhesive layer is formed on the connection layer, and the first adhesive layer encapsulates the epitaxial structures and the first pads. A first substrate is connected to the first adhesive layer. The substrate is removed, and a second substrate is connected to the connection layer through a second adhesive layer. The first substrate and the first adhesive layer are removed. The connection layer located between any two adjacent epitaxial structures are partially removed to form a plurality of connection portions. Each of the connection portions is connected to the corresponding epitaxial structure, and a side edge of each of the connection portions protrudes from a side wall surface of the corresponding epitaxial structure.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 15, 2019
    Applicant: PlayNitride Inc..
    Inventors: Yu-Yun Lo, Tzu-Yang Lin, Yu-Hung Lai
  • Publication number: 20190252351
    Abstract: A semiconductor package structure including a first semiconductor package is provided. The first semiconductor package includes a first semiconductor package including a first redistribution layer (RDL) structure having a first surface and a second surface opposite thereto. A first semiconductor die and a first molding compound that surrounds the first semiconductor die are disposed on the first surface of the first RDL structure. An IMD structure having a conductive layer with an antenna pattern or a conductive shielding layer is disposed on the first molding compound and the first semiconductor die.
    Type: Application
    Filed: February 19, 2019
    Publication date: August 15, 2019
    Applicant: MediaTek Inc.
    Inventors: Tzu-Hung Lin, I-Hsuan Peng, Nai-Wei Liu, Ching-Wen Hsiao, Wei-Che Huang
  • Publication number: 20190244935
    Abstract: A device is provided, including: a first device package including: a first redistribution structure including a first redistribution line and a second redistribution line; a die on the first redistribution structure; a first via coupled to a first side of the first redistribution line; a second via coupled to a first side of the second redistribution line and extending through the second redistribution line; an encapsulant surrounding the die, the first via, and the second via; and a second redistribution structure over the encapsulant, the second redistribution structure electrically connected to the die, the first via, and the second via; a first conductive connector coupled to a second side of the first redistribution line, the first conductive connector disposed along a different axis than a longitudinal axis of the first via; and a second conductive connector coupled to a second side of the second redistribution line, the second conductive connector disposed along a longitudinal axis of the second via.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 8, 2019
    Inventors: Chen-Hua Yu, Ming Hung Tseng, Yen-Liang Lin, Tzu-Sung Huang, Tin-Hao Kuo, Hao-Yi Tsai
  • Publication number: 20190245116
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.
    Type: Application
    Filed: April 15, 2019
    Publication date: August 8, 2019
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO
  • Patent number: 10361173
    Abstract: A semiconductor package assembly includes a first semiconductor package. The first semiconductor package has a semiconductor die having pads thereon, first vias disposed on the first semiconductor die, the first vias coupled to the pads. A second semiconductor package is stacked on the first semiconductor package and includes a body having a die-attach surface and a bump-attach surface opposite to the die-attach surface, a first memory die mounted on the bump-attach surface, coupled to the body, and a second memory die mounted on the die-attach surface, coupled to the body through the bonding wires. The number of input/output (I/O) pins of first memory die is different from the number of input/output (I/O) pins of the second memory die.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: July 23, 2019
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, Ming-Tzong Yang
  • Patent number: 10354981
    Abstract: A display including a back plate, a plurality of light emitting devices and a plurality of compensating light emitting devices is provided. The back plate has a plurality of pixels and at least one compensated region. The compensated region includes some of the pixels. The light emitting devices are arranged in all the pixels on the back plate. The compensated light emitting devices are disposed on the back plate and located in each pixel in the compensated region respectively. At least one of the pixels in the compensated region is dead pixel. Besides, a repair method of the display is also provided.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: July 16, 2019
    Assignee: PlayNitride Inc.
    Inventors: Yu-Hung Lai, Yun-Li Li, Tzu-Yang Lin
  • Patent number: 10354970
    Abstract: A flip chip package includes a substrate having a die attach surface; and a die mounted on the die attach surface with an active surface of the die facing the substrate, wherein the die is interconnected to the substrate via a plurality of copper pillar bumps on the active surface, wherein at least one of the plurality of copper pillar bumps has a bump width that is substantially equal to or smaller than a line width of a trace on the die attach surface of the substrate.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: July 16, 2019
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Hung Lin, Thomas Matthew Gregorich
  • Patent number: 10348839
    Abstract: A device management method for use in a cloud system including a remote device, a mobile device and a cloud server is provided. The method includes the steps of: using, by the mobile device and the remote device, a same login information to log in the cloud server; sending, by the remote device, a push notification message to the mobile device through the cloud server when detecting that a first device is connected to a connection port, wherein the push notification message includes first identification information corresponding to the first device; and in response to receiving the push notification message, identifying, by the mobile device, the first device according to the first identification information to activate a respective application so as to perform data transmission with the first device through the respective application.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: July 9, 2019
    Assignee: ACER INCORPORATED
    Inventors: Cheng-Hung Chen, Chao-Kuang Yang, Wen-Cheng Hsu, Shih-Hao Lin, Chia-Hsun Lee, Chi-Hung Chang, Tzu-Kang Huang, Chen-Hsiang Ko, Chi-Sheng Lin
  • Patent number: 10332830
    Abstract: A semiconductor package assembly having a first semiconductor package, with a first redistribution layer (RDL) structure, a first semiconductor die having through silicon via (TSV) interconnects formed passing therethrough coupled to the first RDL structure, and a second semiconductor package stacked on the first semiconductor package with a second redistribution layer (RDL) structure. The assembly further includes a second semiconductor die without through silicon via (TSV) interconnects formed passing therethrough, coupled to the second RDL structure, and a third semiconductor package stacked on the second semiconductor package, having a third redistribution layer (RDL) structure, a third semiconductor die without through silicon via (TSV) interconnects formed passing therethrough coupled to the third RDL structure.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: June 25, 2019
    Assignee: MEDIATEK INC.
    Inventors: Ming-Tzong Yang, Wei-Che Huang, Tzu-Hung Lin