Patents by Inventor Tzu-Hung Lin

Tzu-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10553526
    Abstract: A semiconductor package is provided. In one configuration, the semiconductor package includes a substrate having a die attach surface. A conductive trace is disposed on the substrate, wherein the conductive trace is elongated and carries a signal or a ground across at least a portion of the substrate. A die is mounted on the die attach surface of the substrate via a conductive pillar bump, the conductive pillar bump being rounded and elongated such that the conductive pillar bump extends along a length of the conductive trace and contacts the conductive trace at an end or at an intermediate portion thereof. The die further includes a metal pad electrically coupling to the conductive pillar bump, wherein the metal pad has a first edge and a second edge substantially vertical to the first edge, and wherein the first edge is not adjacent to the second edge.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: February 4, 2020
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Tzu-Hung Lin, Ta-Jen Yu
  • Publication number: 20200035749
    Abstract: A micro LED display panel includes a display area, a plurality of micro light-emitting elements and a plurality of micro control elements. The plurality of micro light-emitting elements is disposed in the display area and include a plurality of first color micro LEDs and a plurality of second color micro LEDs. A light wavelength of each of the first color micro LEDs is different from a light wavelength of each of the second color micro LEDs. The plurality of micro control elements is disposed in the display area, and include a plurality of first color micro circuit-chips and a plurality of second color micro circuit-chips. The plurality of first color micro circuit-chips control the plurality of first color micro LEDs, and the plurality of second color micro circuit-chips control the plurality of second color micro LEDs.
    Type: Application
    Filed: December 4, 2018
    Publication date: January 30, 2020
    Applicant: PIXELED DISPLAY CO., LTD.
    Inventors: Pei-Hsin CHEN, Yi-Chun SHIH, Yi-Ching CHEN, Ying-Tsang LIU, Yu-Chu LI, Tzu-Yang LIN, Yu-Hung LAI
  • Publication number: 20200020829
    Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a via penetrating the second semiconductor layer and the active layer to expose a surface of the first semiconductor layer; a first electrode formed in the via and on the second semiconductor layer; a second electrode formed on the second semiconductor layer; and an insulating structure covering the first electrode, the second electrode and the semiconductor structure and including a first opening to expose the first electrode and a second opening to expose the second electrode, wherein the first electrode and the second electrode respectively include a metal layer contacting the insulating layer, the metal layer includes a material including a surface tension value larger than 1500 dyne/cm and a standard reduction potential larger than 0.3 V.
    Type: Application
    Filed: September 10, 2019
    Publication date: January 16, 2020
    Inventors: Yi-Hung Lin, Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Jen-Chieh Yu, Guan-Wu Chen
  • Publication number: 20200013735
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first redistribution layer (RDL) structure formed on a non-active surface of a semiconductor die. A second RDL structure is formed on and electrically coupled to an active surface of the semiconductor die. A ground layer is formed in the first RDL structure. A first molding compound layer is formed on the first RDL structure. A first antenna includes a first antenna element formed in the second RDL structure and a second antenna element formed on the first molding compound layer. Each of the first antenna element and the second antenna element has a first portion overlapping the semiconductor die as viewed from a top-view perspective.
    Type: Application
    Filed: June 25, 2019
    Publication date: January 9, 2020
    Applicant: MediaTek Inc.
    Inventors: Nai-Wei Liu, Yen-Yao Chi, Yeh-Chun Kao, Shih-Huang Yeh, Tzu-Hung Lin, Wen-Sung Hsu
  • Publication number: 20200006289
    Abstract: A semiconductor package structure includes a substrate having a first surface and second surface opposite thereto, a first semiconductor die disposed on the first surface of the substrate, a second semiconductor die disposed on the first surface, a molding material surrounding the first semiconductor die and the second semiconductor die, and an annular frame mounted on the first surface of the substrate. The first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. The first semiconductor die is separated from the second semiconductor die by the molding material. The substrate includes a wiring structure. The first semiconductor die and the second semiconductor die are electrically coupled to the wiring structure. The annular frame surrounds the first semiconductor die and the second semiconductor die. The annular frame includes a retracted region at an outer corner of the annular frame.
    Type: Application
    Filed: September 8, 2019
    Publication date: January 2, 2020
    Inventors: Chia-Cheng Chang, Tzu-Hung Lin, I-Hsuan Peng, Yi-Jou Lin
  • Patent number: 10522712
    Abstract: A micro light-emitting diode chip includes an epitaxial structure, a first electrode, and a second electrode. The epitaxial structure includes a first type doped semiconductor layer, a light emitting layer, and a second type doped semiconductor layer, and the epitaxial structure further includes a first surface, side surface and a second surface opposite to the first surface. The first electrode is disposed on the first surface, and is electrically connected to the first type doped semiconductor layer and contacted the first type doped semiconductor layer on a portion of the first surface. The second electrode is disposed on the first surface and the side surface, and is electrically connected to the second type doped semiconductor layer and contacted the second type doped semiconductor layer on a portion of the side surface. A length of a diagonal of the micro light-emitting diode chip is greater than 1 micrometer and is less than or equal to 140 micrometers.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: December 31, 2019
    Assignee: PlayNitride Inc.
    Inventors: Yu-Hung Lai, Yu-Yun Lo, Tzu-Yang Lin
  • Patent number: 10522520
    Abstract: A micro-LED display panel including a substrate, a plurality of micro-LEDs, and a plurality of reinforced structures is provided. The micro-LEDs are disposed at a side of the substrate, wherein each of the micro-LEDs comprises an epitaxial layer and an electrode layer electrically connected to the epitaxial layer, and the electrode layer are located between the epitaxial layers and the substrate. Each of the micro-LEDs is electrically connected to the substrate through the corresponding electrode layer. Each of electrode layers includes a first electrode and a second electrode. The reinforced structures are disposed between the micro-LEDs and the substrate respectively, and each of the reinforced structures is located between the corresponding the first electrode and the second electrode. A Young's modulus of each of reinforced structures is smaller than a Young's modulus of the corresponding electrode layer.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: December 31, 2019
    Assignee: PixeLED Display CO., LTD.
    Inventors: Ying-Tsang Liu, Yu-Chu Li, Pei-Hsin Chen, Yi-Ching Chen, Tzu-Yang Lin, Yu-Hung Lai
  • Patent number: 10511140
    Abstract: A light-emitting device is provided. The light-emitting device comprises: a substrate; and multiple radiation emitting regions arranged on the substrate, and comprising: a first radiation emitting region capable of emitting coherent light and emits a coherent light when driven by a first current; a second radiation emitting region capable of emitting coherent light and emits an incoherent light when driven by the first current, wherein each of the first radiation emitting region and the second emitting region comprises epitaxial structure comprising a first DBR stack, a light-emitting structure, and a second DBR stack.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: December 17, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Tzu-Chieh Hsu, Yi-Wen Huang, Yi-Hung Lin, Chih-Chiang Lu
  • Publication number: 20190378452
    Abstract: A display apparatus includes a driving substrate and a plurality of micro light-emitting devices (LEDs). The driving substrate has a plurality of pixel regions. The plurality micro LEDs are disposed in in each of the pixel regions and electrically connected to the driving substrate. Orthogonal projection areas of the micro LEDs in each of the pixel regions on the driving substrate are equal. At least two micro LEDs in each of the pixel regions have different effective light-emitting areas.
    Type: Application
    Filed: June 4, 2019
    Publication date: December 12, 2019
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Tzu-Yang Lin, Yu-Hung Lai, Pei-Hsin Chen, Yi-Chun Shih, Yi-Ching Chen, Yu-Chu Li, Ying-Tsang Liu
  • Patent number: 10497689
    Abstract: A semiconductor package assembly is provided. The semiconductor package assembly includes a semiconductor die and a first memory die disposed on a first surface of a substrate, wherein the first memory die comprises a first edge facing the semiconductor die. The semiconductor die includes a peripheral region having a second edge facing the first edge of the first memory die and a third edge opposite to the second edge. The semiconductor die also includes a circuit region surrounded by the peripheral region, wherein the circuit region has a fourth edge adjacent to the second edge and a fifth edge adjacent to the third edge. A minimum distance between the second edge and the fourth edge is a first distance, a minimum distance between the third edge and the fifth edge is a second distance, and the first distance is different from the second distance.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: December 3, 2019
    Assignee: MEDIATEK INC.
    Inventors: Chia-Cheng Chang, I-Hsuan Peng, Tzu-Hung Lin
  • Patent number: 10483211
    Abstract: A semiconductor package structure including a first semiconductor package is provided. The first semiconductor package includes a first redistribution layer (RDL) structure having a first surface and a second surface opposite thereto. A first semiconductor die is disposed on and electrically coupled to the first surface of the first RDL structure. A first molding compound is disposed on the first surface of the first RDL structure and surrounds the first semiconductor die. A plurality of solder balls or conductive pillar structures is disposed in the first molding compound and electrically coupled to the first semiconductor die through the first RDL structure. A method for forming the semiconductor package is also provided.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: November 19, 2019
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, I-Hsuan Peng, Ching-Wen Hsiao, Nai-Wei Liu, Wei-Che Huang
  • Publication number: 20190348747
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a redistribution layer (RDL) structure formed on a non-active surface of a semiconductor die. An antenna structure includes a first antenna element formed in the RDL structure, a first insulating layer covering the RDL structure, a second insulating layer formed on the first insulating layer, and a second antenna element formed on and in direct contact with the second insulating layer.
    Type: Application
    Filed: April 17, 2019
    Publication date: November 14, 2019
    Applicant: MediaTek Inc.
    Inventors: Nai-Wei Liu, Yen-Yao Chi, Yeh-Chun Kao, Shih-Huang Yeh, Tzu-Hung Lin, Wen-Sung Hsu
  • Publication number: 20190348756
    Abstract: A method of forming a semiconductor package structure includes providing a first wafer-level package structure having a die region surrounded by a scribe line region. The first wafer-level package structure includes a first encapsulating layer, a first redistribution layer (RDL) structure formed on the first encapsulating layer, a first antenna element formed in the first RDL structure and corresponding to the die region, and a semiconductor die in the first encapsulating layer and corresponding to the die region. A second wafer-level package structure is bonded onto the first RDL structure using a first adhesive layer. The second wafer-level package structure includes a second encapsulating layer attached to the first adhesive layer, and a second antenna element formed on the second encapsulating layer. The second antenna element and the first antenna element form a pitch antenna after the bonding of the second wafer-level package structure.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 14, 2019
    Applicant: MediaTek Inc.
    Inventors: Nai-Wei Liu, Yen-Yao Chi, Tzu-Hung Lin, Wen-Sung Hsu
  • Publication number: 20190348570
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer; a plurality of first trenches penetrating the second semiconductor layer and the active layer to expose the first semiconductor layer; a second trench penetrating the second semiconductor layer and the active layer to expose the first semiconductor layer, wherein the second trench is disposed near an outmost edge of the active layer, and surrounds the active layer and the plurality of first trenches; a patterned metal layer formed on the second semiconductor layer and formed in one of the plurality of first trenches or the second trench; and a first pad portion and a second pad portion both formed on the second semiconductor layer and electrically connecting the second semiconductor layer and the first semiconductor layer respectively.
    Type: Application
    Filed: July 23, 2019
    Publication date: November 14, 2019
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Publication number: 20190348748
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor die surrounded by a first molding compound layer. A redistribution layer (RDL) structure is formed on a non-active surface of the semiconductor die and the first molding compound layer. A second molding compound layer is formed on the RDL structure. An insulating capping layer covers the second molding compound layer. An antenna is electrically coupled to the semiconductor die and includes a first antenna element formed in the RDL structure and a second antenna element formed between the second molding compound layer and the insulating capping layer.
    Type: Application
    Filed: April 17, 2019
    Publication date: November 14, 2019
    Applicant: MediaTek Inc.
    Inventors: Nai-Wei Liu, Yen-Yao Chi, Tzu-Hung Lin, Wen-Sung Hsu
  • Patent number: 10476043
    Abstract: A display including a back plate, a plurality of light emitting devices and a plurality of compensating light emitting devices is provided. The back plate has a plurality of pixels and at least one compensated region. The compensated region includes some of the pixels. The light emitting devices are arranged in all the pixels on the back plate. The compensated light emitting devices are disposed on the back plate and located in each pixel in the compensated region respectively. At least one of the pixels in the compensated region is dead pixel. Besides, a repair method of the display is also provided.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: November 12, 2019
    Assignee: PlayNitride Inc.
    Inventors: Yu-Hung Lai, Yun-Li Li, Tzu-Yang Lin
  • Patent number: 10468341
    Abstract: A semiconductor package assembly includes a redistribution layer (RDL) structure, which RDL structure includes a conductive trace. A redistribution layer (RDL) contact pad is electrically coupled to the conductive trace, and the RDL contact pad is composed of a symmetrical portion and an extended wing portion connected to the symmetrical portion. The RDL structure includes a first region for a semiconductor die to be disposed thereon and a second region surrounding the first region, and the extended wing portion of the RDL contact pad is offset from a center of the first region.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: November 5, 2019
    Assignee: MEDIATEK INC.
    Inventors: Nai-Wei Liu, Tzu-Hung Lin, I-Hsuan Peng, Che-Hung Kuo, Che-Ya Chou, Wei-Che Huang
  • Publication number: 20190326143
    Abstract: A transfer substrate is configured to transfer a plurality of micro components from a first substrate to a second substrate. The transfer substrate comprises a base and a plurality of transfer heads. The base includes an upper surface. The plurality of transfer heads is disposed on the upper surface of the base, wherein each transfer head includes a first surface and a second surface opposite to each other and the transfer heads contact the base with the first surfaces thereof. A plurality of adhesion lumps is separated from each other, wherein each adhesion lump is disposed on the second surface of one of the transfer heads. A CTE of the base is different from CTEs of the transfer heads.
    Type: Application
    Filed: April 17, 2019
    Publication date: October 24, 2019
    Applicant: PLAYNITRIDE INC.
    Inventors: Yu-Hung LAI, Tzu-Yang LIN, Yun-Li LI
  • Patent number: 10446721
    Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a via penetrating the second semiconductor layer and the active layer to expose a surface of the first semiconductor layer; a first electrode formed in the via and on the second semiconductor layer; a second electrode formed on the second semiconductor layer; and an insulating structure covering the first electrode, the second electrode and the semiconductor structure and including a first opening to expose the first electrode and a second opening to expose the second electrode, wherein the first electrode and the second electrode respectively include a metal layer contacting the insulating layer, the metal layer includes a material including a surface tension value larger than 1500 dyne/cm and a standard reduction potential larger than 0.3 V.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: October 15, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Yi-Hung Lin, Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Jen-Chieh Yu, Guan-Wu Chen
  • Patent number: 10431569
    Abstract: A method of transferring micro devices is provided. A carrier substrate including a buffer layer and a plurality of micro devices is provided. The buffer layer is located between the carrier substrate and the micro devices. The micro devices are separated from one another and positioned on the carrier substrate through the buffer layer. A receiving substrate contacts the micro devices disposed on the carrier substrate. A temperature of at least one of the carrier substrate and the receiving substrate is changed, so that at least a portion of the micro devices are released from the carrier substrate and transferred onto the receiving substrate. A number of the at least a portion of the micro devices is between 1000 and 2000000.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: October 1, 2019
    Assignee: PlayNitride Inc.
    Inventors: Yun-Li Li, Tzu-Yang Lin, Yu-Hung Lai, Pei-Hsin Chen