Patents by Inventor Umesh Chandra

Umesh Chandra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11656264
    Abstract: A high-speed signal subsystem testing system includes a processing system having a transmitter and a receiver, a loop back subsystem coupled to the transmitter and receiver to provide a testing communication path between the transmitter and the receiver, and a communication path testing engine coupled to the transmitter and the receiver. The communication path testing engine generates test signal(s) and transmits the test signal(s) via the transmitter and through the testing communication path provided by the loop back subsystem and, in response, receives test signal result(s) via the receiver and through the testing communication path provided by the loop back subsystem, The communication path testing engine processes the test signal result(s) to generate a testing impedance profile for the testing communication path, and compares the testing impedance profile to an expected impedance profile to determine whether a testing communication path issue exists in the testing communication path.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: May 23, 2023
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav Mutnury
  • Publication number: 20230126467
    Abstract: A printed circuit board (PCB), including: a processing unit; a plurality of layers; and a plurality of vias, each via extending through two or more of the layers, wherein a first via of the plurality of vias has a first pad at a first layer of the plurality of layers and a second via of the plurality of vias has a second pad at the first layer of the plurality of layers, wherein the first pad is conjoined with the second pad to form a first heatsink at the first layer that dissipates heat away from the processing unit.
    Type: Application
    Filed: October 21, 2021
    Publication date: April 27, 2023
    Inventor: Umesh Chandra
  • Publication number: 20230119282
    Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may measure at least one of a first height value and a first width value of a first eye diagram of a first signal; measure at least one of a second height value and a second width value of a second eye diagram of a second signal; determine at least one of a height difference value and a width difference value respectively between the at least one of the first height value and the first width value of the first eye diagram and the at least one of the second height value and the second width value of the second eye diagram; and determine that the at least one of the height difference value and the width difference value respectively meets or exceeds a height threshold value or a width threshold value.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Bhyrav Mutnury, Umesh Chandra
  • Publication number: 20230122610
    Abstract: The Walnut Healthcare Global System is a creative tool to achieve maximum productivity through increasing health literacy involving multi-talented groups of people and technology working together to achieve the best results to reduce healthcare costs. Together with discovering the drivers of spending and spending growth in US health care. How do the organization’s strategy and decision-making processes impact total spending and value, and how to control them? Lifelong educational offerings that develop management competencies and improving professional skills are vital to succeed through this tool. The Self Power can be learned, it is that kind of power that helps you see things through your inner eye. For “The Self Power” to work, organizations need to create an environment that encourages creativity and innovation. After that, they should focus on bringing together multi-talented groups of individuals who collaborate to exchange ideas and knowledge to shape the direction of the future.
    Type: Application
    Filed: October 15, 2021
    Publication date: April 20, 2023
    Inventor: Umesh Chandra Bhargava
  • Patent number: 11624626
    Abstract: A method, apparatus, and computer program product are therefore provided for providing natural guidance using one or more location graphs based on a context of a user. Methods may include: receiving an indication of a location of a user; identifying a location graph of location objects proximate the location of the user; establishing a context of the user; establishing a path among the location objects of the location graph based, at least in part, on the context of the user; generating natural language guidance based on the path among the location objects; and providing natural language guidance to the user. The location of a user may include a location along a route between an origin and a destination, where identifying a location graph of location objects may include identifying a location graph of location objects proximate the route between the origin and the destination.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: April 11, 2023
    Assignee: HERE GLOBAL B.V.
    Inventors: Craig Barnes, Umesh Chandra, Geoff Meek
  • Patent number: 11585864
    Abstract: A high-speed signal subsystem testing system tests a processor transmitter and receiver coupled to a connector via a transmitter trace and a receiver trace, respectively. A transmitter test circuit on a testing board coupled to the connector compares a transmitter voltage received from the transmitter via the transmitter trace and the connector to a common mode voltage range and, in response to the transmitter voltage being outside the common mode voltage range, provides a transmitter trace issue signal. A receiver test circuit on the testing board coupled to the connector transmits a first test voltage towards the receiver, compares a second test voltage detected at the receiver test circuit in response to transmitting the first test voltage towards the receiver to a reference test voltage and, in response to the second test voltage being above the reference test voltage, provides a receiver trace issue signal.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: February 21, 2023
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav Mutnury
  • Publication number: 20230018015
    Abstract: A high-speed signal subsystem testing system includes a processing system having a transmitter and a receiver, a loop back subsystem coupled to the transmitter and receiver to provide a testing communication path between the transmitter and the receiver, and a communication path testing engine coupled to the transmitter and the receiver. The communication path testing engine generates test signal(s) and transmits the test signal(s) via the transmitter and through the testing communication path provided by the loop back subsystem and, in response, receives test signal result(s) via the receiver and through the testing communication path provided by the loop back subsystem, The communication path testing engine processes the test signal result(s) to generate a testing impedance profile for the testing communication path, and compares the testing impedance profile to an expected impedance profile to determine whether a testing communication path issue exists in the testing communication path.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 19, 2023
    Inventors: Umesh Chandra, Bhyrav Mutnury
  • Publication number: 20220390527
    Abstract: A high-speed signal subsystem testing system tests a processor transmitter and receiver coupled to a connector via a transmitter trace and a receiver trace, respectively. A transmitter test circuit on a testing board coupled to the connector compares a transmitter voltage received from the transmitter via the transmitter trace and the connector to a common mode voltage range and, in response to the transmitter voltage being outside the common mode voltage range, provides a transmitter trace issue signal. A receiver test circuit on the testing board coupled to the connector transmits a first test voltage towards the receiver, compares a second test voltage detected at the receiver test circuit in response to transmitting the first test voltage towards the receiver to a reference test voltage and, in response to the second test voltage being above the reference test voltage, provides a receiver trace issue signal.
    Type: Application
    Filed: June 2, 2021
    Publication date: December 8, 2022
    Inventors: Umesh Chandra, Bhyrav Mutnury
  • Patent number: 11490504
    Abstract: A high-speed transmission circuit design reduces or eliminates the presence of unwanted stub-effects and avoids uncontrolled line impedances that in existing circuits cause impedance mismatches that give rise to unwanted reflections and, ultimately, degrade signal integrity, e.g., in belly-to-belly configurations involving Quad Small Form-Factor Pluggable Double Density (QSFP DD) connectors. In various embodiments, by preventing overcrowding of signal lines, the circuit design further reduces crosstalk and increases signal integrity.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: November 1, 2022
    Assignee: DELL PRODUCTS L.P.
    Inventor: Umesh Chandra
  • Patent number: 11477890
    Abstract: A high-speed transmission circuit comprises a connector pin that serves as part of a signal path, has a first conductivity, and has a connector pin leg that is coupled to a pad that has a second conductivity lower than the first conductivity. The connector pin leg and at least a portion of the pad form a resonant sub-circuit coupled to the signal path. The second conductivity causes a reduction in insertion loss in the signal path by damping a current in the resonant sub-circuit.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: October 18, 2022
    Assignee: DELL PRODUCTS L.P.
    Inventors: Umesh Chandra, Bhyrav Mutnury
  • Patent number: 11445599
    Abstract: A multi-layer PCB has conductive vias (134) passing through multiple layers. A layer may have a conductive non-functional feature (710) physically contacting a via but not surrounding the via, to make the PCB more resistant to thermal stresses while, at the same time, reducing the parasitic capacitance compared to a prior art non-functional pad (310n).
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: September 13, 2022
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav M. Mutnury
  • Publication number: 20220240366
    Abstract: A zoned dielectric loss circuit board system includes a board. A first differential trace is included in the board. A dielectric layer is included the board and that includes a first dielectric layer zone that engages the first differential trace and that includes first dielectric loss characteristics, and a second dielectric layer zone that is located immediately adjacent the first dielectric layer zone and that includes second dielectric loss characteristics that are greater than the first dielectric loss characteristics. A second differential trace may be included in the board in engagement with the second dielectric layer zone, and may have a second trace length that is shorter than a first trace length of the first differential trace.
    Type: Application
    Filed: January 26, 2021
    Publication date: July 28, 2022
    Inventor: Umesh Chandra
  • Patent number: 11348439
    Abstract: A corrosion monitoring/alerting system includes a chassis. A corrosion monitoring subsystem identifies a current humidity and a current temperature in the chassis, determines that the current humidity is above a corrosion-alert humidity and the current temperature is below a corrosion-alert temperature and, in response, generates a first corrosion alert signal. A corrosion alert subsystem identifies the first corrosion alert signal and, in response, transmits a first recommended corrosion remediation action communication. The corrosion monitoring subsystem may also transmit a test current through a test computing subsystem connection, determine that a test voltage generated in response to transmitting the test current through the test computing subsystem connection is below a corrosion-alert voltage and, response, generate a second corrosion alert signal.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: May 31, 2022
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav Mutnury
  • Publication number: 20220163197
    Abstract: A fuel-fired burner 100 includes a combustion air inlet 113 for receiving combustion air coupled to a combustion air nozzle 136 at an input to a second chamber 152 within a burner housing 110 spaced apart from a third chamber 168 within the second chamber. The combustion air nozzle 136 directs the combustion air 171 into the third chamber 168. A fuel inlet 111 coupled to a burner nozzle 167 secured to a burner mounting plate 161 has a recycle port 164 for receiving hot exhaust gas provided to an exhaust gas path 165. A jet pump located entirely inside the burner housing is configured to receive the hot exhaust gas from the exhaust gas path. The jet pump operates by flowing the combustion air through the combustion air nozzle 136 which suctions in the hot exhaust gas through the recycle port into the exhaust gas path then into a gas mixing zone 178 for mixing the hot exhaust gas and the combustion air.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 26, 2022
    Inventors: Curtis Lynn Taylor, Umesh Chandra Bhayaraju, Bradley Dean Patterson
  • Publication number: 20220110207
    Abstract: A high-speed transmission circuit design reduces or eliminates the presence of unwanted stub-effects and avoids uncontrolled line impedances that in existing circuits cause impedance mismatches that give rise to unwanted reflections and, ultimately, degrade signal integrity, e.g., in belly-to-belly configurations involving Quad Small Form-Factor Pluggable Double Density (QSFP DD) connectors. In various embodiments, by preventing overcrowding of signal lines, the circuit design further reduces crosstalk and increases signal integrity.
    Type: Application
    Filed: July 23, 2021
    Publication date: April 7, 2022
    Applicant: DELL PRODUCTS L.P.
    Inventor: Umesh CHANDRA
  • Patent number: 11276084
    Abstract: A data management platform server that organizes and transforms data in a 3-tier data structure. The server comprises an application stored in a memory that transforms data into profiles. The application stores the profiles to a profile data store. The application selects a first profile subset from the profiles based on a first criterion. The application selects a second profile subset form the profiles based on a second criterion, where at least some of the profiles in the first profile subset are not in the second profile subset and wherein at least some of the profiles in the second profile subset are not in the first profile subset. The application stores the first profile subset and the second profile subset to a profile data store. The application receives a request from an ad gateway for the first profile subset and transmits the first profile subset to the ad gateway.
    Type: Grant
    Filed: August 10, 2014
    Date of Patent: March 15, 2022
    Assignee: Sprint Communications Company L.P.
    Inventors: Robert H. Burcham, Geoffrey A. Holmes, Umesh Chandra Upadhyay
  • Publication number: 20210378094
    Abstract: A high-speed transmission circuit comprises, as part of a signal path, a connector pin disposed on a pad that comprises an unused pad region. The unused pad region is not considered part of the signal path but is part of a resonant sub-circuit. In various embodiments, by properly adjusting the dimensions of the pad region and other structures in the high-speed transmission circuit, resonant frequencies of the sub-circuit are shifted to a frequency range that is outside of the frequency range of interest in the signal path, thereby, reducing insertion loss and increasing signal integrity without compromising mechanical stability.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Umesh CHANDRA, Douglas WALLACE, Bhyrav MUTNURY
  • Publication number: 20210368623
    Abstract: A high-speed transmission circuit comprises a connector pin that serves as part of a signal path, has a first conductivity, and has a connector pin leg that is coupled to a pad that has a second conductivity lower than the first conductivity. The connector pin leg and at least a portion of the pad form a resonant sub-circuit coupled to the signal path. The second conductivity causes a reduction in insertion loss in the signal path by damping a current in the resonant sub-circuit.
    Type: Application
    Filed: May 22, 2020
    Publication date: November 25, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Umesh CHANDRA, Bhyrav MUTNURY
  • Patent number: 11102878
    Abstract: A high-speed transmission circuit design reduces or eliminates the presence of unwanted stub-effects and avoids uncontrolled line impedances that in existing circuits cause impedance mismatches that give rise to unwanted reflections and, ultimately, degrade signal integrity, e.g., in belly-to-belly configurations involving Quad Small Form-Factor Pluggable Double Density (QSFP DD) connectors. In various embodiments, by preventing overcrowding of signal lines, the circuit design further reduces crosstalk and increases signal integrity.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: August 24, 2021
    Assignee: DELL PRODUCTS L.P.
    Inventor: Umesh Chandra
  • Patent number: PP33197
    Abstract: The present invention relates to the development of a novel, morphologically and genetically distinct clone of vetiver [Vetiveria zizaniodes (L.) Nash. syn. Chrysopogon zizanioides (L.) Roberty; family Poacaeae] named ‘CIMAP-FORAGIKA’ that offers an ideal plant type to realize the twin application of Vetiver i.e. mitigation of soil erosion and landslides, as well as, a prospective forage in eco-plantations and cropping systems. This clone sports—(i) deep penetrating tufted roots coupled with profuse lateral secondary and tertiary roots that form an interwoven web of roots facilitating enhanced soil binding in landslide and erosion prone sites; and (ii) profuse shoot tillers bearing thinner leaves that have reduced (less) lignified tissue enabling leaf softness and palatability. The leaves of this clone are rich in protein (41 g/kg fresh weight) and crude fiber content (25 g/kg dry weight) but low in carbohydrates (31 g/kg dry weight), thus providing desirable digestibility and nutritional features.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: June 22, 2021
    Assignee: COUNCIL OF SCIENTIFIC AND INDUSTRIAL RESEARCH
    Inventors: Umesh Chandra Lavania, Seshu Lavania, Vimala Yerramilli, Basant Kumar Dubey, Madhavi Singh