Abstract: The present invention discloses a plurality of interdigitated pixels arranged in an array, having a very low series-resistances with improved current spreading and improved heat-sinking Each pixel is a square with sides of dimension 1. The series resistance is minimized by increasing the perimeter of an active region for the pixels. The series resistance is also minimized by shrinking the space between a mesa and n-contact for each pixel.

Abstract: The present invention discloses a plurality of interdigitated pixels arranged in an array, having a very low series-resistances with improved current spreading and improved heat-sinking. Each pixel is a square with sides of dimension l. The series resistance is minimized by increasing the perimeter of an active region for the pixels. The series resistance is also minimized by shrinking the space between a mesa and n-contact for each pixel.

Abstract: A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface.

Abstract: A method of fabricating a heterostructure device, including (a) obtaining a first layer or substrate; (b) growing a second layer on the first layer or substrate; and (c) forming the second layer that is at least partially relaxed wherein (1) the first layer and the second layer have the same lattice structure but different lattice constants, (2) the first layer and the second layer form a heterojunction, and (3) the heterojunction forms an active area of a device or serves as a pseudo-substrate for the device.

Abstract: A method for growth and fabrication of semipolar (Ga, Al, In, B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga, Al, In, B)N template or nucleation layer on the substrate, and growing the semipolar (Ga, Al, In, B)N thin films, heterostructures or devices on the planar semipolar (Ga, Al, In, B)N template or nucleation layer. The method results in a large area of the semipolar (Ga, Al, In, B)N thin films, heterostructures, and devices being parallel to the substrate surface.

Abstract: A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiNx) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiNx nanomask layer.

Abstract: A method for growing high mobility, high charge Nitrogen polar (N-polar) or Nitrogen face (In, Al, Ga)N/GaN High Electron Mobility Transistors (HEMTs). The method can provide a successful approach to increase the breakdown voltage and reduce the gate leakage of the N-polar HEMTs, which has great potential to improve the N-polar or N-face HEMTs' high frequency and high power performance.

Abstract: A method for fabricating an electronic device, comprising wafer bonding a first semiconductor material to a III-nitride semiconductor, at a temperature below 550° C., to form a device quality heterojunction between the first semiconductor material and the III-nitride semiconductor, wherein the first semiconductor material is different from the III-nitride semiconductor and is selected for superior properties, or preferred integration or fabrication characteristics in the injector region as compared to the III-nitride semiconductor.

Abstract: A method for the fabrication of nonpolar indium gallium nitride (InGaN) films as well as nonpolar InGaN-containing device structures using metalorganic chemical vapor deposition (MOVCD). The method is used to fabricate nonpolar InGaN/GaN violet and near-ultraviolet light emitting diodes and laser diodes.

Abstract: A field effect transistor including a compositionally graded group-III nitride layer on a silicon substrate.

Abstract: A method for the fabrication of nonpolar indium gallium nitride (InGaN) films as well as nonpolar InGaN-containing device structures using metalorganic chemical vapor deposition (MOVCD). The method is used to fabricate nonpolar InGaN/GaN violet and near-ultraviolet light emitting diodes and laser diodes.

Abstract: Methods for the heteroepitaxial growth of smooth, high quality films of N-face GaN film grown by MOCVD are disclosed. Use of a misoriented substrate and possibly nitridizing the substrate allow for the growth of smooth N-face GaN and other Group III nitride films as disclosed herein. The present invention also avoids the typical large (?m sized) hexagonal features which make N-face GaN material unacceptable for device applications. The present invention allows for the growth of smooth, high quality films which makes the development of N-face devices possible.

Abstract: A current aperture vertical electron transistor (CAVET) with ammonia (NH3) based molecular beam epitaxy (MBE) grown p-type Gallium Nitride (p-GaN) as a current blocking layer (CBL). Specifically, the CAVET features an active buried Magnesium (Mg) doped GaN layer for current blocking purposes. This structure is very advantageous for high power switching applications and for any device that requires a buried active p-GaN layer for its functionality.

Abstract: An (Al, Ga, In)N and ZnO direct wafer bonded light emitting diode (LED), wherein light passes through electrically conductive ZnO. Flat and clean surfaces are prepared for both the (Al, Ga, In)N and ZnO wafers. A wafer bonding process is then performed between the (Al, Ga, In)N and ZnO wafers, wherein the (Al, Ga, In)N and ZnO wafers are joined together and then wafer bonded in a nitrogen ambient under uniaxial pressure at a set temperature for a set duration. After the wafer bonding process, ZnO is shaped for increasing light extraction from inside of LED.

Abstract: An LED made from a wide band gap semiconductor material and having a low resistance p-type confinement layer with a tunnel junction in a wide band gap semiconductor device is disclosed. A dissimilar material is placed at the tunnel junction where the material generates a natural dipole. This natural dipole is used to form a junction having a tunnel width that is smaller than such a width would be without the dissimilar material. A low resistance p-type confinement layer having a tunnel junction in a wide band gap semiconductor device may be fabricated by generating a polarization charge in the junction of the confinement layer, and forming a tunnel width in the junction that is smaller than the width would be without the polarization charge. Tunneling through the tunnel junction in the confinement layer may be enhanced by the addition of impurities within the junction. These impurities may form band gap states in the junction.

Abstract: The present invention discloses a plurality of interdigitated pixels arranged in an array, having a very low series-resistances with improved current spreading and improved heat-sinking. Each pixel is a square with sides of dimension l. The series resistance is minimized by increasing the perimeter of an active region for the pixels. The series resistance is also minimized by shrinking the space between a mesa and n-contact for each pixel.

Abstract: A method for forming non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices. Non-polar (11 20) a-plane GaN layers are grown on an r-plane (11 02) sapphire substrate using MOCVD. These non-polar (11 20) a-plane GaN layers comprise templates for producing non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices.

Abstract: Methods for the heteroepitaxial growth of smooth, high quality films of N-face GaN film grown by MOCVD are disclosed. Use of a misoriented substrate and possibly nitridizing the substrate allow for the growth of smooth N-face GaN and other Group III nitride films as disclosed herein. The present invention also avoids the typical large (?m sized) hexagonal features which make N-face GaN material unacceptable for device applications. The present invention allows for the growth of smooth, high quality films which makes the development of N-face devices possible.

Abstract: A III-nitride photovoltaic device structure and method for fabricating the III-nitride photovoltaic device that increases the light collection efficiency of the III-nitride photovoltaic device. The III-nitride photovoltaic device includes one or more III-nitride device layers, and the III-nitride photovoltaic device functions by collecting light that is incident on the back-side of the III-nitride device layers. The III-nitride device layers are grown on a substrate, wherein the III-nitride device layers are exposed when the substrate is removed and the exposed III-nitride device layers are then intentionally roughened to enhance their light collection efficiency. The collection of the incident light via the back-side of the device simplifies the fabrication of the multiple junctions in the device. The III-nitride photovoltaic device may include grid-like contacts, transparent or semi-transparent contacts, or reflective contacts.

Abstract: Methods for the heteroepitaxial growth of smooth, high quality films of N-face GaN film grown by MOCVD are disclosed. Use of a misoriented substrate and possibly nitridizing the substrate allow for the growth of smooth N-face GaN and other Group III nitride films as disclosed herein. The present invention also avoids the typical large (?m sized) hexagonal features which make N-face GaN material unacceptable for device applications. The present invention allows for the growth of smooth, high quality films which makes the development of N-face devices possible.