Patents by Inventor Vage Oganesian

Vage Oganesian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050205977
    Abstract: An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and an active surface formed on the first generally planar surface, at least one chip scale packaging layer formed over the active surface and at least one electrical contact formed over the at least one chip scale packaging layer, the at least one electrical contact being connected to circuitry on the active surface by at least one pad formed on the first generally planar surface.
    Type: Application
    Filed: May 10, 2005
    Publication date: September 22, 2005
    Inventors: Gil Zilber, Reuven Katraro, Julia Aksenton, Vage Oganesian
  • Publication number: 20050104179
    Abstract: An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and semiconductor circuitry formed over the first generally planar surface, at least one chip scale packaging layer formed over the semiconductor circuitry and the first generally planar surface, an insulation layer formed over the second generally planar surface and the edge surfaces and at least one electrical conductor formed directly on the insulation layer overlying the second generally planar surface, the at least one electrical conductor being connected to the circuitry by at least one pad formed directly on the first generally planar surface.
    Type: Application
    Filed: July 2, 2004
    Publication date: May 19, 2005
    Applicant: SHELLCASE LTD.
    Inventors: Gil Zilber, Julia Aksenton, Vage Oganesian
  • Publication number: 20040251525
    Abstract: An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and an active surface formed on the first generally planar surface, at least one chip scale packaging layer formed over the active surface and at least one electrical contact formed over the at least one chip scale packaging layer, the at least one electrical contact being connected to circuitry on the active surface by at least one pad formed on the first generally planar surface.
    Type: Application
    Filed: June 16, 2003
    Publication date: December 16, 2004
    Applicant: SHELLCASE LTD.
    Inventors: Gil Zilber, Reuven Katraro, Julia Aksenton, Vage Oganesian