Abstract: A tunable multi-zone injection system for a plasma processing system for plasma processing of substrates such as semiconductor wafers. The system includes a plasma processing chamber, a substrate support for supporting a substrate within the processing chamber, a dielectric member having an interior surface facing the substrate support, the dielectric member forming a wall of the processing chamber, a gas injector fixed to part of or removably mounted in an opening in the dielectric window, the gas injector including a plurality of gas outlets supplying process gas at adjustable flow rates to multiple zones of the chamber, and an RF energy source such as a planar or non-planar spiral coil which inductively couples RF energy through the dielectric member and into the chamber to energize the process gas into a plasma state.

Abstract: A method for reducing erosion of a mask while etching a feature in a first layer underlying the mask is disclosed. The first layer is disposed on a substrate, with the substrate being positioned on a chuck within in a plasma processing chamber. The method includes flowing an etchant source gas into the plasma processing chamber and forming a plasma from the etchant source gas. The method further includes pulsing an RF power source at a predefined pulse frequency to provide pulsed RF power to the chuck. The pulsed RF power has a first frequency and alternates between a high power cycle and a low power cycle at the pulse frequency. The pulse frequency is selected to be sufficiently low to cause polymer to be deposited on the mask during the low power cycle.

Abstract: A method of removing photoresist material from a semiconductor substrate includes providing a semiconductor substrate having a patterned photoresist mask. A layer comprised of polymer material is formed over the patterned photoresist mask. The layer comprised of polymer material and a portion of the patterned photoresist mask are then removed. The layer comprised of polymer material is preferably formed by introducing a process gas into a plasma environment and is preferably formed with less thickness in a low aspect ratio area relative to a high aspect ratio area.

Abstract: Improved methods and apparatus for ion-assisted etch processing in a plasma processing system are disclosed. In accordance with various aspects of the invention, an elevated edge ring, a grooved edge ring, and a RF coupled edge ring are disclosed. The invention operates to improve etch rate uniformity across a substrate (wafer). Etch rate uniformity improvement provided by the invention not only improves fabrication yields but also is cost efficient and does not risk particulate and/or heavy metal contamination.

Abstract: A method of removing photoresist material from a semiconductor substrate includes providing a semiconductor substrate having a patterned photoresist mask. A layer comprised of polymer material is formed over the patterned photoresist mask. The layer comprised of polymer material and a portion of the patterned photoresist mask are then removed. The layer comprised of polymer material is preferably formed by introducing a process gas into a plasma environment and is preferably formed with less thickness in a high aspect ratio area relative to a low aspect ratio area.

Abstract: A method and apparatus for calibrating a semi-empirical process simulator used to determine process values in a plasma process for creating a desired surface profile on a process substrate includes providing a test model which captures all mechanisms responsible for profile evolution in terms of a set of unknown surface parameters. A set of test conditions is derived for which the profile evolution is governed by only a limited number of parameters. For each set of test conditions, test values are selected and a test substrate is actually subjected to a test process defined by the test values, thereby creating a test surface profile. The test values are used to generate an approximate profile prediction and are adjusted to minimize the discrepancy between the test surface profile and the approximate profile prediction, thereby providing a final model of the profile evolution in terms of the process values.

Abstract: A method of etching a trench in a silicon layer is disclosed. The silicon layer is disposed below a hard mask layer having a plurality of patterned openings. The etching takes place in a plasma processing chamber. The method includes flowing a first etchant source gas into the plasma processing chamber, forming a first plasma from the first etchant source gas and etching through a first portion of the silicon layer with the first plasma at a first etch rate. The first etch rate being sufficiently slow to form an effective top-rounded attribute in a portion of the trench. The method further includes flowing a second etchant source gas into the plasma processing chamber, forming a second plasma from the second etchant source gas and etching through a second portion of the silicon layer with the second plasma, wherein the etching with the second plasma extends the trench into the silicon layer without unduly damaging the top rounded attribute.

Abstract: The invention relates to an improved sputter target that is a combination sputter target and induction antenna. In one embodiment, when the sputter target is energized sputter material particles are sputtered away from the sputter target and a plasma is induced. In another embodiment, the sputter target is energized by an energy source. In yet another embodiment, the energy source includes a bias power supply and an induction power supply. The bias power supply applies a potential to the sputter target relative to an object. The induction power supply applies a current to the sputter target. The potential and the current promote the sputtering away of the sputter target, the formation of the plasma and the anisotropic distribution of the sputtered material particles.

Abstract: The invention provides a method for predicting a process surface profile that a given plasma process will create on a process substrate. The prediction is based on a test surface profile, the experimental outcome of a test process which is in general different from the plasma process of interest. In another aspect, the invention provides a technique for defining a plasma process that will produce a desired surface profile. Thus, in related aspects, the invention also provides apparatus for predicting a process surface profile and determining process values, a method of configuring a plasma reactor, a method of making semiconductor devices requiring limited empirical calibration, and a device made according to the method.

Abstract: A method for reducing erosion of a mask while etching a feature in a first layer underlying the mask is disclosed. The first layer is disposed on a substrate, with the substrate being positioned on a chuck within in a plasma processing chamber. The method includes flowing an etchant source gas into the plasma processing chamber and forming a plasma from the etchant source gas. The method further includes pulsing an RF power source at a predefined pulse frequency to provide pulsed RF power to the chuck. The pulsed RF power has a first frequency and alternates between a high power cycle and a low power cycle at the pulse frequency The pulse frequency is selected to be sufficiently low to cause polymer to be deposited on the mask during the low power cycle.

Abstract: A plasma processing chamber includes a substrate holder, a gas distribution member, and a shield for preventing lightup of plasma in gas distribution holes in the gas distribution member. The chamber can include an RF energy source such as an RF antenna which inductively couples RF energy through the gas distribution member to energize process gas into a plasma state. The shield can be arranged to allow capacitive coupling of RF energy into the processing chamber for lightup of plasma in the processing chamber and/or ion bombardment of the exposed surface of the gas distribution member for cleaning thereof during processing of the substrate.

Abstract: A graded gap fill process in which, in a high density plasma processing chamber, an insulating layer is deposited on a substrate without causing plasma charge-related damage to the substrate. The insulating layer is disposed above a first layer having trenches formed therein and below a subsequently deposited second layer. A protection layer is first deposited above the first layer using a first set of deposition parameters. This protection layer coats a surface of the first layer in a substantially conformal manner without forming voids in the trenches. A fill layer is then deposited above the protection layer using a second set of deposition parameters. The first set of deposition parameters is selected to reduce plasma charge-related damage relative to the second set of deposition parameters. The combination of the protection layer and the fill layer sufficiently electrically isolates the first layer from the second layer.