Abstract: A method for generating synthetic telephony narrowband data for training an automatic speech recognition model by receiving a broadband audio data file and then initiating a telephony call using a pre-configured telephone provider to play the broadband audio data file in the telephony call and to record and store audio data generated by transmission of the broadband audio data file in the telephony call, thereby generating the synthetic telephony narrowband data file from the broadband audio data file.

Abstract: A system and apparatus are provided for generating synthetic telephony narrowband data for training an automatic speech recognition model by receiving a broadband audio data file and then initiating a telephony call using a pre-configured telephone provider to play the broadband audio data file in the telephony call and to record and store audio data generated by transmission of the broadband audio data file in the telephony call, thereby generating the synthetic telephony narrowband data file from the broadband audio data file.

Abstract: A method, system and computer-usable medium are disclosed for generating product behavior information based on functional blocks executed from source code at runtime during a product use scenario. Certain embodiments of the method may include: executing source code in a product use scenario, where the source code includes a plurality of functional blocks executed to implement the product use scenario, where the plurality of functional blocks are configured with embedded functional block information; and generating product behavior information for the product use scenario using the embedded functional block information of functional blocks executed during run time of the source code in the product use scenario. In certain embodiments, the product behavior information may be used to generate one or more product behavior documents for one or more of the product use scenarios.

Abstract: A time-of-flight camera calibration system includes a time-of-flight camera and a calibration processor. The calibration processor is coupled to the time-of-flight camera. The calibration processor is configured to receive an input phase image captured by the time-of-flight camera, and generate a blurred phase image by applying a low pass filter to the input phase image. The calibration processor is also configured to generate a crosstalk correction matrix based on the blurred phase image, and provide the crosstalk correction matrix to the time-of-flight camera.

Abstract: A system for analysis and generation of structured programming is disclosed. The system includes a conduit core subsystem to generate an executable format file for migrating configurations of a first application to a second application. The conduit core subsystem includes a first application side conduit module to extract one or more first business objects of the first application and obtain one or more structured business objects and one or more first unidentified business objects. The conduit core subsystem includes a conduit core module to transmute the one or more structured business objects into a conduit core data structure. The conduit core subsystem includes a second application side conduit module to analyse the conduit core data structure based on one or more second business objects of the second application and transmute the conduit core data structure to generate the executable format file for the second application.

Abstract: A time-of-flight camera calibration system includes a time-of-flight camera and a calibration processor. The calibration processor is coupled to the time-of-flight camera. The calibration processor is configured to receive an input phase image captured by the time-of-flight camera, and generate a blurred phase image by applying a low pass filter to the input phase image. The calibration processor is also configured to generate a crosstalk correction matrix based on the blurred phase image, and provide the crosstalk correction matrix to the time-of-flight camera.

Abstract: Diagnosing applications that use hardware acceleration can include emulating, using a processor, a kernel designated for hardware acceleration by executing a device program binary implementing a register transfer level simulator for the kernel. The device program binary is executed in coordination with a host binary and a static circuitry binary. During the emulation, error conditions may be detected using diagnostic program code of the static circuitry binary. The error conditions may relate to memory access violations or kernel deadlocks. A notification of error conditions may be output.

Abstract: A striker mounting structure of a rear seat back for a vehicle is disclosed, which comprises a mounting bracket with assemble hole; a striker fixedly coupled to the mounting bracket inserted into the assemble hole, and detachably coupled to a seat back of a rear seat; and a seat belt retractor mounting portion at which a seat belt retractor is mounted, and coupled to the mounting bracket, so that it is possible to reduce weight and cost.

Abstract: A system for analysis and generation of structured programming is disclosed. The system includes a conduit core subsystem to generate an executable format file for migrating configurations of a first application to a second application. The conduit core subsystem includes a first application side conduit module to extract one or more first business objects of the first application and obtain one or more structured business objects and one or more first unidentified business objects. The conduit core subsystem includes a conduit core module to transmute the one or more structured business objects into a conduit core data structure. The conduit core subsystem includes a second application side conduit module to analyse the conduit core data structure based on one or more second business objects of the second application and transmute the conduit core data structure to generate the executable format file for the second application.

Abstract: Systems and methods are provided for controlling the pressure of a working fluid at an inlet of a main pressurization device of a heat engine system. The heat engine system may include a control system and a working fluid circuit including a waste heat exchanger, an expansion device, a recuperator, a main pressurization device, and a heat exchanger assembly. The heat exchanger assembly may include a plurality of gas-cooled heat exchangers configured to transfer thermal energy from the working fluid to a cooling medium, a plurality of fans configured to direct the cooling medium into contact with the gas-cooled heat exchangers, and a plurality of drivers, each driver configured to drive a respective fan. The control system may be communicatively coupled to the heat exchanger assembly and configured to modulate a rotational speed of at least one fan to regulate a pressure of the working fluid at the inlet.

Abstract: Embodiments of the present disclosure provide a high speed low latency rate configurable soft decision and hard decision based pipelined Reed-Solomon (RS) decoder architecture suitable for optical communication and storage. The proposed RS decoder is a configurable RS decoder that is configured to monitor the channel and adjust code parameters based on channel capacity. The proposed RS decoder includes interpolation and factorization free Low-Complexity-Chase (LCC) decoding to implement soft-decision decoder (SDD). The proposed RS decoder generates test vectors and feeds these to a pipelined 2-stage hard decision decoder (HDD). The proposed RS decoder architecture computes error locator polynomial in exactly 2t clock cycles without parallelism and supports high throughput, and further computes error evaluator polynomial in exactly t cycles. The present disclosure provides a 2-stage pipelined decoder to operate at least latency possible and reduced size of delay buffer.

Abstract: Aspects of this disclosure relate to reducing settling time of a ramp signal in a phase-locked loop. An offset signal can be applied to adjust an input signal provided to an integrator of a loop filter of the phase-locked loop to cause the settling time to be reduced. Disclosed methods of reducing settling time of a ramp signal can improve settling time of a ramp signal independent of the profile of the ramp signal.

Abstract: In semiconductor integrated circuitry having metal layers and via layers sandwiched between adjacent said metal layers, a capacitor is formed from metal structures implemented in first to third metal layers. The metal structures comprise strips having widths parallel to the layers. The strips of the first layer form a first comb having a base strip and a plurality of finger strips extending from the base strip, the widths of the strips being in a lower range of widths. The strips of the second layer form a second comb having a base strip and a plurality of finger strips extending from the base strip, the widths of the finger strips being in the lower range of widths. The width of each base strip formed in the second layer is in an intermediate range of widths; and the strips formed in the third layer have widths in a higher range of widths.

Abstract: Systems, methods, and computer-readable media for provisioning multiple credentials of a multi-scheme card on an electronic device for selective use in a secure transaction are provided.

Abstract: Aspects of this disclosure relate to reducing settling time of a sawtooth ramp signal in a phase-locked loop. Information from a loop filter of the phase-locked loop can be stored and used within the loop filter so as to improve the settling time of the sawtooth ramp signal. In certain embodiments, the settling time of a periodic sawtooth ramp signal can be reduced to less than one microsecond. An output frequency at the end of the sawtooth chirp can be brought back to an initial value without significantly modifying phase error in disclosed embodiments.

Abstract: A chip includes a phase-locked loop (PLL) and a test controller. The PLL includes an oscillator and a phase detector. In a normal mode, a first feedback loop includes a phase detector and an oscillator that generates an output based on a frequency input signal. In a test mode, the PLL is re-configured. The output of the loop filter can be decoupled from the input of the oscillator in the test mode and instead be coupled to the input of the phase detector. The oscillator can receive a test tuning signal provided by the test controller. In this test mode configuration, the PLL can measure the frequency of the oscillator.

Abstract: A system and method for power saving in power saving stations connected to a Very High Throughput (VHT) access point is disclosed. The access point receives triggers from power saving stations. The power saving stations are one of VHT Transmission Opportunity (TXOP) power saving stations and non-VHT TXOP power saving stations. Successively, Quality of service (QoS) requirements of buffered data for the power saving stations connected to the VHT access point is determined. In a first case, the QoS requirements of buffered data corresponding to the non-VHT TXOP power saving stations exceed the QoS requirements of the VHT TXOP power saving stations. During the first case, the VHT TXOP power saving stations are sent into a sleep state and buffered data corresponding to the non-VHT TXOP power saving stations is transmitted.

Abstract: A method for handling namespace reservations in a Non Volatile Memory express (NVMe) controller includes a NVMe hardware module collecting a data access request from a host device, the NVMe hardware module determining a validity of the collected data access request, wherein the validity of the data access request is determined based a reservation specific to the host and data indicated in the data access request, and the NVMe hardware module notifying the NVMe firmware module of the determined validity of the collected data access request. The method further includes a NVMe firmware module accepting the data access request when the data request is notified by the NVMe hardware module as being valid, and the NVMe firmware module rejecting the data access request when the data request is notified by the NVMe hardware module as being invalid.

Abstract: A system and method for power saving in power saving stations connected to a Very High Throughput (VHT) access point is disclosed. The access point receives triggers from power saving stations. The power saving stations are one of VHT Transmission Opportunity (TXOP) power saving stations and non-VHT TXOP power saving stations. Successively, Quality of service (QoS) requirements of buffered data for the power saving stations connected to the VHT access point is determined. In a first case, the QoS requirements of buffered data corresponding to the non-VHT TXOP power saving stations exceed the QoS requirements of the VHT TXOP power saving stations. During the first case, the VHT TXOP power saving stations are sent into a sleep state and buffered data corresponding to the non-VHT TXOP power saving stations is transmitted.

Abstract: A striker mounting structure of a rear seat back for a vehicle is disclosed, which comprises a mounting bracket with assemble hole; a striker fixedly coupled to the mounting bracket with inserted into the assemble hole, and detachably coupled to a seat back of a rear seat; and a seat belt retractor mounting portion at which a seat belt retractor is mounted, and coupled to the mounting bracket, so that it is possible to reduce weight and cost.