Patents by Inventor Van Hoa

Van Hoa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6834340
    Abstract: A method for managing system firmware in a data processing system having a plurality of logical partitions is provided. Responsive to a request to update the system firmware from a first logical partition within the plurality of logical partitions in the data processing system, a determination is made whether the first logical partition within the plurality of logical partitions is present in the data processing system. Responsive to the determination that the first logical partition within the plurality of logical partitions is present in the data processing system, the system firmware is updated from the first logical partition in the data processing system. Then starting of additional partitions within the plurality of logical partitions in the data processing system is inhibited until the firmware update from the first logical partition is complete.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: December 21, 2004
    Assignee: International Business Machines Corporation
    Inventors: Van Hoa Lee, Sayileela Nulu
  • Patent number: 6823375
    Abstract: A method, system, and product are described for configuring remote input/output (RIO) hubs within a data processing system. Each one of the RIO hubs is assigned to one of multiple slave processors which are included within the data processing system. Each one of the slave processors which has an assigned RIO hub then configures its assigned RIO hub. Each RIO hub has an associated data structure that is updated with current configuration information by the slave processor assigned to configure that RIO hub. When the slave processor has finished configuring its assigned RIO hub, the slave processor then sets a configuration flag to indicate the completion of the configuration of the RIO hub.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Van Hoa Lee, Kiet Anh Tran
  • Patent number: 6820207
    Abstract: A method, apparatus, and computer implemented instructions for controlling power in a data processing system having a plurality of logical partitions. Responsive to receiving a request to turn off the power for a logical partition within the plurality of logical partitions in the data processing system, a determination is made as to whether an additional partition within the plurality of logical partitions is present in the data processing system. The power is turned off in the data processing system in response to a determination an additional partition within the plurality of logical partitions is absent in the data processing system. The logical partition is shut down in response to a determination that an additional partition within the plurality of logical partitions is present in the data processing system. The mechanism of the present invention also provides for rebooting logical partitions. A request is received to reboot a logical partition within the plurality of logical partitions.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: November 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: George John Dawkins, Van Hoa Lee, Kanisha Patel, Peter Dinh Phan, David R. Willoughby
  • Publication number: 20040213976
    Abstract: Disclosed herein is a non-metallic reinforcement member (10) such as a rod to be embedded in a structure of material such as concrete (30). This member comprises a longitudinal main body (20) having an outer surface (14) and spaced apart embossments (22) formed along its length and being integral therewith. When this member (10) is embedded in concrete (30), the embossments (22) mechanically interlock with the concrete (30). This reinforcement member (10) may be made of a plastic material such as thermoplastic resin so as to be bendable. The outer surface (14) may comprise layers of fiber reinforcement (18). Also disclosed herein is a process of making such a reinforcement member (10).
    Type: Application
    Filed: June 1, 2004
    Publication date: October 28, 2004
    Inventor: Suong Van Hoa
  • Publication number: 20040210793
    Abstract: A method, apparatus, and computer instructions for recovering terminated partitions in a logical partitioned data processing system. A termination of a partition in a set of partitions associated with a host bridge in the logical partitioned data processing system is detected. The state of other partitions within the set of partitions is checked in response to detecting the termination. A recovery process is initiated if all partitions in the set of partitions have terminated. Input/output slots associated with the host bridge are reset to a normal state if the recovery process is successful. The set of partitions is rebooted after resetting the input/output slots associated with the host bridge without rebooting the logical partitioned data processing system.
    Type: Application
    Filed: April 21, 2003
    Publication date: October 21, 2004
    Applicant: International Business Machines Corporation
    Inventors: Shaival J. Chokshi, Ashwini Kulkarni, Van Hoa Lee, David Lee Randall, Thi Ngoc Tran, David R. Willoughby
  • Patent number: 6802063
    Abstract: An improved logically partitioned data processing system is provided. In one embodiment, the data processing system includes a plurality of hardware devices, including processors, and a plurality of operating systems. Each of the plurality of operating systems executes within a separate partition within the logically partitioned data processing system. A firmware component provides each operating system with a virtualized copy of the hardware devices, thus maintaining separation between each of the logical partitions. The firmware component is implemented as 64-bits, thus allowing each of the processors to execute in 64-bit mode and eliminating the need for virtual address translation from a 32-bit virtual address to a 64-bit physical address.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: October 5, 2004
    Assignee: International Business Machines Corporation
    Inventor: Van Hoa Lee
  • Publication number: 20040139287
    Abstract: A method, system, and product are described for creating and managing affinity between memory and processors in logical partitions in a data processing system. The data processing system includes multiple processors. A memory affinity data structure is established. The memory affinity data structure identifies ones of the processors that have a close affinity with each one of multiple regions of the system memory. A memory affinity parameter is established and is utilized to determine whether memory affinity is required for each one of the logical partitions. In response to a determination that memory affinity is required for one of the logical partitions, the memory affinity data structure is utilized by a partition manager for the logical partition to allocate an optimal amount of memory that has a close affinity to ones of the processors that are assigned to the logical partition.
    Type: Application
    Filed: January 9, 2003
    Publication date: July 15, 2004
    Applicant: International Business Machines Corporation
    Inventors: Robert Kimberlin Foster, Van Hoa Lee, Casey Lee McCreary, Priya Paul, Natalie Marie Post, Quan Wang
  • Patent number: 6745269
    Abstract: A method and apparatus preserve the data structures established in the earliest stage of initial power load, rather than each system firmware component rediscovering the hardware components of the system. Thus, the data structure is available at later stages for other firmware components. In a logical partitioning machine, the open firmware partition manager can utilize the data structure to support the partition's open firmware device tree construction. The partition manager customizes the copies of these data structures residing in the partition's memory. For hardware devices in the system but not belonging to the partition, the device information is cleared and marked invalid. After the data structures are established and updated by the earliest firmware I/O configuration component, the addresses of these structures are provided to the open firmware component. The open firmware copies these data structures to its internally safe working area and uses the copies for its normal operation.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: June 1, 2004
    Assignee: International Business Machines Corporation
    Inventors: Tam D. Bui, George John Dawkins, Van Hoa Lee, Kiet Anh Tran
  • Patent number: 6728864
    Abstract: A method, system and program for architecturally identifying data processor implementations are provided. The invention comprises assigning a plurality of least significant bits in a processor's identification register to a unique value. This value can be assigned to these bits permanently during manufacture and is used to identify the bit specification for a specific processor implementation. The present invention can be generalized to include any processor architecture that comprises a plurality of instruction subsets for different bit specifications.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: April 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Van Hoa Lee, Kiet Anh Tran
  • Patent number: 6717594
    Abstract: A data processing system and method are disclosed for displaying a graphical depiction of the system configuration of the data processing system. Execution of a boot process of the data processing system is started. Prior to a completion of the boot process, a configuration of the data processing system is determined by the system itself. A graphical depiction of the configuration is then generated. The graphical depiction is then graphically displayed utilizing a display screen which is included in the data processing system. The graphical depiction illustrates each device included in the system as well as how the devices are interconnected. Thereafter, the execution of the boot process is completed. The steps of determining a configuration, generating a graphical depiction, and graphically displaying the graphical depiction are completed prior to completing the booting the data processing system, and thus prior to an operating system being executed by the data processing system.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 6, 2004
    Assignee: International Business Machines Corporation
    Inventors: Tam D. Bui, George John Dawkins, Van Hoa Lee, Jayeshkumar M. Patel, Kiet Anh Tran
  • Patent number: 6665759
    Abstract: A method, system, and computer program product for enforcing logical partitioning of input/output slots within a data processing system is provided. In one embodiment, the system includes a hypervisor and at least one DMA address checking component. The hypervisor receives non-direct-memory-access requests for access to input/output slots and prohibits devices within one logical partition from accessing the input/output slots assigned to a different logical partition. The DMA address checking component receives direct-memory-access requests and prohibits requests for addresses not within the same logical partition as the requesting device from being completed. Requests with addresses corresponding to the same logical partition as the requesting device are placed on the primary PCI bus by the DMA address checking component for delivery to the system memory.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: George John Dawkins, Van Hoa Lee, David Lee Randall, Kiet Anh Tran
  • Patent number: 6658594
    Abstract: A method, system, and apparatus of recording information generated by a data processing system prior to completion enablement of programmed input/output services for the data processing system is provided. In one embodiment, a service processor receives an attention interrupt from a host processor. The service processor then stops the operation of all host processors in the data processing system. The service processor then reads the information, such as a system checkpoint, from a buffer within the host processor's system memory and writes the information into a non-volatile random access memory as well as displays the information to a user via a video display. The service processor then restarts the host processors.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Tam D. Bui, Van Hoa Lee, Kiet Anh Tran
  • Publication number: 20030212883
    Abstract: A method, apparatus, and computer instructions for managing slots. In response to a request to deallocate a slot assigned to a partition within the logical partitioned data processing system, resources used for accessing the slot are disabled when the slot is unused in which a state of the slot changes to an isolated state when the resources are deallocated. The resources and ownership of the slot are unassigned from the partition when the slot is in the isolated state to place the slot in an unallocated state.
    Type: Application
    Filed: May 9, 2002
    Publication date: November 13, 2003
    Applicant: International Business Machines Corporation
    Inventors: Van Hoa Lee, David R. Willoughby
  • Publication number: 20030212873
    Abstract: A method, apparatus, and computer instructions for managing memory blocks. In response to a request to deallocate a memory block from a partition, all processes are prevented from using the memory block. The memory block is isolated from the partition in response to preventing use of the memory block. The memory block is deallocated to form a free memory block.
    Type: Application
    Filed: May 9, 2002
    Publication date: November 13, 2003
    Applicant: International Business Machines Corporation
    Inventors: Van Hoa Lee, David R. Willoughby
  • Publication number: 20030212884
    Abstract: A method, apparatus, and computer instructions for managing a set of processors. In response to a request to deallocate a processor assigned to a partition within the logical partitioned data processing system, the processor in the set of processors, is stopped. In response to stopping the processor, the processor is placed in an isolated state in which the processor is isolated from the partition. The processor is then placed in a pool of resources for later reassignment.
    Type: Application
    Filed: May 9, 2002
    Publication date: November 13, 2003
    Applicant: International Business Machines Corporation
    Inventors: Van Hoa Lee, David R. Willoughby
  • Publication number: 20030208670
    Abstract: In a computer system having a logical-partitioned server, each partition of the server is provided with its own separate lock and access corridor, in addition to a global lock. When the locking of a partition lock is followed by the locking of the global lock, the system is serialized. The partition locks are controlled by system firmware on behalf of an OS isolating each partition; however, the global lock is controlled by the system firmware to be unlocked independent of the lock/unlock status of the partition locks. In this manner, the ability or inability of an OS that issued a machine check interrupt to unlock its partition lock after the machine check analysis is complete is irrelevant; once the machine check analysis is complete, the system firmware unlocks the global lock, giving other partitions access to shared system resources to run their own machine checks.
    Type: Application
    Filed: March 28, 2002
    Publication date: November 6, 2003
    Applicant: International Business Machines Corp.
    Inventors: George John Dawkins, Prakash Vinodrai Desai, Van Hoa Lee, Gordon D. McIntosh
  • Publication number: 20030182351
    Abstract: A interrupt is generated for all processors in a multiprocessor system when a critical datapath experiences an error. Serialization code in the interrupt handling routine for that interrupt suspends all processors except one and places the suspended processors in a waiting queue while the one processor handles the error. After the error has been handled, the remaining processors are allow to execute the interrupt handler, which simply exits detecting no error.
    Type: Application
    Filed: March 21, 2002
    Publication date: September 25, 2003
    Applicant: International Business Machines Corporation
    Inventors: George John Dawkins, Ashwini Kulkarni, Van Hoa Lee, Gordon D. McIntosh, Kanisha Patel
  • Publication number: 20030163758
    Abstract: A method and system for identifying a source of a corrupt data in a memory in a multiprocessor computer system. When a computer program stores corrupt data causing a program failure or a system crash, the corrupt data and its address are identified. The multiprocessor computer system is shut down, and the corrupt data is cleared from the memory. Before fully re-booting the multiprocessor computer system, a processor is selected from the multiprocessor computer system to load and run monitor code designed to monitor the location where the corrupt data was stored. The program that previously stored the corrupt data is restarted, and the selected processor detects any re-storage of the corrupt data in the same memory address. All processors in the computer system are then immediately suspended. The registers of all processors suspected of storing corrupt data are inspected to determine the source of the corrupt data.
    Type: Application
    Filed: February 27, 2002
    Publication date: August 28, 2003
    Applicant: International Business Machines Corp.
    Inventors: Christopher Harry Austen, Van Hoa Lee, Milton Devon Miller, Douglas Wayne Oliver
  • Publication number: 20030101377
    Abstract: A logical partition management apparatus and method for handling system reset interrupts (SRIS) are provided. The apparatus and method provide a SRI handler in the hypervisor that is capable of handling SRIs which may occur at any time during the operation of the multiprocessor computing system. The apparatus and method allow a hypervisor call to be completed before an SRI is handled. In this way, the SRI does not cause a processor of the symmetric multiprocessor (SMP) system to indefinitely hold a lock on a system resource and thus, other processors are not starved due to an inability to access the system resource.
    Type: Application
    Filed: November 29, 2001
    Publication date: May 29, 2003
    Inventors: George John Dawkins, Van Hoa Lee
  • Patent number: 6567897
    Abstract: A method, system, and computer program product for enforcing logical partitioning of a shared device to which multiple partitions within a data processing system have access is provided. In one embodiment, a firmware portion of the data processing system receives a request from a requesting device, such as a processor assigned to one of a plurality of partitions within the data processing system, to access (i.e., read from or write to) a portion of the shared device, such as an NVRAM. The request includes a virtual address corresponding to the portion of the shared device for which access is desired. If the virtual address is within a range of addresses for which the requesting device is authorized to access, the firmware provides access to the requested portion of the shared device to the requesting device. If the virtual address is not within a range of addresses for which the requesting device is authorized to access, the firmware denies the request.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: May 20, 2003
    Assignee: International Business Machines Corporation
    Inventors: Van Hoa Lee, Kanisha Patel, David R. Willoughby