Patents by Inventor Varun Sharma
Varun Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250149325Abstract: Methods for cleaning a substrate are disclosed. The substrate comprises a dielectric surface and a metal surface. The methods comprise providing a cleaning agent to the reaction chamber.Type: ApplicationFiled: January 9, 2025Publication date: May 8, 2025Inventors: Shaoren Deng, Andrea Illiberi, Daniele Chiappe, Eva Tois, Giuseppe Alessio Verni, Michael Givens, Varun Sharma, Chiyu Zhu, Shinya Iwashita, Charles Dezelah, Viraj Madhiwala, Jan Willem Maes, Marko Tuominen, Anirudhan Chandrasekaran
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Publication number: 20250140330Abstract: A storage device identifies a die with a defective temperature sensor and excludes the die temperature from thermal calculations. The storage device includes a memory device with multiple dies. Each die includes a temperature sensor. A controller on the storage device executes a defective temperature sensor scheme to obtain a temperature for a first die in the memory device. The controller compares the first die temperature against a benchmark. The controller determines that the first die includes a defective temperature sensor if there is a temperature variance in the first die temperature and the benchmark and if the temperature variance is greater than a die temperature variation threshold.Type: ApplicationFiled: October 25, 2023Publication date: May 1, 2025Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: VARUN SHARMA, SOURABH SANKULE, RAGHAVENDRA MYLARAPPA, BHAVADIP SOLANKI
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Publication number: 20250118562Abstract: Processes are provided herein for deposition of organic films. Organic films can be deposited, including selective deposition on one surface of a substrate relative to a second surface of the substrate. For example, polymer films may be selectively deposited on a first metallic surface relative to a second dielectric surface. Selectivity, as measured by relative thicknesses on the different layers, of above about 50% or even about 90% is achieved. The selectively deposited organic film may be subjected to an etch process to render the process completely selective. Processes are also provided for particular organic film materials, independent of selectivity.Type: ApplicationFiled: December 16, 2024Publication date: April 10, 2025Inventors: Eva E. Tois, Hidemi Suemori, Viljami J. Pore, Suvi P. Haukka, Varun Sharma
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Publication number: 20250101579Abstract: The technology of the present disclosure generally relates to the field of capacitor devices. More particularly to Metal-Insulator-Metal capacitors (MIM CAPS) comprising a Hafnium Zirconium Oxide (HZO) layer, and a method for producing the same. Further described are related methods, deposition systems, and devices. The method for forming the doped HZO layer on a substrate, comprises the steps of providing a substrate in a reaction chamber; executing one or more cycles whereby each cycle comprising contacting a hafnium precursor, a zirconium precursor, an oxygen reactant and a dopant precursor on at least part of the substrate by introducing the precursors and reactant in the reaction chamber; the dopant precursor comprises a dopant element having three or four valence electrons and an atomic radius which is less than the atomic radius of an Hf or Zr element of the HZO layer.Type: ApplicationFiled: September 26, 2024Publication date: March 27, 2025Inventors: Alessandra Leonhardt, Matthew Surman, Rohit Abraham John, Fu Tang, Andrea llliberi, Vivek Koladi Mootheri, Leo Lukose, Varun Sharma, Jessica Akemi Cimada da Silva
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Patent number: 12234548Abstract: A method and system for forming a copper iodide layer on a surface of a substrate are disclosed. Exemplary methods include using a cyclic deposition process that includes providing a copper precursor to a reaction chamber and providing an iodine reactant to the reaction chamber. Exemplary methods can further include providing a reducing agent and/or providing a dopant reactant to the reaction chamber. Structures formed using the method are also described. The structures can be used to form devices, such as memory devices.Type: GrantFiled: January 31, 2023Date of Patent: February 25, 2025Assignee: ASM IP Holding B.V.Inventors: Charles Dezelah, Andrea Illiberi, Varun Sharma, Bart Vermeulen, Michael Givens
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Patent number: 12237182Abstract: To create constant partial pressures of the by-products and residence time of the gas molecules across the wafer, a dual showerhead reactor can be used. A dual showerhead structure can achieve spatially uniform partial pressures, residence times and temperatures for the etchant and for the by-products, thus leading to uniform etch rates across the wafer. The system can include differential pumping to the reactor.Type: GrantFiled: February 27, 2024Date of Patent: February 25, 2025Assignee: ASM IP Holding B.V.Inventors: Tom E. Blomberg, Varun Sharma
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Patent number: 12217954Abstract: Methods for cleaning a substrate are disclosed. The substrate comprises a dielectric surface and a metal surface. The methods comprise providing a cleaning agent to the reaction chamber.Type: GrantFiled: August 20, 2021Date of Patent: February 4, 2025Assignee: ASM IP Holding B.V.Inventors: Shaoren Deng, Andrea Illiberi, Daniele Chiappe, Eva Tois, Giuseppe Alessio Verni, Michael Givens, Varun Sharma, Chiyu Zhu, Shinya Iwashita, Charles Dezelah, Viraj Madhiwala, Jan Willem Maes, Marko Tuominen, Anirudhan Chandrasekaran
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Publication number: 20250037988Abstract: The current disclosure relates to methods of depositing silicon oxide on a substrate, methods of forming a semiconductor device and a method of forming a structure. The method comprises providing a substrate in a reaction chamber, providing a silicon precursor in the reaction chamber, the silicon precursor comprising a silicon atom connected to at least one oxygen atom, the at least one oxygen atom being connected to a carbon atom, and providing a reactant comprising hydrogen atoms in the reaction chamber to form silicon oxide on the substrate.Type: ApplicationFiled: October 14, 2024Publication date: January 30, 2025Inventors: Varun Sharma, Daniele Chiappe, Eva Tois, Viraj Madhiwala, Marko Tuominen, Charles Dezelah, Michael Givens, Tom Blomberg
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Publication number: 20250037970Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.Type: ApplicationFiled: July 31, 2024Publication date: January 30, 2025Inventors: Tom E. Blomberg, Varun Sharma, Suvi P. Haukka, Marko Tuominen, Chiyu Zhu
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Publication number: 20250029832Abstract: Methods for depositing silicon-containing thin films on a substrate in a reaction space are provided. The methods can include vapor deposition processes comprising at least one deposition cycle including sequentially contacting the substrate with a silicon precursor comprising a halosilane and a second reactant comprising an acyl halide. In some embodiments a Si(O,C,N) thin film is deposited and the concentration of nitrogen and carbon in the film can be tuned by adjusting the deposition conditions.Type: ApplicationFiled: October 3, 2024Publication date: January 23, 2025Inventor: Varun Sharma
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Patent number: 12205820Abstract: Processes are provided herein for deposition of organic films. Organic films can be deposited, including selective deposition on one surface of a substrate relative to a second surface of the substrate. For example, polymer films may be selectively deposited on a first metallic surface relative to a second dielectric surface. Selectivity, as measured by relative thicknesses on the different layers, of above about 50% or even about 90% is achieved. The selectively deposited organic film may be subjected to an etch process to render the process completely selective. Processes are also provided for particular organic film materials, independent of selectivity.Type: GrantFiled: June 24, 2022Date of Patent: January 21, 2025Assignee: ASM IP Holding B.V.Inventors: Eva E. Tois, Hidemi Suemori, Viljami J. Pore, Suvi P. Haukka, Varun Sharma
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Patent number: 12148609Abstract: The current disclosure relates to methods of depositing silicon oxide on a substrate, methods of forming a semiconductor device and a method of forming a structure. The method comprises providing a substrate in a reaction chamber, providing a silicon precursor in the reaction chamber, the silicon precursor comprising a silicon atom connected to at least one oxygen atom, the at least one oxygen atom being connected to a carbon atom, and providing a reactant comprising hydrogen atoms in the reaction chamber to form silicon oxide on the substrate.Type: GrantFiled: September 13, 2021Date of Patent: November 19, 2024Assignee: ASM IP Holding B.V.Inventors: Varun Sharma, Daniele Chiappe, Eva Tois, Viraj Madhiwala, Marko Tuominen, Charles Dezelah, Michael Givens, Tom Blomberg
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Patent number: 12142479Abstract: Methods for depositing silicon-containing thin films on a substrate in a reaction space are provided. The methods can include vapor deposition processes comprising at least one deposition cycle including sequentially contacting the substrate with a silicon precursor comprising a halosilane and a second reactant comprising an acyl halide. In some embodiments a Si(O,C,N) thin film is deposited and the concentration of nitrogen and carbon in the film can be tuned by adjusting the deposition conditions.Type: GrantFiled: January 4, 2021Date of Patent: November 12, 2024Assignee: ASM IP Holding B.V.Inventor: Varun Sharma
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Patent number: 12136552Abstract: The current disclosure generally relates to the manufacture of semiconductor devices. Specifically, the disclosure relates to methods of depositing a layer on a substrate comprising a recess. The method comprises providing the substrate comprising a recess in a reaction chamber, depositing inhibition material on the substrate to fill the recess with inhibition material, removing the inhibition material from the substrate for exposing a deposition area and depositing a layer on the deposition area by a vapor deposition process. A vapor deposition assembly for performing the method is also disclosed.Type: GrantFiled: December 6, 2021Date of Patent: November 5, 2024Assignee: ASM IP Holding B.V.Inventors: Andrea Illiberi, Varun Sharma, Michael Givens, Marko Tuominen, Shaoren Deng
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Publication number: 20240348609Abstract: A technique for embedding and utilizing credentials in a network address may include requesting a network address for a client device by providing an account identifier to a server computer associated with a service provider. A network address that is mapped to the account identifier can be assigned to the client device. The network address may include a routing prefix field and a network interface identifier field. The routing prefix field may include an issuer identifier of an issuer of the account, and the network interface identifier field may include an interface identifier that maps to the account identifier. By embedding credentials such as an account identifier in the network address, the actual account identifier need not be transmitted to perform actions on the account.Type: ApplicationFiled: May 28, 2024Publication date: October 17, 2024Applicant: Visa International Service AssociationInventors: Varun Sharma, Hanna Endrias, Ajit Vilasrao Patil, Nandakumar Kandaloo
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Publication number: 20240339493Abstract: Structures and related methods and systems for forming structures. The structures comprise a proximal contact, a distal contact, a high-k dielectric, and at least one of a proximal barrier and a distal barrier. In some embodiments, at least one of the proximal barrier and the distal barrier is constructed and arranged to inhibit Poole-Frenkel emission from the high-k dielectric when a first electric field is applied between the proximal contact and a distal contact in a first electric field direction.Type: ApplicationFiled: April 2, 2024Publication date: October 10, 2024Inventors: Alessandra Leonhardt, Varun Sharma, Vivek Koladi Mootheri, Leo Lukose, Andrea Illiberi, Jerome Innocent, Aditya Chauhan
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Publication number: 20240332039Abstract: To create constant partial pressures of the by-products and residence time of the gas molecules across the wafer, a dual showerhead reactor can be used. A dual showerhead structure can achieve spatially uniform partial pressures, residence times and temperatures for the etchant and for the by-products, thus leading to uniform etch rates across the wafer. The system can include differential pumping to the reactor.Type: ApplicationFiled: February 27, 2024Publication date: October 3, 2024Inventors: Tom E. Blomberg, Varun Sharma
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Patent number: 12094686Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.Type: GrantFiled: March 22, 2023Date of Patent: September 17, 2024Assignee: ASM IP Holding B.V.Inventors: Tom E. Blomberg, Varun Sharma, Suvi P. Haukka, Marko Tuominen, Chiyu Zhu
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Publication number: 20240273768Abstract: Provided is a system and computer-implemented method for encoding account tokens in image files. The method includes receiving, from a user associated with an account identifier, an identification of at least one image, generating at least one token based on the account identifier of the user, encoding the at least one token in the at least one image, resulting in at least one tokenized image, and communicating the at least one tokenized image to a transaction processing system, wherein the transaction processing system is configured to conduct a transaction based on the tokenized image.Type: ApplicationFiled: April 24, 2024Publication date: August 15, 2024Inventors: Varun Sharma, Nicholas Cai, Walker Carlson, Ajit Vilasrao Patil
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Patent number: 12040195Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which a substrate comprising a metal, metal oxide, metal nitride or metal oxynitride layer is contacted with an etch reactant comprising an vapor-phase N-substituted derivative of amine compound. In some embodiments the etch reactant reacts with the substrate surface to form volatile species including metal atoms from the substrate surface. In some embodiments a metal or metal nitride surface is oxidized as part of the ALE cycle. In some embodiments a substrate surface is contacted with a halide as part of the ALE cycle. In some embodiments a substrate surface is contacted with a plasma reactant as part of the ALE cycle.Type: GrantFiled: January 18, 2023Date of Patent: July 16, 2024Assignee: ASM IP Holding B.V.Inventors: Charles Dezelah, Varun Sharma