Patents by Inventor Veronica STRONG

Veronica STRONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210074620
    Abstract: An lithographic reticle may be formed comprising a transparent substrate, a substantially opaque mask formed on the transparent substrate that defines at least one exposure window, wherein the at least one exposure window has a first end, a first filter formed on the transparent substrate within the at least one exposure window and abutting the first end thereof, and a second filter formed on the transparent substrate within the at least one exposure window and abutting the first filter, wherein an average transmissivity of the first filter is substantially one half of a transmissivity of the second filter. In another embodiment, the at least one exposure window includes a third filter abutting the second end and is adjacent the second filter. Further embodiments of the present description include interconnection structures and systems fabricated using the lithographic reticle.
    Type: Application
    Filed: September 9, 2019
    Publication date: March 11, 2021
    Applicant: Intel Corporation
    Inventors: Johanna Swan, Henning Braunisch, Aleksandar Aleksov, Shawna Liff, Brandon Rawlings, Veronica Strong
  • Publication number: 20200294901
    Abstract: Device package and a method of forming a device package are described. The device package includes an interposer with interconnects on an interconnect package layer and a conductive layer on the interposer. The device package has dies on the conductive layer, where the package layer includes a zero-misalignment two-via stack (ZM2VS) and a dielectric. The ZM2VS directly coupled to the interconnect. The ZM2VS further includes the dielectric on a conductive pad, a first via on a first seed, and first seed on a top surface of the conductive pad, where the first via extends through dielectric. The ZM2VS also has a conductive trace on dielectric, and a second via on a second seed, the second seed is on the dielectric, where the conductive trace connects to first and second vias, where second via connects to an edge of conductive trace opposite from first via.
    Type: Application
    Filed: December 30, 2017
    Publication date: September 17, 2020
    Inventors: Veronica STRONG, Aleksandar ALEKSOV, Brandon RAWLINGS, Johanna SWAN
  • Publication number: 20200258827
    Abstract: A package substrate, comprising a package comprising a substrate, the substrate comprising a dielectric layer, a via extending to a top surface of the dielectric layer; and a bond pad stack having a central axis and extending laterally from the via over the first layer. The bond pad stack is structurally integral with the via, wherein the bond pad stack comprises a first layer comprising a first metal disposed on the top of the via and extends laterally from the top of the via over the top surface of the dielectric layer adjacent to the via. The first layer is bonded to the top of the via and the dielectric layer, and a second layer is disposed over the first layer. A third layer is disposed over the second layer. The second layer comprises a second metal and the third layer comprises a third metal. The second layer and the third layer are electrically coupled to the via.
    Type: Application
    Filed: September 29, 2017
    Publication date: August 13, 2020
    Applicant: INTEL CORPORATION
    Inventors: Aleksandar Aleksov, Veronica Strong, Kristof Darmawikarta, Arnab Sarkar
  • Publication number: 20200258839
    Abstract: A device package and a method of forming a device package are described. The device package includes a dielectric on a conductive pad, and a first via on a first seed on a top surface of the conductive pad. The device package further includes a conductive trace on the dielectric, and a second via on a second seed layer on the dielectric. The conductive trace connects to the first via and the second via, where the second via connects to an edge of the conductive trace opposite from the first via. The dielectric may include a photoimageable dielectric or a buildup film. The device package may also include a seed on the dielectric prior to the conductive trace on the dielectric, and a second dielectric on the dielectric, the conductive trace, and the first and second vias, where the second dielectric exposes a top surface of the second via.
    Type: Application
    Filed: December 30, 2017
    Publication date: August 13, 2020
    Inventors: Aleksandar ALEKSOV, Veronica STRONG, Brandon RAWLINGS
  • Publication number: 20200232960
    Abstract: An interconnected corrugated carbon-based network comprising a plurality of expanded and interconnected carbon layers is disclosed. In one embodiment, each of the expanded and interconnected carbon layers is made up of at least one corrugated carbon sheet that is one atom thick. In another embodiment, each of the expanded and interconnected carbon layers is made up of a plurality of corrugated carbon sheets that are each one atom thick. The interconnected corrugated carbon-based network is characterized by a high surface area with highly tunable electrical conductivity and electrochemical properties.
    Type: Application
    Filed: February 14, 2020
    Publication date: July 23, 2020
    Inventors: Veronica Strong, Maher F. El-Kady, Richard B. Kaner
  • Publication number: 20200219814
    Abstract: A device package and method of forming the device package are described. The device package includes a dielectric on a conductive pad, a first via on a top surface of conductive pad, where the first via extends through dielectric, and a conductive trace on dielectric. The device package has a second via on dielectric, where the conductive trace connects to first and second vias, and the second via connects to an edge of conductive trace opposite from first via. The device package may have a seed on dielectric, where the seed electrically couples to conductive trace, a first seed on the top surface of conductive pad, where the first via is on first seed, and a second seed on a top surface of first via, the second seed on surfaces of second via, where the conductive trace is on second seed disposed on both first and second vias.
    Type: Application
    Filed: December 30, 2017
    Publication date: July 9, 2020
    Inventors: Veronica STRONG, Aleksandar ALEKSOV, Brandon RAWLINGS
  • Patent number: 10648958
    Abstract: An interconnected corrugated carbon-based network comprising a plurality of expanded and interconnected carbon layers is disclosed. In one embodiment, each of the expanded and interconnected carbon layers is made up of at least one corrugated carbon sheet that is one atom thick. In another embodiment, each of the expanded and interconnected carbon layers is made up of a plurality of corrugated carbon sheets that are each one atom thick. The interconnected corrugated carbon-based network is characterized by a high surface area with highly tunable electrical conductivity and electrochemical properties.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: May 12, 2020
    Assignee: The Regents of the University of California
    Inventors: Veronica A. Strong, Maher F. El-Kady, Richard Barry Kaner
  • Publication number: 20200136099
    Abstract: Package-integrated thin film lithium ion battery and methods for fabricating the same are disclosed. In one example, an electronic package includes an organic package substrate, and a lithium (Li) ion thin film battery (TFB) integrated into the organic package substrate. The Li ion TFB is formed in or on the organic package substrate or the Li ion TFB can be embedded in the organic package substrate. The Li ion TFB includes an anode layer, electrolyte layer, cathode layer, and anode and cathode current collector layers. The cathode layer can be a crystalline transition metal oxide cathode layer including lithium cobalt oxide LiCoO2 (LCO) or lithium manganese oxide LiMn2O3 The cathode layer is laser annealed to crystallize the cathode layer. The organic package substrate is a low temperature substrate such that the organic package substrate is maintained at a temperature of 215 C or less when the cathode layer is laser annealed. The organic package substrate can also be a flexible organic package substrate.
    Type: Application
    Filed: June 29, 2017
    Publication date: April 30, 2020
    Inventors: Thomas L. SOUNART, Sasha N. OSTER, Veronica A. Strong, Johanna M. SWAN
  • Patent number: 10629557
    Abstract: A system for packaging integrated circuits includes an integrated circuit having one or more integrated circuit terminals. The system for packaging integrated circuits also includes a substrate having one or more substrate terminals. The system for packaging integrated circuits further includes an electrically conductive adhesive in communication with the integrated circuit terminals and the substrate terminals. The electrically conductive adhesive establishes an electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals. The electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals are enclosed in a dielectric. The system for packaging integrated circuits includes a second adhesive in communication with the integrated circuit and the substrate, wherein the second adhesive couples the integrated circuit and substrate together.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: April 21, 2020
    Inventors: Veronica A Strong, Sasha N. Oster, Shawna M. Liff
  • Patent number: 10605794
    Abstract: An interconnected corrugated carbon-based network comprising a plurality of expanded and interconnected carbon layers is disclosed. In one embodiment, each of the expanded and interconnected carbon layers is made up of at least one corrugated carbon sheet that is one atom thick. In another embodiment, each of the expanded and interconnected carbon layers is made up of a plurality of corrugated carbon sheets that are each one atom thick. The interconnected corrugated carbon-based network is characterized by a high surface area with highly tunable electrical conductivity and electrochemical properties.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: March 31, 2020
    Assignee: The Regents of the University of California
    Inventors: Veronica A. Strong, Maher F. El-Kady, Richard Barry Kaner
  • Publication number: 20190312001
    Abstract: A system for packaging integrated circuits includes an integrated circuit having one or more integrated circuit terminals. The system for packaging integrated circuits also includes a substrate having one or more substrate terminals. The system for packaging integrated circuits further includes an electrically conductive adhesive in communication with the integrated circuit terminals and the substrate terminals. The electrically conductive adhesive establishes an electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals. The electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals are enclosed in a dielectric. The system for packaging integrated circuits includes a second adhesive in communication with the integrated circuit and the substrate, wherein the second adhesive couples the integrated circuit and substrate together.
    Type: Application
    Filed: December 30, 2016
    Publication date: October 10, 2019
    Inventors: Veronica A. Strong, Sasha N. Oster, Shawna M. Liff
  • Patent number: 10418605
    Abstract: An apparatus system is provided which comprises: a fabric; a self-assembled monolayer (SAM) material formed on the fabric; and a battery cell formed on the fabric, wherein a current collector of the battery cell is at least in part formed on the SAM material.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: September 17, 2019
    Assignee: Intel Corporation
    Inventors: Veronica A. Strong, Sasha N. Oster, Feras Eid, Aranzazu Maestre Caro
  • Publication number: 20180323016
    Abstract: Capacitors having electrodes made of interconnected corrugated carbon-based networks (ICCNs) are disclosed. The ICCN electrodes have properties that include high surface area and high electrical conductivity. Moreover, the electrodes are fabricated into an interdigital planar geometry with dimensions that range down to a sub-micron scale. As such, micro-supercapacitors employing ICCN electrodes are fabricated on flexible substrates for realizing flexible electronics and on-chip applications that can be integrated with micro-electromechanical systems (MEMS) technology and complementary metal oxide semiconductor technology in a single chip. In addition, capacitors fabricated of ICCN electrodes that sandwich an ion porous separator realize relatively thin and flexible supercapacitors that provide compact and lightweight yet high density energy storage for scalable applications.
    Type: Application
    Filed: July 9, 2018
    Publication date: November 8, 2018
    Inventors: Maher F. El-Kady, Veronica A. Strong, Richard B. Kaner
  • Patent number: 10115532
    Abstract: Capacitors having electrodes made of interconnected corrugated carbon-based networks (ICCNs) are disclosed. The ICCN electrodes have properties that include high surface area and high electrical conductivity. Moreover, the electrodes are fabricated into an interdigital planar geometry with dimensions that range down to a sub-micron scale. As such, micro-supercapacitors employing ICCN electrodes are fabricated on flexible substrates for realizing flexible electronics and on-chip applications that can be integrated with micro-electromechanical systems (MEMS) technology and complementary metal oxide semiconductor technology in a single chip. In addition, capacitors fabricated of ICCN electrodes that sandwich an ion porous separator realize relatively thin and flexible supercapacitors that provide compact and lightweight yet high density energy storage for scalable applications.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: October 30, 2018
    Assignee: The Regents of the University of California
    Inventors: Maher F. El-Kady, Veronica A. Strong, Richard B. Kaner
  • Publication number: 20180287115
    Abstract: An apparatus system is provided which comprises: a fabric; a self-assembled monolayer (SAM) material formed on the fabric; and a battery cell formed on the fabric, wherein a current collector of the battery cell is at least in part formed on the SAM material.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 4, 2018
    Inventors: Veronica A. Strong, Sasha N. Oster, Feras Eid, Aranzazu Maestre Caro
  • Publication number: 20170299563
    Abstract: An interconnected corrugated carbon-based network comprising a plurality of expanded and interconnected carbon layers is disclosed. In one embodiment, each of the expanded and interconnected carbon layers is made up of at least one corrugated carbon sheet that is one atom thick. In another embodiment, each of the expanded and interconnected carbon layers is made up of a plurality of corrugated carbon sheets that are each one atom thick. The interconnected corrugated carbon-based network is characterized by a high surface area with highly tunable electrical conductivity and electrochemical properties.
    Type: Application
    Filed: February 8, 2017
    Publication date: October 19, 2017
    Inventors: Veronica A. Strong, Maher F. El-Kady, Richard Barry Kaner
  • Patent number: 9779884
    Abstract: Capacitors having electrodes made of interconnected corrugated carbon-based networks (ICCNs) are disclosed. The ICCN electrodes have properties that include high surface area and high electrical conductivity. Moreover, the electrodes are fabricated into an interdigital planar geometry with dimensions that range down to a sub-micron scale. As such, micro-supercapacitors employing ICCN electrodes are fabricated on flexible substrates for realizing flexible electronics and on-chip applications that can be integrated with micro-electromechanical systems (MEMS) technology and complementary metal oxide semiconductor technology in a single chip. In addition, capacitors fabricated of ICCN electrodes that sandwich an ion porous separator realize relatively thin and flexible supercapacitors that provide compact and lightweight yet high density energy storage for scalable applications.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: October 3, 2017
    Assignee: The Regents of the University of California
    Inventors: Maher F. El-Kady, Veronica A. Strong, Richard B. Kaner
  • Publication number: 20170271093
    Abstract: Capacitors having electrodes made of interconnected corrugated carbon-based networks (ICCNs) are disclosed. The ICCN electrodes have properties that include high surface area and high electrical conductivity. Moreover, the electrodes are fabricated into an interdigital planar geometry with dimensions that range down to a sub-micron scale. As such, micro-supercapacitors employing ICCN electrodes are fabricated on flexible substrates for realizing flexible electronics and on-chip applications that can be integrated with micro-electromechanical systems (MEMS) technology and complementary metal oxide semiconductor technology in a single chip. In addition, capacitors fabricated of ICCN electrodes that sandwich an ion porous separator realize relatively thin and flexible supercapacitors that provide compact and lightweight yet high density energy storage for scalable applications.
    Type: Application
    Filed: June 2, 2017
    Publication date: September 21, 2017
    Inventors: Maher F. El-Kady, Veronica A. Strong, Richard B. Kaner
  • Publication number: 20150098167
    Abstract: Capacitors having electrodes made of interconnected corrugated carbon-based networks (ICCNs) are disclosed. The ICCN electrodes have properties that include high surface area and high electrical conductivity. Moreover, the electrodes are fabricated into an interdigital planar geometry with dimensions that range down to a sub-micron scale. As such, micro-supercapacitors employing ICCN electrodes are fabricated on flexible substrates for realizing flexible electronics and on-chip applications that can be integrated with micro-electromechanical systems (MEMS) technology and complementary metal oxide semiconductor technology in a single chip. In addition, capacitors fabricated of ICCN electrodes that sandwich an ion porous separator realize relatively thin and flexible supercapacitors that provide compact and lightweight yet high density energy storage for scalable applications.
    Type: Application
    Filed: March 5, 2013
    Publication date: April 9, 2015
    Inventors: Maher F. El-Kady, Veronica A. Strong, Richard B. Kaner