Patents by Inventor Violante Moschiano

Violante Moschiano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • THRESHOLD VOLTAGE ANALYSIS
    Publication number: 20150340086
    Abstract: Apparatuses and methods for threshold voltage analysis are described. One or more methods for threshold voltage analysis include storing expected state indicators corresponding to a group of memory cells, applying a first sensing voltage to a selected access line to which the group of memory cells is coupled, sensing whether at least one of the memory cells of the group conducts responsive to the first sensing voltage, determining whether a discharge indicator for the at least one of the memory cells has changed responsive to application of the first sensing voltage, and determining that the first sensing voltage is the threshold voltage for a particular program state of the at least one of the memory cells.
    Type: Application
    Filed: May 23, 2014
    Publication date: November 26, 2015
    Applicant: Micron Technology, Inc.
    Inventors: William C. Filipiak, Violante Moschiano
  • MEMORY APPARATUS, SYSTEMS, AND METHODS
    Publication number: 20150325309
    Abstract: Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the influence of factors such as neighboring charge storage elements and parasitic coupling. Pre-compensation or post-compensation of threshold voltage for neighboring programmed aggressor memory cells reduces the threshold voltage uncertainty in a flash memory system. Using a buffer having a data structure such as a lookup table provides for programmable threshold voltage distributions that enables the distribution of data states in a multi-level cell flash memory to be tailored, such as to provide more reliable operation. Additional apparatus, systems, and methods are provided.
    Type: Application
    Filed: July 20, 2015
    Publication date: November 12, 2015
    Inventors: Violante Moschiano, Tommaso Vali, Giovanni Naso, Vishal Sarin, William Henry Radke, Theodore T. Pekny
  • LEVEL COMPENSATION IN MULTILEVEL MEMORY
    Publication number: 20150302931
    Abstract: Some embodiments include apparatuses and methods having a compensation unit to provide a compensation value based at least in part on a threshold voltage value of a memory cell. At least one of such embodiments includes a controller to select a code during an operation of retrieving information from the memory cell to represent a value of information stored in the memory cell. Such a code can be associated with an address having an address value based at least in part on the compensation value. Additional apparatuses and methods are described.
    Type: Application
    Filed: July 2, 2015
    Publication date: October 22, 2015
    Inventors: Violante Moschiano, Walter Di Francesco
  • Sensing operations in a memory device
    Patent number: 9165664
    Abstract: Methods and apparatus for sensing operations in memory devices are disclosed. In at least one embodiment, a sensing operation to determine negative threshold voltages in memory cells by an elevated source potential applied to a string of memory cells and an elevated data line potential applied to the string of memory cells is disclosed. A ramped sense potential is incorporated into the sense operation according to at least one embodiment. A sense circuit diode allows a sense potential to fall below a data line potential during a sensing operation according to another embodiment.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: October 20, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Andrea D'Alessandro, Violante Moschiano
  • Dynamic program window determination in a memory device
    Patent number: 9129684
    Abstract: A memory device has an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to determine a program window after a portion of a particular programming operation performed on the memory device is performed and before a subsequent portion of the particular programming operation performed on the memory device is performed. The controller is configured to determine the program window responsive to an amount of program disturb experienced by a particular state of a memory cell. The controller is configured to perform the subsequent portion of the particular programming operation performed on the memory device using the determined program window.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: September 8, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Tommaso Vali, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
  • NON-VOLATILE MEMORY PROGRAMMING
    Publication number: 20150248937
    Abstract: Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method includes applying voltages to data lines associated with different groups of memory cells during a programming operation. Such a method applies the voltages to the data lines associated with a last group of memory cells being programmed in a different fashion from the other groups of memory cells after the other groups of memory cells have been programmed. Other embodiments including additional memory devices and methods are described.
    Type: Application
    Filed: May 18, 2015
    Publication date: September 3, 2015
    Inventors: Paul D. Ruby, Violante Moschiano, Giovanni Santin
  • THRESHOLD VOLTAGE COMPENSATION IN A MEMORY
    Publication number: 20150243351
    Abstract: Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the influence of factors such as neighboring charge storage elements and parasitic coupling. Pre-compensation or post-compensation of threshold voltage for neighboring programmed “aggressor” memory cells reduces the threshold voltage uncertainty in a flash memory system. Using a buffer having a data structure such as a lookup table provides for programmable threshold voltage distributions that enables the distribution of data states in a multi-level cell flash memory to be tailored, such as to provide more reliable operation.
    Type: Application
    Filed: May 8, 2015
    Publication date: August 27, 2015
    Inventors: Violante Moschiano, Tommaso Vali, Giovanni Naso, Vishal Sarin, William Henry Radke, Theodore T. Pekny
  • Memories and methods of programming memories
    Patent number: 9105337
    Abstract: Apparatus and methods for adjusting programming for upper pages of memories are disclosed. In at least one embodiment, a threshold voltage distribution upper limit is determined after a single programming pulse for lower page programming, and upper page programming start voltages are adjusted based on the determined upper limit of the threshold voltage distribution.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: August 11, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Pranav Kalavade, Akira Goda, Tommaso Vali, Violante Moschiano
  • Memory Systems and Memory Control Methods
    Publication number: 20150220344
    Abstract: Memory systems and memory control methods are described.
    Type: Application
    Filed: February 4, 2014
    Publication date: August 6, 2015
    Applicant: Micron Technology, Inc.
    Inventors: Umberto Siciliani, Tommaso Vali, Walter Di-Francesco, Violante Moschiano, Andrea Smaniotto
  • Memory apparatus, systems, and methods
    Patent number: 9087594
    Abstract: Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the influence of factors such as neighboring charge storage elements and parasitic coupling. Pre-compensation or post-compensation of threshold voltage for neighboring programmed aggressor memory cells reduces the threshold voltage uncertainty in a flash memory system. Using a buffer having a data structure such as a lookup table provides for programmable threshold voltage distributions that enables the distribution of data states in a multi-level cell flash memory to be tailored, such as to provide more reliable operation. Additional apparatus, systems, and methods are provided.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: July 21, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Tommaso Vali, Giovanni Naso, Vishal Sarin, William Henry Radke, Theodore T. Pekny
  • Level compensation in multilevel memory
    Patent number: 9076547
    Abstract: Some embodiments include apparatuses and methods having a compensation unit to provide a compensation value based at least in part on a threshold voltage value of a memory cell. At least one of such embodiments includes a controller to select a code during an operation of retrieving information from the memory cell to represent a value of information stored in the memory cell. Such a code can be associated with an address having an address value based at least in part on the compensation value. Additional apparatuses and methods are described.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: July 7, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Walter Di Francesco
  • ARCHITECTURE AND METHOD FOR MEMORY PROGRAMMING
    Publication number: 20150170755
    Abstract: Methods of programming a memory, memory devices, and systems are disclosed, for example. In one such method, each data line of a memory to be programmed is biased differently depending upon whether one or more of the data lines adjacent the data line are inhibited. In one such system, a connection circuit provides data corresponding to the inhibit status of a target data line to page buffers associated with data lines adjacent to the target data line.
    Type: Application
    Filed: January 23, 2014
    Publication date: June 18, 2015
    Applicant: Micron Technology, Inc.
    Inventors: Tommaso Vali, Giovanni Santin, Michele Incarnati, Violante Moschiano
  • Non-volatile memory programming
    Patent number: 9042184
    Abstract: Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method includes applying voltages to data lines associated with different groups of memory cells during a programming operation. Such a method applies the voltages to the data lines associated with a last group of memory cells being programmed in a different fashion from the other groups of memory cells after the other groups of memory cells have been programmed. Other embodiments including additional memory devices and methods are described.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: May 26, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Paul D. Ruby, Violante Moschiano, Giovanni Santin
  • Memory cell sensing using a boost voltage
    Patent number: 9036426
    Abstract: The present disclosure includes devices, methods, and systems including memory cell sensing using a boost voltage. One or more embodiments include pre-charging and/or floating a data line associated with a selected memory cell, boosting the pre-charged and/or floating data line, and determining a state of the selected memory cell based on a sensed discharge of the data line after boosting the data line.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: May 19, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Domenico Di Cicco, Andrea D'Alessandro
  • Threshold voltage compensation in a multilevel memory
    Patent number: 9030870
    Abstract: Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the influence of factors such as neighboring charge storage elements and parasitic coupling. Pre-compensation or post-compensation of threshold voltage for neighboring programmed “aggressor” memory cells reduces the threshold voltage uncertainty in a flash memory system. Using a buffer having a data structure such as a lookup table provides for programmable threshold voltage distributions that enables the distribution of data states in a multi-level cell flash memory to be tailored, such as to provide more reliable operation.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: May 12, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Tommaso Vali, Giovanni Naso, Vishal Sarin, William Henry Radke, Theodore T. Pekny
  • Method for kink compensation in a memory
    Patent number: 9025388
    Abstract: This disclosure concerns memory kink compensation. One method embodiment includes applying a number of sequentially incrementing programming pulses to a memory cell, with the sequential programming pulses incrementing by a first programming pulse step voltage magnitude. A seeding voltage is applied after applying the number of sequentially incrementing programming pulses. A next programming pulse is applied after applying the seeding voltage, with the next programming pulse being adjusted relative to a preceding one of the sequentially incrementing programming pulses by a second programming pulse step voltage magnitude. The second programming pulse step voltage magnitude can be less than the first programming pulse step voltage magnitude.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: May 5, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Frankie Roohparvar, Giovanni Santin, Vishal Sarin, Allahyar Vahidimowlavi, Tommaso Vali
  • METHODS FOR PROGRAMMING A MEMORY DEVICE AND MEMORY DEVICES
    Publication number: 20150117111
    Abstract: Methods for programming memory cells and memory devices are disclosed. One such method for programming includes performing a program verify operation of a group of memory cells. A number of potential CS2 situations are detected. If the number of detected potential CS2 situations is greater than a threshold, programming compensation for a CS2 situation is used in a subsequent programming operation.
    Type: Application
    Filed: February 4, 2013
    Publication date: April 30, 2015
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Violante Moschiano, Giovanni Santin
  • Methods for programming a memory device and memory devices
    Patent number: 9007832
    Abstract: Methods for programming memory cells and memory devices are disclosed. One such method for programming includes performing a program verify operation of a group of memory cells. A number of potential CS2 situations are detected. If the number of detected potential CS2 situations is greater than a threshold, programming compensation for a CS2 situation is used in a subsequent programming operation.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: April 14, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Violante Moschiano, Giovanni Santin
  • Loading trim address and trim data pairs
    Patent number: 9007867
    Abstract: Methods of loading trim address and trim data pairs to a trim register array, and apparatus configured to perform such methods. The methods maintain a correspondence between the trim address and the trim data of each trim address and trim data pair in the trim register array. The trim address of a particular trim address and trim data pair corresponds to a storage location of a trim settings array containing trim settings used in performing operations on an array of memory cells. The trim data of the particular trim address and trim data pair corresponds to data to modify a value of the storage location of the trim settings array corresponding to the trim address of the particular trim address and trim data pair.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: April 14, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Mark Hawes, Violante Moschiano
  • NON-VOLATILE MEMORY PROGRAMMING
    Publication number: 20150085581
    Abstract: Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method can include applying a signal to a line associated with a memory cell, the signal being generated based on digital information. The method can also include, while the signal is applied to the line, determining whether a state of the memory cell is near a target state when the digital information has a first value, and determining whether the state of the memory cell has reached the target state when the digital information has a second value. Other embodiments including additional memory devices and methods are described.
    Type: Application
    Filed: November 26, 2014
    Publication date: March 26, 2015
    Inventors: Violante Moschiano, Giovanni Santin, Michele Incarnati