Patents by Inventor Vishal C. Aslot
Vishal C. Aslot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11210282Abstract: For improving data placement optimization in a computing storage environment, an application layer and/or a user are allowed to attach anticipated usage metadata and directive metadata to a file. The anticipated usage metadata contains a plurality of attributes describing characteristics of the file and the directive metadata contains directives comprising storage instructions for the file. Additionally, a set of metadata is added to the file at a time of creation. The core metadata includes characteristics such as an importance factor as to how essential the anticipated usage metadata and directive metadata should be followed when determining file placement with the computing storage environment.Type: GrantFiled: July 30, 2018Date of Patent: December 28, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Vishal C. Aslot, Adekunle Bello, Gregory J. Boss
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Patent number: 11036431Abstract: A system for generating memory references is provided. Instructions to perform a memory data operation on a database from a computer system is received. A computing system generates a memory reference in a region of memory, wherein the memory reference is independent of where the memory is accessible by a computing system. A memory reference to a memory region on a database is stored by a computing system. A memory reference based, at least, on the memory data operation is translated. A data in the memory via the instruction to perform a memory data operation is accessed. A memory data from the database is retrieved.Type: GrantFiled: June 26, 2019Date of Patent: June 15, 2021Assignee: International Business Machines CorporationInventors: Vishal C. Aslot, Anil Kalavakolanu, Brian W. Hart, Evan Allen Zoss
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Publication number: 20200409595Abstract: A system for generating memory references is provided. Instructions to perform a memory data operation on a database from a computer system is received. A computing system generates a memory reference in a region of memory, wherein the memory reference is independent of where the memory is accessible by a computing system. A memory reference to a memory region on a database is stored by a computing system. A memory reference based, at least, on the memory data operation is translated. A data in the memory via the instruction to perform a memory data operation is accessed. A memory data from the database is retrieved.Type: ApplicationFiled: June 26, 2019Publication date: December 31, 2020Inventors: Vishal C. Aslot, Anil Kalavakolanu, Brian W. Hart, Evan Allen Zoss
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Patent number: 10671369Abstract: The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.Type: GrantFiled: December 18, 2017Date of Patent: June 2, 2020Assignee: International Business Machines CorporationInventors: Andre L. Albot, Vishal C. Aslot, Thomas V. Burks, III, John D. Dietel
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Patent number: 10620932Abstract: The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.Type: GrantFiled: December 18, 2017Date of Patent: April 14, 2020Assignee: International Business Machines CorporationInventors: Andre L. Albot, Vishal C. Aslot, Thomas V. Burks, III, John D. Dietel
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Patent number: 10303882Abstract: A method and apparatus are provided for implementing system locale management including locale replacement risk analysis in a computer system. A Locale Update Risk Analysis Agent (RAA) scans globalization API usages on each pair of locale and running application. The scanned API list of each running application is compared with predefined API locale sensitive weights, and a locale replacement risk index is calculated on each application under a certain locale. A living locale-object update decision is made based on the calculated locale replacement risk indexes.Type: GrantFiled: July 10, 2018Date of Patent: May 28, 2019Assignee: International Business Machines CorporationInventors: Debbie A. Anglin, Vishal C. Aslot, Yu Gu, Su Liu
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Patent number: 10157145Abstract: Embodiments disclose techniques for sharing a context for a coherent accelerator in a kernel of a computer system. A request is received from a first application to perform an I/O operation within a kernel context. The request specifies a first effective address distinct to the first application. The first effective address specifies a location in a first effective address space and a first effective segment identifier. The first effective address is remapped to a second effective address. The second effective address specifies a location in a second effective address space of the kernel context and a second effective segment identifier. A virtual address mapping to a virtual address space within the kernel context is determined. The virtual address is translated to a physical memory address.Type: GrantFiled: January 4, 2018Date of Patent: December 18, 2018Assignee: International Business Machines CorporationInventors: Andre L. Albot, Vishal C. Aslot, Mark Rogers, Randal C. Swanberg
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Patent number: 10157144Abstract: Embodiments disclose techniques for sharing a context for a coherent accelerator in a kernel of a computer system. A request is received from a first application to perform an I/O operation within a kernel context. The request specifies a first effective address distinct to the first application. The first effective address specifies a location in a first effective address space and a first effective segment identifier. The first effective address is remapped to a second effective address. The second effective address specifies a location in a second effective address space of the kernel context and a second effective segment identifier. A virtual address mapping to a virtual address space within the kernel context is determined. The virtual address is translated to a physical memory address.Type: GrantFiled: January 3, 2018Date of Patent: December 18, 2018Assignee: International Business Machines CorporationInventors: Andre L. Albot, Vishal C. Aslot, Mark Rogers, Randal C. Swanberg
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Publication number: 20180336238Abstract: For improving data placement optimization in a computing storage environment, an application layer and/or a user are allowed to attach anticipated usage metadata and directive metadata to a file. The anticipated usage metadata contains a plurality of attributes describing characteristics of the file and the directive metadata contains directives comprising storage instructions for the file. Additionally, a set of metadata is added to the file at a time of creation. The core metadata includes characteristics such as an importance factor as to how essential the anticipated usage metadata and directive metadata should be followed when determining file placement with the computing storage environment.Type: ApplicationFiled: July 30, 2018Publication date: November 22, 2018Inventors: Vishal C. ASLOT, Adekunle BELLO, Gregory J. BOSS
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Publication number: 20180322290Abstract: A method and apparatus are provided for implementing system locale management including locale replacement risk analysis in a computer system. A Locale Update Risk Analysis Agent (RAA) scans globalization API usages on each pair of locale and running application. The scanned API list of each running application is compared with predefined API locale sensitive weights, and a locale replacement risk index is calculated on each application under a certain locale. A living locale-object update decision is made based on the calculated locale replacement risk indexes.Type: ApplicationFiled: July 10, 2018Publication date: November 8, 2018Inventors: Debbie A. Anglin, Vishal C. Aslot, Yu Gu, Su Liu
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Patent number: 10120891Abstract: For improving data placement optimization in a computing storage environment, an application layer and/or a user are allowed to attach anticipated usage metadata and directive metadata to a file.Type: GrantFiled: February 11, 2013Date of Patent: November 6, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Vishal C. Aslot, Adekunle Bello, Gregory J. Boss
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Patent number: 10102376Abstract: A method and apparatus are provided for implementing system locale management including locale replacement risk analysis in a computer system. A Locale Update Risk Analysis Agent (RAA) scans globalization API usages on each pair of locale and running application. The scanned API list of each running application is compared with predefined API locale sensitive weights, and a locale replacement risk index is calculated on each application under a certain locale. A living locale-object update decision is made based on the calculated locale replacement risk indexes.Type: GrantFiled: August 22, 2016Date of Patent: October 16, 2018Assignee: International Business Machines CorporationInventors: Debbie A. Anglin, Vishal C. Aslot, Yu Gu, Su Liu
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Patent number: 10057289Abstract: A system and method and computer program product for user authentication that uses information about a user's context or context of their personal device(s) to dynamically modify that user's authentication or login requirements to an application in a computer or mobile device. The system is configured to run methods that detect and make use of a user's context that includes: a current environment or personal context, and uses this capability to enable variable strength authentication when attempting to log in or enter another application or resource. In one embodiment, the system implements methods to dynamically adjust the authentication challenge as a differential of all accumulated user contexts (e.g., providing a shorter password or pin-code).Type: GrantFiled: August 12, 2013Date of Patent: August 21, 2018Assignee: International Business Machines CorporationInventors: Tamer E. Abuelsaad, Vishal C. Aslot, Adekunle Bello, Gregory J. Boss
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Patent number: 10031858Abstract: Methods to perform an operation comprising identifying, in a software page frame table by an operating system interrupt handler, a physical address of a memory page, wherein the physical address of the memory page is identified based on a virtual segment identifier (VSID) and a page number, wherein the VSID is specified in an interrupt received from a coherent accelerator and wherein the coherent accelerator generated the interrupt in response to a page fault associated with the memory page, and creating, by the operating system interrupt handler, a page table entry in a hardware page table associating the VSID and the page number with the physical address of the memory page, wherein creating the page table entry resolves the page fault.Type: GrantFiled: January 4, 2016Date of Patent: July 24, 2018Assignee: International Business Machines CorporationInventors: Vishal C. Aslot, Arnold Flores, Mark D. Rogers
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Patent number: 10025722Abstract: Systems and computer program products to perform an operation comprising identifying, in a software page frame table by an operating system interrupt handler, a physical address of a memory page, wherein the physical address of the memory page is identified based on a virtual segment identifier (VSID) and a page number, wherein the VSID is specified in an interrupt received from a coherent accelerator and wherein the coherent accelerator generated the interrupt in response to a page fault associated with the memory page, and creating, by the operating system interrupt handler, a page table entry in a hardware page table associating the VSID and the page number with the physical address of the memory page, wherein creating the page table entry resolves the page fault.Type: GrantFiled: October 28, 2015Date of Patent: July 17, 2018Assignee: International Business Machines CorporationInventors: Vishal C. Aslot, Arnold Flores, Mark D. Rogers
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Patent number: 9996357Abstract: Systems, methods, and computer program products to perform an operation comprising creating, by a kernel, a temporary effective address associated with a virtual segment identifier (VSID), wherein the VSID is received by a processor in an asynchronous interrupt generated by a coherent accelerator in response to a page fault generated by the coherent accelerator in executing an instruction, accessing the temporary effective address by the processor to recreate the page fault on the processor, and resolving the page fault by an operating system executing on the processor.Type: GrantFiled: October 30, 2015Date of Patent: June 12, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andre L. Albot, Vishal C. Aslot, Arnold Flores, Bruce Mealey, Mark D. Rogers
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Patent number: 9971550Abstract: A processor-implemented method for copying a source file to a destination file using a virtual memory manager (VMM) of a computer operating system is provided. The method includes receiving, by the VMM, a request to copy the source file to a destination file. The method further provides that based on the status of the virtual page, performing at least one of moving the virtual page to the destination file, copying the virtual page to the destination file, reading the virtual page into memory, and ignoring the virtual page.Type: GrantFiled: November 12, 2015Date of Patent: May 15, 2018Assignee: International Business Machines CorporationInventors: Vishal C. Aslot, Ninad S. Palsule
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Patent number: 9971701Abstract: Embodiments disclose techniques for sharing a context for a coherent accelerator in a kernel of a computer system. According to one embodiment, a request is received from a first application to perform an I/O operation within a kernel context. The request specifies a first effective address distinct to the first application. The first effective address specifies a location in a first effective address space and a first effective segment identifier. The first effective address is remapped to a second effective address. The second effective address specifies a location in a second effective address space of the kernel context and a second effective segment identifier. A virtual address mapping to a virtual address space within the kernel context is determined. The virtual address is translated to a physical memory address.Type: GrantFiled: October 16, 2015Date of Patent: May 15, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andre L. Albot, Vishal C. Aslot, Mark D. Rogers, Randal C. Swanberg
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Publication number: 20180129609Abstract: Embodiments disclose techniques for sharing a context for a coherent accelerator in a kernel of a computer system. A request is received from a first application to perform an I/O operation within a kernel context. The request specifies a first effective address distinct to the first application. The first effective address specifies a location in a first effective address space and a first effective segment identifier. The first effective address is remapped to a second effective address. The second effective address specifies a location in a second effective address space of the kernel context and a second effective segment identifier. A virtual address mapping to a virtual address space within the kernel context is determined. The virtual address is translated to a physical memory address.Type: ApplicationFiled: January 3, 2018Publication date: May 10, 2018Inventors: Andre L. ALBOT, Vishal C. ASLOT, Mark ROGERS, Randal C. SWANBERG
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Publication number: 20180129610Abstract: Embodiments disclose techniques for sharing a context for a coherent accelerator in a kernel of a computer system. A request is received from a first application to perform an I/O operation within a kernel context. The request specifies a first effective address distinct to the first application. The first effective address specifies a location in a first effective address space and a first effective segment identifier. The first effective address is remapped to a second effective address. The second effective address specifies a location in a second effective address space of the kernel context and a second effective segment identifier. A virtual address mapping to a virtual address space within the kernel context is determined. The virtual address is translated to a physical memory address.Type: ApplicationFiled: January 4, 2018Publication date: May 10, 2018Inventors: Andre L. ALBOT, Vishal C. ASLOT, Mark ROGERS, Randal C. SWANBERG