Patents by Inventor Vishal C. Aslot

Vishal C. Aslot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180121193
    Abstract: The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.
    Type: Application
    Filed: December 18, 2017
    Publication date: May 3, 2018
    Inventors: Andre L. ALBOT, Vishal C. ASLOT, Thomas V. BURKS, III, John D. DIETEL
  • Publication number: 20180107472
    Abstract: The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.
    Type: Application
    Filed: December 18, 2017
    Publication date: April 19, 2018
    Inventors: Andre L. ALBOT, Vishal C. ASLOT, Thomas V. BURKS, III, John D. DIETEL
  • Patent number: 9928142
    Abstract: Systems, methods, and computer program products to perform an operation comprising determining, by a processor, a process identifier of a process associated with a page fault based on an interrupt source number, wherein the page fault was triggered by a coherent accelerator, executing the process on the processor to recreate the page fault on the processor, and resolving the page fault by an operating system executing on the processor.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: March 27, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vishal C. Aslot, Bruce Mealey, Mark D. Rogers, Randal C. Swanberg
  • Patent number: 9910666
    Abstract: A method and apparatus are provided for implementing system locale management including live locale object update in a computer system. A living locale-object replacement is provided on an operating system without shutdown of the operating system. A Locale-Object Management Daemon (LOMD) checks a predefined living locale object update profile, monitors status of a table of running application and correlated loaded locale-objects and decides if a locale object can be updated in certain nodes for certain applications.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: March 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: Debbie A. Anglin, Vishal C. Aslot, Yu Gu, Su Liu
  • Publication number: 20180053000
    Abstract: A method and apparatus are provided for implementing system locale management including locale replacement risk analysis in a computer system. A Locale Update Risk Analysis Agent (RAA) scans globalization API usages on each pair of locale and running application. The scanned API list of each running application is compared with predefined API locale sensitive weights, and a locale replacement risk index is calculated on each application under a certain locale. A living locale-object update decision is made based on the calculated locale replacement risk indexes.
    Type: Application
    Filed: August 22, 2016
    Publication date: February 22, 2018
    Inventors: Debbie A. Anglin, Vishal C. Aslot, Yu Gu, Su Liu
  • Publication number: 20180052680
    Abstract: A method and apparatus are provided for implementing system locale management including live locale object update in a computer system. A living locale-object replacement is provided on an operating system without shutdown of the operating system. A Locale-Object Management Daemon (LOMD) checks a predefined living locale object update profile, monitors status of a table of running application and correlated loaded locale-objects and decides if a locale object can be updated in certain nodes for certain applications.
    Type: Application
    Filed: August 22, 2016
    Publication date: February 22, 2018
    Inventors: Debbie A. Anglin, Vishal C. Aslot, Yu Gu, Su Liu
  • Patent number: 9898417
    Abstract: Embodiments disclose techniques for sharing a context for a coherent accelerator in a kernel of a computer system. According to one embodiment, a request is received from a first application to perform an I/O operation within a kernel context. The request specifies a first effective address distinct to the first application. The first effective address specifies a location in a first effective address space and a first effective segment identifier. The first effective address is remapped to a second effective address. The second effective address specifies a location in a second effective address space of the kernel context and a second effective segment identifier. A virtual address mapping to a virtual address space within the kernel context is determined. The virtual address is translated to a physical memory address.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: February 20, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andre L. Albot, Vishal C. Aslot, Mark D. Rogers, Randal C. Swanberg
  • Patent number: 9898274
    Abstract: The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: February 20, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andre L. Albot, Vishal C. Aslot, Thomas V. Burks, III, John D. Dietel
  • Patent number: 9898277
    Abstract: The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: February 20, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andre L. Albot, Vishal C. Aslot, Thomas V. Burks, III, John D. Dietel
  • Patent number: 9779041
    Abstract: Embodiments disclose techniques for enabling the use poll and select subroutines with coherent accelerator block or character devices. In one embodiment, an operating system receives, from an application, a system call to attach a hardware context with the coherent accelerator block or character device. The operating system generates a channel based on a file descriptor associated with the attach system call. The operating system associates the channel with a hardware context selected from a plurality of hardware contexts available to the coherent accelerator, wherein the hardware context is attached to the application. Upon receiving, from the application, a system call to check for exceptions that have occurred on the coherent accelerator block device or character device, the operating system returns an indication of any exceptions which have occurred while the coherent accelerator was using the hardware context to the application.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: October 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vishal C. Aslot, Bruce Mealey, Grover H. Neuman, Randal C. Swanberg
  • Patent number: 9747031
    Abstract: A computer system for copying a source file to a destination file using a virtual memory manager of a computer operating system is provided. One or more processors, one or more non-tangible computer-readable storage devices, and a plurality of program instructions are included. The program instructions provide for receiving, by the virtual memory manager, a request to copy the source file to a destination file. The program instructions further provides that based on the status of the virtual page, performing at least one moving the virtual page to the destination file, copying the virtual page to the destination file, reading the virtual page into memory, and ignoring the virtual page.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: August 29, 2017
    Assignee: International Business Machines Corporation
    Inventors: Vishal C. Aslot, Ninad S. Palsule
  • Patent number: 9740424
    Abstract: A computer program product for copying a source file to a destination file using a virtual memory manager of a computer operating system is provided. The computer program product includes receiving, by the virtual memory manager, a request to copy the source file to a destination file. The computer program product further provides that based on the status of the virtual page, performing at least one moving the virtual page to the destination file, copying the virtual page to the destination file, reading the virtual page into memory, and ignoring the virtual page.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: August 22, 2017
    Assignee: International Business Machines Corporation
    Inventors: Vishal C. Aslot, Ninad S. Palsule
  • Patent number: 9710254
    Abstract: The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: July 18, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andre L. Albot, Vishal C. Aslot, Thomas V. Burks, III, John D. Dietel
  • Patent number: 9690495
    Abstract: Embodiments disclose techniques for emulating memory mapped I/O (MMIO) for coherent accelerators in an error state. In one embodiment, once an operating system determines that a processor is unable to access a coherent accelerator via a MMIO operation, the operating system deletes one or more page table entries associated with MMIO of one or more hardware contexts of the coherent accelerator. After deleting the page table entries, the operating system can detect a page fault associated with execution of a process by the processor. Upon determining that the page fault was caused by the process attempting to access one of the deleted page table entries while executing a MMIO operation, the operating system emulates the execution of the MMIO operation for the faulting process, giving the process the illusion that its requested MMIO operation was successful.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: June 27, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andre L. Albot, Vishal C. Aslot, Bruce Mealey, Nicholas Stilwell
  • Patent number: 9678788
    Abstract: Embodiments disclose techniques for enabling the use poll and select subroutines with coherent accelerator block or character devices. In one embodiment, an operating system receives, from an application, a system call to attach a hardware context with the coherent accelerator block or character device. The operating system generates a channel based on a file descriptor associated with the attach system call. The operating system associates the channel with a hardware context selected from a plurality of hardware contexts available to the coherent accelerator, wherein the hardware context is attached to the application. Upon receiving, from the application, a system call to check for exceptions that have occurred on the coherent accelerator block device or character device, the operating system returns an indication of any exceptions which have occurred while the coherent accelerator was using the hardware context to the application.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: June 13, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vishal C. Aslot, Bruce Mealey, Grover H. Neuman, Randal C. Swanberg
  • Publication number: 20170161054
    Abstract: The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.
    Type: Application
    Filed: January 11, 2017
    Publication date: June 8, 2017
    Inventors: Andre L. ALBOT, Vishal C. ASLOT, Thomas V. BURKS, III, John D. DIETEL
  • Publication number: 20170139601
    Abstract: A computer system for copying a source file to a destination file using a virtual memory manager of a computer operating system is provided. One or more processors, one or more non-tangible computer-readable storage devices, and a plurality of program instructions are included. The program instructions provide for receiving, by the virtual memory manager, a request to copy the source file to a destination file. The program instructions further provides that based on the status of the virtual page, performing at least one moving the virtual page to the destination file, copying the virtual page to the destination file, reading the virtual page into memory, and ignoring the virtual page.
    Type: Application
    Filed: November 8, 2016
    Publication date: May 18, 2017
    Inventors: Vishal C. Aslot, Ninad S. Palsule
  • Publication number: 20170139648
    Abstract: A processor-implemented method for copying a source file to a destination file using a virtual memory manager (VMM) of a computer operating system is provided. The method includes receiving, by the VMM, a request to copy the source file to a destination file. The method further provides that based on the status of the virtual page, performing at least one of moving the virtual page to the destination file, copying the virtual page to the destination file, reading the virtual page into memory, and ignoring the virtual page.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 18, 2017
    Inventors: Vishal C. Aslot, Ninad S. Palsule
  • Publication number: 20170139639
    Abstract: A computer program product for copying a source file to a destination file using a virtual memory manager of a computer operating system is provided. The computer program product includes receiving, by the virtual memory manager, a request to copy the source file to a destination file. The computer program product further provides that based on the status of the virtual page, performing at least one moving the virtual page to the destination file, copying the virtual page to the destination file, reading the virtual page into memory, and ignoring the virtual page.
    Type: Application
    Filed: November 8, 2016
    Publication date: May 18, 2017
    Inventors: Vishal C. Aslot, Ninad S. Palsule
  • Publication number: 20170132163
    Abstract: Embodiments disclose techniques for enabling the use poll and select subroutines with coherent accelerator block or character devices. In one embodiment, an operating system receives, from an application, a system call to attach a hardware context with the coherent accelerator block or character device. The operating system generates a channel based on a file descriptor associated with the attach system call. The operating system associates the channel with a hardware context selected from a plurality of hardware contexts available to the coherent accelerator, wherein the hardware context is attached to the application. Upon receiving, from the application, a system call to check for exceptions that have occurred on the coherent accelerator block device or character device, the operating system returns an indication of any exceptions which have occurred while the coherent accelerator was using the hardware context to the application.
    Type: Application
    Filed: January 4, 2016
    Publication date: May 11, 2017
    Inventors: Vishal C. Aslot, Bruce Mealey, Grover H. Neuman, Randal C. Swanberg