Patents by Inventor Visvesvaraya Appala Pentakota

Visvesvaraya Appala Pentakota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8264281
    Abstract: A low-noise amplifier (LNA) includes a pair of transistors connected in a cascode configuration to provide amplification to an input signal. The LNA generates an amplified output in differential form across a pair of output terminals. One of the pair of output terminals is the output node of the cascode configuration. The LNA further includes a feedback transistor with its gate terminal connected to the output node of the cascode configuration and its drain terminal connected to the other one of the pair of output terminals. The differential nature of the amplified output reduces the noise figure of the LNA. A frequency-selective network connected across the pair of output terminals sets the frequency selectivity of each of the input section and the output section of the LNA.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: September 11, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Gireesh Rajendran, Visvesvaraya Appala Pentakota, Vijaya Bhaskar Rentala
  • Patent number: 8248055
    Abstract: A voltage reference containing a programmable resistance portion at an output node at which an output reference voltage is provided. The desired magnitude of the programmable portion which provides optimum matching of an output resistance of the voltage reference and a series resistance of an output capacitor of the voltage reference is determined and hard-programmed. As a result, the output voltage of the voltage reference is provided with improved linearity. In an embodiment, the determination of the magnitude of the programmable portion is performed by providing an input to an analog to digital converter (ADC) with the voltage reference driving the ADC. The resistance setting corresponding to the third harmonic being less than a desired threshold is then hard-programmed. In an alternative embodiment, the programmable portion is set to specific resistance dynamically during operation.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: August 21, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Visvesvaraya Appala Pentakota, Anand Hariraj Udupa
  • Patent number: 7885144
    Abstract: An amplifier circuit to amplify a sequence of echoes and to generate a corresponding sequence of amplified signals. In an embodiment, the amplifier includes an operational amplifier, with variable input and feedback resistances such that the ratio of the two resistances can be controlled. A gain control block controls the ratio in a time dependent manner to obtain desired gain factors for each of the echoes. The gain factors can be pre-computed such that all the echoes are gained to the same level in case of an ultra-sound system.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: February 8, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Sandeep Oswal, Jagannathan Venkataraman, Visvesvaraya Appala Pentakota, Shagun Dusad
  • Patent number: 7804328
    Abstract: A source follower or emitter follower buffer provided according to an aspect of the present invention includes a capacitor connected between the input path and a node formed by the junction of a pair of transistors forming a cascoded current source connected to the output of the buffer. The capacitor passes input signal current directly to a switching load connected to the output of the buffer, and very little signal-dependant current flows through the transistor receiving the input signal. As a result, input-output non-linearity due to signal-dependant modulation (variation) of transconductance of the transistor receiving the input signal is minimized. When incorporated in switched-capacitor analog to digital converters, the buffer facilitates generation of digital codes that represent an input signal more accurately.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: September 28, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Visvesvaraya Appala Pentakota, Nitin Agarwal
  • Patent number: 7750737
    Abstract: A fully differential amplifier circuit provided according to an aspect of the present invention contains a stabilization block to measure the common mode component at the output of an input stage, and to inject a current proportionate to the common mode component into each of a pair of paths forming the output of the input stage to stabilize a feedback loop formed by the input stage, an output stage and a common mode feedback block. In an embodiment, the stabilization block contains a buffer to receive the measured common mode component and to provide a buffered output. The injected current is generated based on the buffered output. Due to the presence of the buffer, the differential loop may not be affected by injection of the additional current, thereby avoiding any distortions in the output signal.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: July 6, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Raghu Srinivasa, Visvesvaraya Appala Pentakota, Abhaya Kumar
  • Publication number: 20100080083
    Abstract: An amplifier circuit to amplify a sequence of echoes and to generate a corresponding sequence of amplified signals. In an embodiment, the amplifier includes an operational amplifier, with variable input and feedback resistances such that the ratio of the two resistances can be controlled. A gain control block controls the ratio in a time dependent manner to obtain desired gain factors for each of the echoes. The gain factors can be pre-computed such that all the echoes are gained to the same level in case of an ultra-sound system.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 1, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sandeep Oswal, Jagannathan Venkataraman, Visvesvaraya Appala Pentakota, Shagun Dusad
  • Publication number: 20090315594
    Abstract: A source follower or emitter follower buffer provided according to an aspect of the present invention includes a capacitor connected between the input path and a node formed by the junction of a pair of transistors forming a cascoded current source connected to the output of the buffer. The capacitor passes input signal current directly to a switching load connected to the output of the buffer, and very little signal-dependant current flows through the transistor receiving the input signal. As a result, input-output non-linearity due to signal-dependant modulation (variation) of transconductance of the transistor receiving the input signal is minimized. When incorporated in switched-capacitor analog to digital converters, the buffer facilitates generation of digital codes that represent an input signal more accurately.
    Type: Application
    Filed: August 28, 2008
    Publication date: December 24, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Visvesvaraya Appala Pentakota, Nitin Agarwal
  • Publication number: 20090295363
    Abstract: A voltage reference containing a programmable resistance portion at an output node at which an output reference voltage is provided. The desired magnitude of the programmable portion which provides optimum matching of an output resistance of the voltage reference and a series resistance of an output capacitor of the voltage reference is determined and hard-programmed. As a result, the output voltage of the voltage reference is provided with improved linearity. In an embodiment, the determination of the magnitude of the programmable portion is performed by providing an input to an analog to digital converter (ADC) with the voltage reference driving the ADC. The resistance setting corresponding to the third harmonic being less than a desired threshold is then hard-programmed. In an alternative embodiment, the programmable portion is set to specific resistance dynamically during operation.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 3, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Visvesvaraya Appala Pentakota, Anand Hariraj Udupa
  • Publication number: 20090058527
    Abstract: A fully differential amplifier circuit provided according to an aspect of the present invention contains a stabilization block to measure the common mode component at the output of an input stage, and to inject a current proportionate to the common mode component into each of a pair of paths forming the output of the input stage to stabilize a feedback loop formed by the input stage, an output stage and a common mode feedback block. In an embodiment, the stabilization block contains a buffer to receive the measured common mode component and to provide a buffered output. The injected current is generated based on the buffered output. Due to the presence of the buffer, the differential loop may not be affected by injection of the additional current, thereby avoiding any distortions in the output signal.
    Type: Application
    Filed: August 22, 2008
    Publication date: March 5, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Raghu Srinivasa, Visvesvaraya Appala Pentakota, Abhaya Kumar