Abstract: Embodiments of the present disclosure generally relate to a method for forming and treating a component in semiconductor manufacturing. In one embodiment, a method for treating a chamber component used in vacuum processing includes obtaining the chamber component including a recess formed in a surface of the chamber component, the surface being fabricated from a metal, and the recess has a depth ranging from about 0.5 mm to about 10 mm and a width ranging from about 1 mm to about 15 mm. The method further includes polishing the bottom surface of the recess using a laser to form a polished bottom surface having an Ra number of 1 micron or less. The laser can achieve high quality surface finishing.

Abstract: A method and apparatus for monitoring wear of a chamber component is disclosed herein. In one embodiment, a chamber component is provided. The chamber component includes a body including a first material, a second material disposed on the first material, the second material having an exposed surface defining an interior surface of the chamber component, and a wear surface disposed at a wear depth below the exposed surface of the second material, the wear surface comprising a third material having a composition that is different than a composition of the first material and the second material.

Abstract: A method and apparatus for etching photomasks is provided herein. In one embodiment, a method of etching a photomask includes providing a process chamber having a substrate support pedestal adapted to receive a photomask substrate thereon. An ion-radical shield is disposed above the pedestal. A substrate is placed upon the pedestal beneath the ion-radical shield. A process gas is introduced into the process chamber and a plasma is formed from the process gas. The substrate is etched predominantly with radicals that pass through the shield.

Abstract: Methods for fabricating a photomask are disclosed herein. In one embodiment, a method for fabricating a photomask includes providing a filmstack having a molybdenum layer and a light-shielding layer in a processing chamber, patterning a first resist layer on the light-shielding layer, etching the light-shielding layer using the first resist layer as an etch mask, and etching the molybdenum layer using the patterned light-shielding layer and the patterned first resist layer as a composite mask.

Abstract: Methods for fabricating a photomask are disclosed herein. In one embodiment, a method for fabricating a photomask includes providing a filmstack having a molybdenum layer and a light-shielding layer in a processing chamber, patterning a first resist layer on the light-shielding layer, etching the light-shielding layer using the first resist layer as an etch mask, and etching the molybdenum layer using the patterned light-shielding layer and the patterned first resist layer as a composite mask.

Abstract: Methods of lining and/or filling gaps on a substrate by creating flowable silicon oxide-containing films are provided. The methods involve introducing vapor-phase silicon-containing precursor and oxidant reactants into a reaction chamber containing the substrate under conditions such that a condensed flowable film is formed on the substrate. The flowable film at least partially fills gaps on the substrates and is then converted into a silicon oxide film. In certain embodiments, the methods involve using a catalyst, e.g., a nucleophile or onium catalyst, in the formation of the film. The catalyst may be incorporated into one of the reactants and/or introduced as a separate reactant. Also provided are methods of converting the flowable film to a solid dielectric film. The methods of this invention may be used to line or fill high aspect ratio gaps, including gaps having aspect ratios ranging from 3:1 to 10:1.

Abstract: Systems, methods, and apparatus for depositing a protective layer on a wafer substrate are disclosed. In one aspect, a protective layer is deposited over a surface of a wafer substrate using a process configured to produce substantially less damage in the wafer substrate than a first plasma-assisted deposition process. The protective layer is less than about 100 Angstroms thick. A barrier layer is deposited over the protective layer using the first plasma-assisted deposition process.

Abstract: Multi-cycle methods result in dense, seamless and void-free dielectric gap fill are provided. The methods involve forming liquid or flowable films that partially fill a gap, followed by a solidification and/or anneal process that uniformly densifies the just-formed film. The thickness of the layer formed is such that the subsequent anneal process creates a film that does not have a density gradient. The process is then repeated as necessary to wholly or partially fill or line the gap as desired. The methods of this invention may be used to line or fill high aspect ratio gaps, including gaps having aspect ratios greater than about 6:1 with widths less than about 0.13 ?m.

Abstract: A method for etching chromium and forming a photomask is provided. In one embodiment, a method for etching chromium includes providing a film stack in a processing chamber having a chromium layer, patterning a photoresist layer on the film stack, depositing a conformal protective layer on the patterned photoresist layer, etching the conformal protective layer to expose a chromium layer through the patterned photoresist layer, and etching the chromium layer. The methods for etching chromium of the present invention are particularly suitable for fabricating photomasks.

Abstract: A deposition method modulates the reaction rate and thickness of highly conformal dielectric films deposited by forming a saturated catalytic layer on the surface and then exposing the surface to silicon-containing precursor gas and a reaction modulator, which may accelerate or quench the reaction. The modulator may be added before, after, or during exposure of the silicon-containing precursor gas. The film thickness after one cycle of deposition may be increased up to 20 times or decreased up to 20 times.

Abstract: A method and apparatus for process integration in manufacture of a ask are disclosed. In one embodiment, a cluster tool suitable for process integration in manufacture of a photomask including a vacuum transfer chamber having coupled thereto at least one hard mask deposition chamber and at least one plasma chamber configured for etching chromium. In another embodiment, a method for process integration in manufacture of a photomask includes depositing a hard mask on a substrate in a first processing chamber, depositing a resist layer on the substrate, patterning the resist layer, etching the hard mask through apertures formed in the patterned resist layer in a second chamber; and etching a chromium layer through apertures formed in the hard mask in a third chamber.

Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas. The oxidized organo silane film has excellent barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organo silane film can also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organo silane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organo silane film is produced by reaction of methyl silane, CH3SiH3, and N2O.

Abstract: Methods of lining and/or filling gaps on a substrate by creating flowable silicon oxide-containing films are provided. The methods involve introducing vapor-phase silicon-containing precursor and oxidant reactants into a reaction chamber containing the substrate under conditions such that a condensed flowable film is formed on the substrate. The flowable film at least partially fills gaps on the substrates and is then converted into a silicon oxide film. In certain embodiments, the methods involve using a catalyst, e.g., a nucleophile or onium catalyst, in the formation of the film. The catalyst may be incorporated into one of the reactants and/or introduced as a separate reactant. Also provided are methods of converting the flowable film to a solid dielectric film. The methods of this invention may be used to line or fill high aspect ratio gaps, including gaps having aspect ratios ranging from 3:1 to 10:1.

Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas comprising carbon at a constant RF power level. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.

Abstract: Conformal nanolaminate dielectric deposition and etch back processes that can fill high aspect ratio (typically at least 5:1, for example 6:1), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps with significantly reduced incidence of voids or weak spots involve the use of any suitable confirmal dielectric deposition technique and a dry etch back. The etch back part of the process involves a single step or an integrated multi-step (for example, two-step) procedure including an anisotropic dry etch followed by an isotropic dry etch. The all dry deposition and etch back process in a single tool increases throughput and reduces handling of wafers resulting in more efficient and higher quality nanolaminate dielectric gap fill operations.

Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas. The oxidized organo silane film has excellent barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organo silane film can also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organo silane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organo silane film is produced by reaction of methyl silane, CH3SiH3, and N2O.

Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas. The oxidized organo silane film has excellent barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organo silane film can also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organo silane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organo silane film is produced by reaction of methyl silane, CH3SiH3, and N2O.

Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas. The oxidized organo silane film has excellent barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organo silane film can also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organo silane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organo silane film is produced by reaction of methyl silane, CH3SiH3, and N2O.

Abstract: A method for removal of metallic residue from a substrate after a plasma etch process in a semiconductor substrate processing system by cleaning the substrate in a hydrogen fluoride solution.

Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.