Abstract: A method and apparatus for manufacturing an integrated circuit (IC), the method including, generating, by a graphical construction unit, a first graph corresponding to a first net of the IC, the first graph representing a pin of the first net as a vertex, and a connection between two pins of the first net as an edge, the first graph further corresponding to a first IC layout; identifying a first and a second pair of unconnected vertices in the first graph for inserting a first and a second redundant edge, respectively, the first redundant edge and the second redundant edge forming a first connected loop and a second connected loop, respectively, each loop further including at least two edges of the first graph; calculating a tolerance ratio for the first redundant edge and the second redundant edge; sorting the first and second redundant edge based on their tolerance ratio; calculating a yield rate change of the first IC layout associated with inserting one of the first or second redundant edge with a highest

Abstract: A toy figure display stand displays a toy figure behind a transparent fluid-retaining wall, thus simulating immersion of the toy figure within the transparent fluid. The simulated immersion provides an additional level of engagement between the toy figure and a child or collector. The wall may include an interior transparent shell portion and an exterior transparent shell portion. The interior transparent shell portion and the exterior transparent shell portion may together define a cavity. A fluid may be received within the cavity.

Abstract: An assembly including a drive motor and a gear plate. The gear plate includes a seat for retaining the drive motor. The assembly also includes a motor cap having at least one pawl for snap-fitting into the seat. The assembly further includes at least one post, which is adapted to receive a gear.

Abstract: Described herein is a method of processing a cardiovascular physiological signal, comprising: decomposing the cardiovascular physiological signal into a first plurality of wavelet coefficients using a wavelet transform; selecting a second plurality of wavelet coefficients from the first plurality of wavelet coefficients, the second plurality being a subset of the first plurality; classifying or clustering the cardiovascular physiological signal into one of a plurality of predetermined classes based on the second plurality of wavelet coefficients using an artificial neural network.

Abstract: A commutator has a plurality of commutator segments fixed to an insulating support member. The commutator segments are formed by cold or hot forming a copper billet cut from a length of copper wire. Each billet has a volume approximately equal to the volume of one commutator segment. Each commutator segment has a main body and an anchor integrally formed with the main body. The commutator segments are spaced about a circle and then an insulating support member is molded to the commutator segments to fix the commutator segments to the support member.

Abstract: Methods and apparatus, including computer program products, implementing and using techniques for providing a dynamic access control list for an object in a computer- implemented content management system. A list of one or more subjects is received. Each of the subjects is associated with a set of operations that the subject has permission to perform on the object in accordance with a first rule-set. A set of dynamic evolution conditions is defined. The dynamic evolution conditions specify under what circumstances to evolve the access control list to a new state in which a second rule-set describes a different set of operations to be associated with one or more of the subjects. The dynamic evolution conditions, the subjects, and the operations are stored in a dynamic access control list on a server in the content management system. A content management system is also described.

Abstract: A method for designing and making an integrated circuit is described. That method utilizes statistical models of wire segments to accurately estimate the expected length of minimum-length, orthogonal wire segments within a block. From these estimates, the method accurately estimates an ratio between the horizontal and vertical routing resources required, termed the “H/V Demand Ratio.” From the H/V Demand Ratio, an accurate estimate of the height and width of the block may be determined. Thereafter, placement and routing may be performed quickly and accurately, thereby allowing the block to be designed and manufactured quickly and cost effectively. A method for designing an integrated circuit with efficient metal-1 resource utilization is also described.

Abstract: An item migration system generates a workflow process comprising logical nodes and physical nodes. Candidate physical nodes are associated with the logical nodes. An item generated at an initial logical node within the workflow process is inserted into the workflow and logically migrated to a subsequent logical node. The system determines whether the item requires physical migration based on properties of the item, characteristics of the subsequent logical node, characteristics of candidate physical nodes, and weighting factors applied to the properties and characteristics. If the item requires physical migration, the system selects an optimum target physical node from the candidate physical nodes. The present system migrates the item to the physical location corresponding to the selected physical node. Otherwise, the present system performs logical migration to the logical node without physical migration.

Abstract: A method and apparatus for manufacturing an integrated circuit (IC), the method including, generating, by a graphical construction unit, a first graph corresponding to a first net of the IC, the first graph representing a pin of the first net as a vertex, and a connection between two pins of the first net as an edge, the first graph further corresponding to a first IC layout; identifying a first and a second pair of unconnected vertices in the first graph for inserting a first and a second redundant edge, respectively, the first redundant edge and the second redundant edge forming a first connected loop and a second connected loop, respectively, each loop further including at least two edges of the first graph; calculating a tolerance ratio for the first redundant edge and the second redundant edge; sorting the first and second redundant edge based on their tolerance ratio; calculating a yield rate change of the first IC layout associated with inserting one of the first or second redundant edge with a highest

Abstract: A method for reducing power consumption for an integrated circuit comprises the steps of (1) providing (i) a clock tree wherein the clock tree comprises a clock source, a plurality of clock sinks, and a plurality of internal nodes, (ii) the physical locations of the clock source, the clock sinks, and physical location of a gating-signal control logic circuit, (iii) the activity information of the sinks; (2) recursively determining a merging segment set containing merging segments for each internal node and computing switched capacitance of a subtree rooted at each internal node in a bottom up manner, wherein the merging segments have the same signal delay for the clock sinks in a subtree rooted at each internal node; and (3) recursively determining a location for each internal node selected from the merging segment set in a top down manner on a basis that the switched capacitance of a subtree rooted at each internal node is minimum.

Abstract: Methods for generating a dynamically sortable report from data independent of the original representative format of the data generally include accessing a plurality of files, parsing the accessed files, forming a vector utilizing the parsed files, generating a report from the formed vector, and dynamically sorting the report utilizing the formed vector and a sorting element associated with the report. Such methods reduce consumption of computing resources as a single static report may be generated, and later sorted or otherwise modified, without creating another static report or otherwise accessing the source of the report, such as a data repository.

Abstract: A method for reducing power consumption for an integrated circuit comprises the steps of (1) providing (i) a clock tree wherein the clock tree comprises a clock source, a plurality of clock sinks, and a plurality of internal nodes, (ii) the physical locations of the clock source, the clock sinks, and physical location of a gating-signal control logic circuit, (iii) the activity information of the sinks; (2) recursively determining a merging segment set containing merging segments for each internal node and computing switched capacitance of a subtree rooted at each internal node in a bottom up manner, wherein the merging segments have the same signal delay for the clock sinks in a subtree rooted at each internal node; and (3) recursively determining a location for each internal node selected from the merging segment set in a top down manner on a basis that the switched capacitance of a subtree rooted at each internal node is minimum.

Abstract: A migration object selection method selects data objects for migration from a source storage device to a target storage device. At a scheduled migration date, the method computes a benefit of migration for a selected data object based on adjustable weighted migration properties. If the benefit exceeds a predetermined threshold, the selected data object is migrated. Otherwise, the selected data object is not migrated. The weighted migration properties comprise last reference date, data object size, version, format, access speed of the source storage device, access speed of the target storage device, speed of a network, and location of the source storage device. The weighted migration properties are weighted with an adjustable weighting factor that indicates a relative importance of each of the weighted migration properties.

Abstract: Methods and apparatus, including computer program products, implementing and using techniques for providing an access control list for an object in a computer system. A list of one or more subjects is defined. Each of the subjects is associated with a set of operations that the subject can perform on the object. A set of rules is defined that specify conditions at which a different set of operations is to be associated with one or more of the subjects in the list of subjects. An access control list is also described.

Abstract: An item migration system generates a workflow process comprising logical nodes and physical nodes. Candidate physical nodes are associated with the logical nodes. An item generated at an initial logical node within the workflow process is inserted into the workflow and logically migrated to a subsequent logical node. The system determines whether the item requires physical migration based on properties of the item, characteristics of the subsequent logical node, characteristics of candidate physical nodes, and weighting factors applied to the properties and characteristics. If the item requires physical migration, the system selects an optimum target physical node from the candidate physical nodes. The present system migrates the item to the physical location corresponding to the selected physical node. Otherwise, the present system performs logical migration to the logical node without physical migration.

Abstract: A method and program product for storing large objects (LOBs) in a database is disclosed in one embodiment of the invention as including creating a column in a database. The column is created by assigning a data type to the column suitable for storing LOBs, assigning a maximum length for each LOB in the column, and assigning a length of an initial portion of each LOB. Once the column is created, one or more LOBs may be stored in the column. These LOBs are stored by storing the initial portions of each LOB substantially contiguously on certain pages of the database, while storing the remaining portions of each LOB on separate pages of the database. A pointer is provided with each initial portion. The pointer stores the location of the remaining portion of each LOB.