Abstract: A pixel load instruction for a programmable graphics processor. The pixel load instruction may be used during processing of graphics data to load graphics data from a writable output buffer into a local storage element. Using the pixel load instruction may ensure that the graphics data loaded is current, i.e., any pending writes to the location storing the graphics data are completed prior to loading the graphics data. Furthermore, the pixel load instruction may be enabled and disabled for one or more writable output buffers by setting or clearing bits in a pixel load enable register.

Abstract: Systems and methods compress and decompress 16 bit data. The 16 bit data may be signed or unsigned and represented in a fixed point or floating point format. A fixed block size of data is compressed into a fixed length format. Data compressed using a medium quality compression scheme may be efficiently decompressed in hardware. Data may be efficiently compressed and decompressed in hardware using a high quality compression scheme. The high quality compression scheme has a lower compression ratio compared with the medium quality compression scheme, but is near lossless in terms of quality.

Abstract: A system and method for providing explicit weights for texture filtering permits filter weights to vary for each pixel within a primitive. A different filter kernel may be used for each pixel. The weights may be computed or read from a texture map. Because the weights are explicit, the fractional portions of the texture map coordinates that are typically used to determine a bilinearly filtered texel are not used.

Abstract: Shortening a footprint is a technique to reduce the number of texture samples anisotropically filtered to determine a texture value associated with a graphics fragment. Reducing the number of texture samples anisotropically filtered reduces the number of texture samples read and simplifies the filter computation. Programmable knobs are used to shorten the footprint of a pixel in texture space thereby reducing the number of texture samples used during anisotropic filtering. These knobs permit a user to determine a balance between improved texture map performance and anisotropic texture filtering quality.

Abstract: A computer system including a processor, a display, and a graphics unit coupled between the processor and the display, in which the processor is configured to perform multi-display operations which generate multiple frames of display data for simultaneous display, and a graphics unit for use in such a system. Typically, the graphics unit includes graphics memory that includes at least two frame buffers, and the processor operates as if it were independently asserting multiple streams of display data to multiple frame buffers for driving multiple displays independently. Another aspect of the invention is a system that displays data from a frame buffer on a screen.

Abstract: Floating-point texture filtering units leverage existing fixed-point filter circuits. Groups of floating-point texture values are converted to products of a fixed-point mantissa and a scaling factor that is the same for each texture value in the group. The fixed-point mantissas are filtered using a fixed-point filter circuit, and the filtered mantissa is combined with the scaling factor to determine a floating-point filtered value. Multiple floating-point filter results may be combined in a floating-point accumulator circuit. The same fixed-point filter circuit may also be used to filter fixed-point texture data by providing fixed-point input path that bypasses the format conversion and a fixed-point accumulator.

Abstract: Floating-point texture filtering units leverage existing fixed-point filter circuits. Groups of floating-point texture values are converted to products of a fixed-point mantissa and a scaling factor that is the same for each texture value in the group. The fixed-point mantissas are filtered using a fixed-point filter circuit, and the filtered mantissa is combined with the scaling factor to determine a floating-point filtered value. Multiple floating-point filter results may be combined in a floating-point accumulator circuit. The same fixed-point filter circuit may also be used to filter fixed-point texture data by providing fixed-point input path that bypasses the format conversion and a fixed-point accumulator.

Abstract: Anisotropic optimization is a technique to reduce the number of texture samples anisotropically filtered to determine a texture value associated with a graphics fragment. Reducing the number of texture samples anisotropically filtered reduces the number of texture samples read from memory and speeds up the filter computation. A programmable bias is used to control the number of texture samples used during anisotropic filtering, permitting a user to determine a balance between improved texture map performance and anisotropic texture filtering quality.

Abstract: An apparatus and method for using non-power of two texture maps is described. Texture map coordinates for a non-power of two dimension texture map such as u and v are computed without requiring a division operation. In addition to accessing non-power of two texture maps, the texture map coordinates may be used to access filtered versions of the non-power of two texture map, where the dimensions of each filtered version is arbitrary.

Abstract: A system, method and computer program product are provided for programmable pixel processing in a computer graphics pipeline. In one embodiment of the present invention, arbitrary texture filtering is applied via a programmable shader.

Abstract: An apparatus and method for using non-power of two texture maps is described. Normalized texture map coordinates such as s and t are converted from a floating point format to a fixed point format and wrapping operations are performed to produce unnormalized texture map coordinates such as u and v corresponding to non-power of two texture maps.

Abstract: Shortening a footprint is a technique to reduce the number of texture samples anisotropically filtered to determine a texture value associated with a graphics fragment. Reducing the number of texture samples anisotropically filtered reduces the number of texture samples read and simplifies the filter computation. Programmable knobs are used to shorten the footprint of a pixel in texture space thereby reducing the number of texture samples used during anisotropic filtering. These knobs permit a user to determine a balance between improved texture map performance and anisotropic texture filtering quality.

Abstract: Trilinear optimization is a technique to reduce the number of texture samples used to determine a texture value associated with a graphics fragment. Bilinear interpolations replace some trilinear interpolations, thereby reducing the number of texture samples read and simplifying the filter computation. A programmable trilinear slope is used to control replacement of a trilinear computation with a bilinear computation, permitting a user to determine a balance between improved texture map performance and texture filtering quality.

Abstract: The current invention involves new systems and methods for reorganizing a texture sampling order that is used to read texels from a texel cache. When anisotropic filtering is used to process the texels read from the texel cache, the texels are read in an order based on a major axis alignment. Reorganizing texture sampling order to use the order based on the major axis alignment results in improved texel cache locality, thereby improving texel cache performance.

Abstract: An apparatus and method for using non-power of two texture maps is described. Normalized texture map coordinates such as s and t are converted from a floating point format to a fixed point format and wrapping operations are performed to produce unnormalized texture map coordinates such as u and v corresponding to non-power of two texture maps.

Abstract: A system, method and computer program product are provided for programmable pixel processing in a computer graphics pipeline. In one embodiment of the present invention, a computed arbitrary quantity is applied as texture address.

Abstract: A system, method and article of manufacture are provided for shadow mapping while rendering a primitive in a graphics pipeline. Initially, an offset operation is performed in order to generate a depth value while rendering a primitive. Further, a value of a slope associated with an edge of the primitive is identified. Thereafter, the depth value is conditionally clamped based on the value of the slope.

Abstract: A method and system for implementing programmable texture lookups from texture coordinate sets. The method includes the step of generating a plurality of texture coordinates using a shader module. The shader module executes floating point calculations on received pixel data to generate the texture coordinates. A plurality of texture values are fetched using the texture coordinates. The fetching is performed by a texture unit coupled to receive the texture coordinates from the shader module. The fetching of the texture values is programmable with respect to the texture coordinates such that the number of texture coordinates are decoupled from the number of textures.

Abstract: An apparatus and method for using non-power of two texture maps with anisotropic filtering is described. An anisotropic perturbation is applied to a texture map coordinate to produce a perturbed texture coordinate. A wrapped texture map index for various wrap modes is computed using the perturbed texture coordinate and an LOD width. In addition to the anisotropic perturbation, the perturbed texture coordinate may also include a tap perturbation.

Abstract: A pixel load instruction for a programmable graphics processor. The pixel load instruction may be used during processing of graphics data to load graphics data from a writable output buffer into a local storage element. Using the pixel load instruction may ensure that the graphics data loaded is current, i.e., any pending writes to the location storing the graphics data are completed prior to loading the graphics data. Furthermore, the pixel load instruction may be enabled and disabled for one or more writable output buffers by setting or clearing bits in a pixel load enable register.