Patents by Inventor Walter E. Donovan

Walter E. Donovan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7053904
    Abstract: Apparatuses and methods for detecting position conflicts during fragment processing are described. Prior to executing a program on a fragment, a conflict detection unit, within a fragment processor checks if there is a position conflict indicating a RAW (read after write) hazard may exist. A RAW hazard exists when there is a pending write to a destination location that source data will be read from during execution of the program. When the fragment enters a processing pipeline, each destination location that may be written during the processing of the fragment is entered in conflict detection unit. During processing, the conflict detection unit is updated when a pending write to a destination location is completed.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: May 30, 2006
    Assignee: NVIDIA Corporation
    Inventors: David B. Kirk, Matthew N. Papakipos, Rui M. Bastos, John Erik Lindholm, Steven E. Molnar, John S. Montrym, Walter E. Donovan
  • Patent number: 6995767
    Abstract: Trilinear optimization is a technique to reduce the number of texture samples used to determine a texture value associated with a graphics fragment. Bilinear interpolations replace some trilinear interpolations, thereby reducing the number of texture samples read and simplifying the filter computation. A programmable trilinear slope is used to control replacement of a trilinear computation with a bilinear computation, permitting a user to determine a balance between improved texture map performance and texture filtering quality.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: February 7, 2006
    Assignee: NVIDIA Corporation
    Inventors: Walter E. Donovan, Paul S. Heckbert
  • Patent number: 6987517
    Abstract: A programmable graphics processor including an execution pipeline and a texture unit is described. The execution pipeline processes graphics data as specified by a fragment program. The fragment program may include one or more opcodes. The texture unit includes one or more sub-units which execute the opcodes to perform specific operations such as an LOD computation, generation of sample locations used to read texture map data, and address computation based on the sample locations.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: January 17, 2006
    Assignee: NVIDIA Corporation
    Inventors: Walter E. Donovan, John Erik Lindholm
  • Patent number: 6985151
    Abstract: Circuits, apparatus, and methods that enable a shader to read and write data from and to a memory location during a single pass through a graphics pipeline. Some embodiments of the present invention provide an increase in the number of buffers available to a shader. These buffers may be read/write (input/output) or read only (input) buffers. Another provides pixel store and pixel load commands that may be used as instructions in a shader program or program portion, and may appear at positions other than the end of the shader program or program portion. Other embodiments provide a data path between a shader and a graphics memory, typically through a frame buffer interface. This data path simplifies the timing of the above store (write) and load (read) commands. Various embodiments may incorporate one or more of these features.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: January 10, 2006
    Assignee: NVIDIA Corporation
    Inventors: Rui M. Bastos, Walter E. Donovan
  • Patent number: 6975319
    Abstract: A system, method and article of manufacture are provided for calculating a level of detail (LOD) value for use during computer graphics processing. First, a plurality of geometrically arranged coordinates is identified. A distance value is computed based on the geometrically arranged coordinates. A LOD value is then calculated using the distance value for use during computer graphics processing. In one embodiment, a derivative value is estimated based on the geometrically arranged coordinates, and the distance value is computed based on the derivative value.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: December 13, 2005
    Assignee: NVIDIA Corporation
    Inventors: Walter E. Donovan, John Montrym
  • Patent number: 6954204
    Abstract: A programmable graphics system and method for processing high precision graphics data represented in one or more data formats in one or more passes. Graphics program instructions executed by the system control the processing and format conversion of the data. The program instructions and the data are stored in a memory accessible by the system. Within the memory, contiguous memory entries can contain program instructions or data represented in different formats. The format used to represent a particular data element within the data, is specified in the state information maintained in the system and is used to configure format conversion units within the system. High precision data, such as floating color, is processed by the programmable graphics system and output via a digital to analog converter (DAC) for display.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: October 11, 2005
    Assignee: NVIDIA Corporation
    Inventors: Harold Robert Feldman Zatz, Walter E. Donovan, John Erik Lindholm, Steven E. Molnar, John S. Montrym
  • Publication number: 20040189651
    Abstract: A programmable graphics system and method for processing high precision graphics data represented in one or more data formats in one or more passes. Graphics program instructions executed by the system control the processing and format conversion of the data. The program instructions and the data are stored in a memory accessible by the system. Within the memory, contiguous memory entries can contain program instructions or data represented in different formats. The format used to represent a particular data element within the data, is specified in the state information maintained in the system and is used to configure format conversion units within the system. High precision data, such as floating color, is processed by the programmable graphics system and output via a digital to analog converter (DAC) for display.
    Type: Application
    Filed: November 22, 2002
    Publication date: September 30, 2004
    Inventors: Harold R. F. Zatz, Walter E. Donovan, John Erik Lindholm, Steven E. Molnar, John S. Montrym
  • Patent number: 6768493
    Abstract: A system, method and article of manufacture are provided for efficient storage of texture data in memory for use with a computer graphics pipeline. Provided is a data structure including at least one compressed sub-block representing a group of texels in a predetermined image plane and at predetermined locations in a first and a second dimension in a texture map. A number of the sub-blocks is based on a depth of texture data in the texture map.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: July 27, 2004
    Assignee: nVIDIA Corporation
    Inventor: Walter E. Donovan
  • Patent number: 6690372
    Abstract: A system, method and article of manufacture are provided for shadow mapping while rendering a primitive in a graphics pipeline. Initially, an offset operation is performed in order to generate a depth value while rendering a primitive. Further, a value of a slope associated with an edge of the primitive is identified. Thereafter, the depth value is conditionally clamped based on the value of the slope.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: February 10, 2004
    Assignee: NVIDIA Corporation
    Inventors: Walter E. Donovan, Liang Peng
  • Patent number: 6593923
    Abstract: A system, method and article of manufacture are provided for shadow mapping while rendering a primitive in a graphics pipeline. Initially, an offset operation is performed in order to generate a depth value while rendering a primitive. Further, a value of a slope associated with an edge of the primitive is identified. Thereafter, the depth value is conditionally clamped based on the value of the slope.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: July 15, 2003
    Assignee: Nvidia Corporation
    Inventors: Walter E. Donovan, Liang Peng
  • Publication number: 20020018063
    Abstract: A system, method and article of manufacture are provided for shadow mapping while rendering a primitive in a graphics pipeline. Initially, an offset operation is performed in order to generate a depth value while rendering a primitive. Further, a value of a slope associated with an edge of the primitive is identified. Thereafter, the depth value is conditionally clamped based on the value of the slope.
    Type: Application
    Filed: December 5, 2000
    Publication date: February 14, 2002
    Inventors: Walter E. Donovan, Liang Peng
  • Patent number: 6005580
    Abstract: A method and apparatus for performing post-process antialiasing of polygon edges. According to one aspect of the invention, a method is provided for modifying the color of a pixel in a texture mapped representation of an image generated from a plurality of polygons. According to this method, it is determined that an edge of one of the plurality of polygons intersects a scan line in the texture mapped representation at an intersection point. In addition, the pixel within which this intersection point lies is determined. The color for this pixel is identified by pixel data stored as part of the texture mapped representation.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: December 21, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Walter E. Donovan
  • Patent number: 5990903
    Abstract: A method and apparatus for chroma keying filtered textures are provided. Chroma keying is performed which replaces the input texel color with a new color if the input texel color matches the chroma color. The chroma key circuitry keeps the input texel color and sets the alpha component to 1 if the input texel color does not match the chroma color. The chroma keyed texels are filtered using bilinear filtering. The color components of the filtered texels are fogged using a fog factor, a fog color, and the alpha component of the filtered texel. The fogged and filtered signal is blended with a background color to produce an output color for the texels.
    Type: Grant
    Filed: February 3, 1997
    Date of Patent: November 23, 1999
    Assignee: Micron Technologies, Inc.
    Inventor: Walter E. Donovan
  • Patent number: 5767856
    Abstract: A pixel engine pipeline (including a "front-end" and a "back-end") communicates pixel information between a graphics processor, a pixel engine, a data cache, and system memory. The "front-end" (for reading requested data) includes a command queue for receiving graphics instructions from a graphics processor. Read requests in the command queue are stored in a read request queue. Extraction instructions corresponding to at least a portion of the read request are stored in an attribute queue. Control logic determines whether the requested data is located in a data cache. The read request is stored in a load request queue and the requested data is retrieved from system memory into a load data queue, if the requested data is not in the data cache. The control logic stores the requested data into a read data queue. The requested data is provided to a stage of the pixel engine from the read data queue in accordance with the extraction instructions.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: June 16, 1998
    Assignee: Rendition, Inc.
    Inventors: James R. Peterson, Glenn C. Poole, Walter E. Donovan, Paul A. Shupak
  • Patent number: 5638500
    Abstract: An apparatus and method calculate outcodes directly from an integral representation of a floating point number defining a certain coordinate of a point of an object to be displayed. Such calculations under software control are absent any Boolean conventional branch instructions which impede system performance and utilize an integer unit rather than a floating point unit so as to enable transformations of viewing parameters and calculations of outcodes to be performed in a concurrent manner.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: June 10, 1997
    Assignee: Sun Microsystems, Inc.
    Inventors: Walter E. Donovan, Timothy J. Van Hook
  • Patent number: 5594846
    Abstract: A computer graphics system includes a texel value generator capably of generating texel values using a minimal amount of computationally intensive divisions while maintaining a selectable texel accuracy criteria along a scan line. This is accomplished by adaptively selecting divisional points which delineate the scan line segments along each scan line such that the divisional points are as widely spaced as possible without exceeding the selected texel accuracy criteria. Having selected the texel accuracy criteria, such as a texel error bound optimally spaced, divisional points along the scan lines are selected as a function of the selected accuracy criteria. In general, since texture gradients are not evenly distributed over the surface of a given object and texture variations are present between different objects of the image, it is advantageous to adaptively select division points one at a time, skipping as many pixels in between divisional points as the local texture gradient will allow.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: January 14, 1997
    Assignee: Sun Microsystems, Inc.
    Inventor: Walter E. Donovan