Abstract: A door structure with glass at least comprising a front panel, a rear panel, an inner hollowed-frame assembly, a glass mounted assembly and at least one glass, wherein the front panel and the rear panel are configured with a plurality of positioning protrusions at inner sides for assembling the inner hollowed-frame assembly inside the door structure with glass without using screws; the structure may render the inner hollowed-frame assembly able to support and assemble the glass mounted assembly and the glass with rigidity.

Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.

Abstract: A high-speed germanium on silicon (Ge/Si) avalanche photodiode may include a substrate layer, a bottom contact layer disposed on the substrate layer, a buffer layer disposed on the bottom contact layer, an electric field control layer disposed on the buffer layer, an avalanche layer disposed on the electric field control layer, a charge layer disposed on the avalanche layer, an absorption layer disposed on the charge layer, and a top contact layer disposed on the absorption layer. The electric field contact layer may be configured to control an electric field in the avalanche layer.

Abstract: Systems and methods optimize hardware description generated from a graphical model automatically. The system may include an optimizer. The optimizer may add a serializer component and a deserializer component to the model. The serializer component may receive parallel data and may produce serial data. The serializer may introduce one or more idle cycles into the serial data being produced. The deserializer component may receive serial data and may produce parallel data. The serializer and deserializer components may receive and generate control signals. The control signals may include a valid signal for indicating valid data elements of the serial and parallel data, and a start the start signal for indicating the beginning of a new frame or cycle when constructing parallel data from serial data.

Abstract: Various embodiments of a germanium-on-silicon (Ge—Si) avalanche photodiode are provided. In one aspect, the Ge—Si avalanche photodiode utilizes a silicon carrier-energy-relaxation layer to reduce the energy of holes drifting into absorption layer where the absorption material has lower ionization threshold, thereby suppressing multiplication noise and increasing the gain-bandwidth product of the avalanche photodiode.

Abstract: Various embodiments of a photonic device and fabrication method thereof are described herein. A device may include a substrate, a bottom contact layer, a current confinement layer, an intrinsic layer, an absorption layer, and a top contact layer. The bottom contact layer may be of a first polarity and may be disposed on the substrate. The current confinement layer may be disposed on the bottom contact layer. The intrinsic layer may be disposed on the current confinement layer. The absorption layer may be disposed on the intrinsic layer. The top contact layer may be of a second polarity and may be disposed on the absorption layer. The second polarity is opposite to the first polarity.

Abstract: A high-speed germanium on silicon (Ge/Si) avalanche photodiode may include a substrate layer, a bottom contact layer disposed on the substrate layer, a buffer layer disposed on the bottom contact layer, an electric field control layer disposed on the buffer layer, an avalanche layer disposed on the electric field control layer, a charge layer disposed on the avalanche layer, an absorption layer disposed on the charge layer, and a top contact layer disposed on the absorption layer. The electric field contact layer may be configured to control an electric field in the avalanche layer.

Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.

Abstract: A system and method evaluates power information for a high-level model to be implemented in target hardware, and performs one or more power-reducing transmutations on the model. Transmutations may include moving one or more components from a fast rate region to a slow rate region, reducing bit width of data, signals, or other values, and replacing multiple instances of a resource with a shared instance of the resource. An in-memory representation of the model may be generated that reduces the model to a plurality of core components. A power score evaluation engine may assign power scores to the core components. Power scores may be retrieved from one or more power score database. The power scores may be non-dimensional scores representing power consumption relationships among the core components, and be target independent. Hints or alerts regarding suggested changes to the model to optimize power consumption may be presented to a user. A revised model incorporating the suggested changes may be constructed.

Abstract: A loan origination and processing system is described. The system can reside on a server computer that is coupled to a data store storing data related to a borrower. The server computer is further coupled to a brokerage network that comprises a loan officer client, a loan processor client, and a broker manager client. Each brokerage client computer executes a unique interface to the loan origination and processing system.

Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.

Abstract: A device, such as a silicon modulator, in accordance with the present disclosure employs PN diodes without sacrificing the modulation depth, while achieving lower loss and better impedance matching to 50-Ohm drivers. In one embodiment, the device includes an input waveguide, an input optical splitter coupled to the input waveguide, first and second optical phase shifters coupled to the input optical splitter, an output optical splitter coupled to the first and second phase shifters, and an output waveguide coupled to the output optical splitter. The phase shifters are designed with variant capacitance per unit length.

Abstract: Various embodiments of a germanium-on-silicon (Ge—Si) photodiode are provided along with the fabrication method thereof. In one aspect, a Ge—Si photodiode includes a doped bottom region at the bottom of a germanium layer, formed by thermal diffusion of donors implanted into a silicon layer. The Ge—Si photodiode further includes a doped sidewall region of Ge mesa formed by ion implantation. Thus, the electric field is distributed in the intrinsic region of the Ge—Si photodiode where there is low dislocation density. The doped bottom region and sidewall region of the Ge layer prevent electric field from penetrating into the Ge—Si interface and Ge mesa sidewall region, where a large amount of dislocations are distributed. This design significantly suppresses dark current.

Abstract: A device is configured to receive optimization information associated with a model, determine an amount of delay to be inserted into the model, and determine a sampling factor by which a first data rate associated with a signal is to be modified into a second data rate. The device is configured to determine a region of interest, insert an upsampling block that upsamples the signal entering the region of interest based on the sampling factor, and insert a downsampling block, associated with a unit of delay, which downsamples the signal exiting the region of interest based on the sampling factor. The device is configured to convert the unit of delay into a fast delay block, corresponding to the amount of delay, and insert the fast delay block in the region of interest. The device is configured to generate code associated with the model, and provide the code.

Abstract: A door structure with glass at least comprising a front panel, a rear panel, an inner hollowed-frame assembly, a glass mounted assembly and at least one glass, wherein the front panel and the rear panel are configured with a plurality of positioning protrusions at inner sides for assembling the inner hollowed-frame assembly inside the door structure with glass without using screws; the structure may render the inner hollowed-frame assembly able to support and assemble the glass mounted assembly and the glass with rigidity.

Abstract: Some embodiments of the present disclosure provide an integrated circuit (IC) design method. The method includes (1) receiving a first layout comprising stripe patterns with a first separation and a first width; (2) receiving a second layout comprising stripe patterns with a second width narrower than the first separation, each stripe on the second layout is configured to situate between two adjacent stripes on the first layout when overlaying the first layout and the second layout; (3) performing a separation check by identifying a spacing between a stripe on the second layout and one of the two adjacent stripes on the first layout; and (4) adjusting the spacing between the stripe on the second layout and one of the two adjacent stripes on the first layout when the separation check determining the spacing is greater than a predetermined value.

Abstract: Some embodiments of the present disclosure provide an integrated circuit (IC) design method. The method includes (1) receiving a first layout comprising stripe patterns with a first separation and a first width; (2) receiving a second layout comprising stripe patterns with a second width narrower than the first separation, each stripe on the second layout is configured to situate between two adjacent stripes on the first layout when overlaying the first layout and the second layout; (3) performing a separation check by identifying a spacing between a stripe on the second layout and one of the two adjacent stripes on the first layout; and (4) adjusting the spacing between the stripe on the second layout and one of the two adjacent stripes on the first layout when the separation check determining the spacing is greater than a predetermined value.

Abstract: The present invention related to an electrochemical biosensing meter, a system and a measuring method for analyte measurement incorporating filled sample detection. The method comprises detecting a third electrical signal obtained from a second electrode pair on a test strip and detecting a second electrical signal obtained from a first electrode pair on the test strip. The second electrode pair is close to a sample entrance of a sample chamber and the first electrode pair is far away from the sample entrance of the sample chamber. The third electrical signal is used for detecting the state of the sample chamber when sufficiently filled. Compare the second electrical signal and the third electrical signal to determine the distribution state of the sample in the sample chamber. Therefore, it increases the credibility for the entire sample chamber sufficiently filled with the sample.

Abstract: A loan origination and processing system is described. The system can reside on a server computer that is coupled to a data store storing data related to a borrower. The server computer is further coupled to a brokerage network that comprises a loan officer client, a loan processor client, and a broker manager client. Each brokerage client computer executes a unique interface to the loan origination and processing system.

Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.