Patents by Inventor Warren Jackson

Warren Jackson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190291490
    Abstract: The present teachings include a process, system and article for forming a printed image on a textile. The process includes coating the solution of an orthosilicate to form a silica network on the textile. The process includes applying an ink composition to the textile having the silica network on the textile, forming an image.
    Type: Application
    Filed: March 22, 2018
    Publication date: September 26, 2019
    Inventors: Naveen Chopra, Paul J. McConville, Jennifer L. Belelie, Anthony S. Condello, Robert A. Street, Warren Jackson
  • Publication number: 20190284757
    Abstract: The present teachings include a process, system and article for forming a printed image on a textile. In some embodiments, the process includes coating the textile with a layer of polydiallyldimethyl ammonium chloride cationic polymer and coating the textile with the layer of polydiallyldimethyl ammonium chloride cationic polymer with a layer of poly-4-styrene sulfonate anionic polymer. The process can further include applying an ink composition to the textile having the layer of polydiallyldimethyl ammonium chloride cationic polymer layer and the layer of poly-4-styrene sulfonate anionic polymer, forming an image.
    Type: Application
    Filed: March 15, 2018
    Publication date: September 19, 2019
    Inventors: Naveen Chopra, Paul J. McConville, Jennifer L. Belelie, Anthony S. Condello, Robert A. Street, Warren Jackson
  • Patent number: 10026896
    Abstract: A multilayered memristor includes a semiconducting n-type layer, a semiconducting p-type layer, and a semiconducting intrinsic layer. The semiconducting n-type layer includes one or both of anion vacancies and metal cations. The semiconducting p-type layer includes one or both of metal cation vacancies and anions. The semiconducting intrinsic layer is coupled between the n-type layer and the p-type layer to form an electrical series connection through the n-type layer, the intrinsic layer, and the p-type layer.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: July 17, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Warren Jackson, Jianhua Yang, Kyung Min Kim, Zhiyong Li
  • Patent number: 10026477
    Abstract: In one example, a volatile selector is switched from a low conduction state to a first high conduction state with a first voltage level and then the first voltage level is removed to activate a relaxation time for the volatile selector. The relaxation time is defined as the time the first volatile selector transitions from the high conduction state back to the low conduction state. The volatile selector is switched with a second voltage level of opposite polarity to the first voltage level to significantly reduce the relaxation time of the volatile selector.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: July 17, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jianhua Yang, Ning Ge, John Paul Strachan, Gary Gibson, Warren Jackson
  • Patent number: 9905757
    Abstract: A nonlinear memristor device with a three-layer selector includes a memristor in electrical series with a three-layer selector. The memristor comprises at least one electrically conducting layer and at least one electrically insulating layer. The three-layer selector comprises a three-layer structure selected from the group consisting of XN—XO—XN; XN—YO—ZN; XN—YO—XN; XO—XN—XO; XO—YN—XO; XO—YN—ZO; XO—YO—XO; XO—YO—ZO; XN—YN—ZN; and XN—YN—XN, X represents a compound-forming metal different from Y and Z.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: February 27, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Byungjoon Choi, Jianhua Yang, R. Stanley Williams, Gary Gibson, Warren Jackson
  • Patent number: 9812500
    Abstract: A circuit component that exhibits a region of negative differential resistance includes: a first layer of material; and a second layer of material in contact with the first layer of material, the contact forming a first self-heating interface. The first self-heating interface is structured such that an electrical current flowing from the first layer of material to the second layer of material encounters an electrical impedance occurring at the first interface that is greater than any electrical impedance occurring in the first and second layers of material, wherein heating occurring at the first interface is dominated by Joule heating caused by the electrical impedance occurring at the first interface, and wherein the electrical impedance occurring at the first interface decreases with increasing temperature to induce a region of negative differential resistance.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: November 7, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gary Gibson, Warren Jackson, R. Stanley Williams
  • Publication number: 20170271591
    Abstract: A multilayered memristor includes a semiconducting n-type layer, a semiconducting p-type layer, and a semiconducting intrinsic layer. The semiconducting n-type layer includes one or both of anion vacancies and metal cations. The semiconducting p-type layer includes one or both of metal cation vacancies and anions. The semiconducting intrinsic layer is coupled between the n-type layer and the p-type layer to form an electrical series connection through the n-type layer, the intrinsic layer, and the p-type layer.
    Type: Application
    Filed: February 13, 2015
    Publication date: September 21, 2017
    Inventors: Warren Jackson, Jianhua Yang, Kyung Min Kim, Zhiyong Li
  • Publication number: 20170271009
    Abstract: In one example, a volatile selector is switched from a low conduction state to a first high conduction state with a first voltage level and then the first voltage level is removed to activate a relaxation time for the volatile selector. The relaxation time is defined as the time the first volatile selector transitions from the high conduction state back to the low conduction state. The volatile selector is switched with a second voltage level of opposite polarity to the first voltage level to significantly reduce the relaxation time of the volatile selector.
    Type: Application
    Filed: January 28, 2015
    Publication date: September 21, 2017
    Inventors: Jianhua Yang, Ning Ge, John Paul Strachan, Gary Gibson, Warren Jackson
  • Patent number: 9747976
    Abstract: A charge trapping memristor is disclosed. An example charge trapping memristor includes a first electrode and second electrode configured on opposite sides of a channel to generate an electric potential across the channel, and a charge barrier. The example charge trapping memristor also includes a charge trapping material configured to store and release an electric charge therein, wherein storing and releasing the electric charge changes electrical properties of the channel.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: August 29, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Warren Jackson, Gary Gibson
  • Patent number: 9723023
    Abstract: Systems and methods for protecting a network including providing a mapping between internal addresses as seen by devices of the protected network and external addresses; providing devices with a mapped address for a destination in response to a lookup request; rewriting, at a gateway, destination addresses of packets exiting the protected network based on the mapping; and rewriting, at the destination-network gateway, source addresses of packets entering the protected network based on the mapping. Embodiments include a gateway coupled to a protected network, an external network, and a name server. The name server, in response to a hostname lookup request, configured to provide a network device with the internal address; and the gateway with a mapping including the internal address, the addresses of the device, and the hostname. The gateway configured to rewrite destination addresses of outbound packets, and source addresses of inbound packets, based on the mapping.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 1, 2017
    Assignee: Raytheon BBN Technologies Corp.
    Inventors: Daniel Joseph Ellard, Alden Warren Jackson, Christine Elaine Jones, Josh Forrest Karlin, Victoria Ursula Manfredi, David Patrick Mankins, William Timothy Strayer
  • Patent number: 9716224
    Abstract: A memristor device with a thermally-insulating cladding includes a first electrode, a second electrode, a memristor, and a thermally-insulating cladding. The memristor is coupled in electrical series between the first electrode and the second electrode. The thermally-insulating cladding surrounds at least a portion of the memristor.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: July 25, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gary Gibson, Richard Henze, Warren Jackson, Yoocham Jeon
  • Publication number: 20160351622
    Abstract: A circuit component that exhibits a region of negative differential resistance includes: a first layer of material; and a second layer of material in contact with the first layer of material, the contact forming a first self-heating interface. The first self-heating interface is structured such that an electrical current flowing from the first layer of material to the second layer of material encounters an electrical impedance occurring at the first interface that is greater than any electrical impedance occurring in the first and second layers of material, wherein heating occurring at the first interface is dominated by Joule heating caused by the electrical impedance occurring at the first interface, and wherein the electrical impedance occurring at the first interface decreases with increasing temperature to induce a region of negative differential resistance.
    Type: Application
    Filed: January 31, 2014
    Publication date: December 1, 2016
    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Gary Gibson, Warren Jackson, R. Stanley Williams
  • Publication number: 20160351802
    Abstract: A nonlinear dielectric stack circuit element includes a first layer of material having a first dielectric constant; a second layer of material having a second dielectric constant; and a third layer of material sandwiched between the first layer of material and the second layer of material and having a third dielectric constant. The third dielectric constant has a value less than the first dielectric constant and the second dielectric constant.
    Type: Application
    Filed: January 30, 2014
    Publication date: December 1, 2016
    Inventors: Warren Jackson, Gary Gibson, R. Stanley Williams, Jianhua Yang
  • Publication number: 20160343430
    Abstract: A charge trapping memristor is disclosed. An example charge trapping memristor includes a first electrode and second electrode configured on opposite sides of a channel to generate an electric potential across the channel, and a charge barrier. The example charge trapping memristor also includes a charge trapping material configured to store and release an electric charge therein, wherein storing and releasing the electric charge changes electrical properties of the channel.
    Type: Application
    Filed: January 30, 2014
    Publication date: November 24, 2016
    Applicant: Hewlett Packard Enterprise Development LP
    Inventors: Warren Jackson, Gary Gibson
  • Publication number: 20160343938
    Abstract: A memristor device with a thermally-insulating cladding includes a first electrode, a second electrode, a memristor, and a thermally-insulating cladding. The memristor is coupled in electrical series between the first electrode and the second electrode. The thermally-insulating cladding surrounds at least a portion of the memristor.
    Type: Application
    Filed: March 7, 2014
    Publication date: November 24, 2016
    Inventors: Gary Gibson, Richard Henze, Warren Jackson, Yoocharn Jeon
  • Publication number: 20160254448
    Abstract: A nonlinear memristor device with a three-layer selector includes a memristor in electrical series with a three-layer selector. The memristor comprises at least one electrically conducting layer and at least one electrically insulating layer. The three-layer selector comprises a three-layer structure selected from the group consisting of XN—XO—XN; XN—YO—ZN: XN—YO—XN; XO—XN—XO; XO—YN—XO; XO—YN—ZO; XO—YO—XO; XO—YO—ZO; XN—YN—ZN; and XN—YN—XN, X represents a compound-forming metal different from Y and Z.
    Type: Application
    Filed: November 12, 2013
    Publication date: September 1, 2016
    Inventors: Byungjoon Choi, Jianhua Yang, R. Stanley Williams, Gary Gibson, Warren Jackson
  • Patent number: 9330587
    Abstract: A display system includes a plurality of individual display devices to collectively generate an image on a display surface. At least one camera captures at least one image of the image on the display surface and captures at least one image of an object positioned near the display surface. A controller automatically adjusts a color of an object appearing in the image on the display surface based on the at least one image of an object.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: May 3, 2016
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Warren Jackson, Nelson L Chang, Henry Sang, Jr.
  • Publication number: 20160119615
    Abstract: A technique to generate a three-dimensional (3D) data visualization from multi-dimensional data. A data set may be grouped into multiple groups based on a function. Data members of the groups may be mapped to respective 3D volumes via graphic elements. A value of the function for each data member may be mapped to at least one of the spatial display variables representing depth. A 3D data visualization including the 3D volumes may be generated.
    Type: Application
    Filed: May 31, 2013
    Publication date: April 28, 2016
    Inventors: Nelson L. Chang, Warren Jackson
  • Patent number: 9237027
    Abstract: Systems and methods for protecting a network including preventing data traffic from exiting the network unless a domain name request has been performed by a device attempting to transmit the data traffic. In an embodiment, a device within the protected network attempting to send data outside the protected network requests an address for a destination outside the protected network from a domain name server (DNS). In response, the DNS provides an address of the destination to the device and a gateway. In response to receiving the address, the gateway temporarily allows access to the address. In an embodiment, a DNS is coupled to a protected network and the gateway, the DNS provides an external address to a device in response to a request; and a mapping to the gateway; the gateway, coupled to a protected network and an external network, allows traffic according to the mapping.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 12, 2016
    Assignee: Raytheon BBN Technologies Corp.
    Inventors: Daniel Joseph Ellard, Alden Warren Jackson, Christine Elaine Jones, Josh Forrest Karlin, Victoria Ursula Manfredi, David Patrick Mankins, William Timothy Strayer
  • Patent number: 8877531
    Abstract: An electronic apparatus is provided that includes a number of first components on a first substrate and a number of second components on a second substrate. A lamination material that includes a conducting material is placed between the first components and the second components. Any one first component can couple to a varied subset of second components.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: November 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Lihua Zhao, Hao Luo, Carl P. Taussig, James A. Brug, Richard E. Elder, Warren Jackson, Ping Mei