Patents by Inventor Wataru Saito
Wataru Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200355250Abstract: The ball screw device includes: a screw shaft having an N number (N is an integer equal to or larger than 2) of rolling grooves having the same lead; balls configured to roll in the rolling grooves; and a nut member, which is assembled to the screw shaft through intermediation of the balls, and includes one or a plurality of endless circulation paths configured to circulate the balls around the screw shaft. Each of the endless circulation paths of the nut member includes: an N number of load portions, which are configured to allow the balls to roll thereon while bearing a load, and correspond to the N number of rolling grooves, respectively; and an N number of no-load portions, which each couple adjacent ones of the load portions, and are configured to allow the balls to move between the N number of rolling grooves.Type: ApplicationFiled: December 7, 2018Publication date: November 12, 2020Applicant: THK CO., LTD.Inventors: Tomofumi Ohashi, Bin Zhao, Sho Iwashiro, Yoshihiro Kudo, Wataru Saito, Mika Oki, Takuya Miyazaki
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Publication number: 20200309824Abstract: The present invention provides a current detection circuit, semiconductor device, and a semiconductor system suitable for improving a current sensing accuracy. According to one embodiment, the current detection circuit 12 comprises a sense transistor Tr11 through which a first sense current proportional to the current flowing through the drive transistor MN1 flows, an operational amplifier AMP1 for amplifying the potential difference of the voltage of the external output terminal OUT and the source voltage of the sense transistor Tr11 for outputting the first sense current, a transistor Tr12 provided in series with the sense transistor Tr11 and to which the output voltage of the operational amplifier AMP1 is applied to the gate, and a switch SW3 provided between the external output terminal OUT and the source of the sense transistor Tr11 and turned on when the drive transistor MN1 is turned off.Type: ApplicationFiled: March 16, 2020Publication date: October 1, 2020Inventors: Keisuke KIMURA, Hideyuki TAJIMA, Wataru SAITO
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Patent number: 10302681Abstract: According to one embodiment, a current detection circuit (12) includes: a detection resistor (Rs) provided between a solenoid valve (106) and a solenoid driver (11); an amplification unit (121) configured to amplify a detected voltage of the detection resistor (Rs); an AD converter (122) that is driven by a reference voltage (Vref) generated based on a reference current (Iref) and configured to convert an output voltage from the amplification unit (121) into a digital value and output the digital value as a detected current value (D1); and a correction unit configured to perform a correction on the detected current value (D1).Type: GrantFiled: January 9, 2017Date of Patent: May 28, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Masanori Otsuka, Wataru Saito, Yoshitaka Jingu, Yasuhiko Kokami, Satoshi Kondo, Junya Horishima
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Patent number: 9905689Abstract: A semiconductor device comprising: a first electrode; a first semiconductor region; a second semiconductor region; a third semiconductor region; a fourth semiconductor region; a fifth semiconductor region; an insulating portion that is provided between the second semiconductor region and the fifth semiconductor region and between the third semiconductor region and the fifth semiconductor region; a sixth semiconductor region; a seventh semiconductor region; a gate electrode; a gate insulating layer; a second electrode; and a third electrode that is provided on the third semiconductor region and electrically connected to the third semiconductor region and the gate electrode.Type: GrantFiled: September 9, 2016Date of Patent: February 27, 2018Assignee: Kabushiki Kaisha ToshibaInventor: Wataru Saito
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Publication number: 20170369833Abstract: A bottle includes a body, a cap mounted to a cap neck of the body. The cap has an outer peripheral portion which is provided with a protrusion. Around the cap, there is provided a position indicator indicating whether the cap is at a correctly closed position, based on the positional relationship between the protrusion and the position indicator.Type: ApplicationFiled: June 27, 2017Publication date: December 28, 2017Applicants: DENSO WAVE INCORPORATED, ANIMAL STEM CELLInventors: Koji KAMIYA, Wataru SAITO, Kazuhiro NAGAIKE
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Publication number: 20170368694Abstract: A robot hand is designed to open or close fingers using a linear actuator disposed in a housing. The robot hand has linear motion shafts extending from inside to outside the housing through guide holes formed in a wall of the housing. Each of the fingers includes a base portion and a tip portion. The base portions are secured to the linear motion shafts outside the housing. The tip portions are bent inwardly from the base portions in directions in which they approach each other and then extend toward tips of the fingers. A sealing member is disposed between each of the linear motion shafts and a corresponding one of the guide holes to hermetically isolate the inside of the housing from the outside thereof. This structure achieves an increased degree of sealing of the housing and is capable of having an increased opening or closing stroke of the fingers.Type: ApplicationFiled: June 26, 2017Publication date: December 28, 2017Applicant: DENSO WAVE INCORPORATEDInventor: Wataru SAITO
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Publication number: 20170212154Abstract: According to one embodiment, a current detection circuit (12) includes: a detection resistor (Rs) provided between a solenoid valve (106) and a solenoid driver (11); an amplification unit (121) configured to amplify a detected voltage of the detection resistor (Rs); an AD converter (122) that is driven by a reference voltage (Vref) generated based on a reference current (Iref) and configured to convert an output voltage from the amplification unit (121) into a digital value and output the digital value as a detected current value (D1); and a correction unit configured to perform a correction on the detected current value (D1).Type: ApplicationFiled: January 9, 2017Publication date: July 27, 2017Applicant: Renesas Electronics CorporationInventors: Masanori OTSUKA, Wataru SAITO, Yoshitaka JINGU, Yasuhiko KOKAMI, Satoshi KONDO, Junya HORISHIMA
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Publication number: 20170141224Abstract: A semiconductor device comprising: a first electrode; a first semiconductor region; a second semiconductor region; a third semiconductor region; a fourth semiconductor region; a fifth semiconductor region; an insulating portion that is provided between the second semiconductor region and the fifth semiconductor region and between the third semiconductor region and the fifth semiconductor region; a sixth semiconductor region; a seventh semiconductor region; a gate electrode; a gate insulating layer; a second electrode; and a third electrode that is provided on the third semiconductor region and electrically connected to the third semiconductor region and the gate electrode.Type: ApplicationFiled: September 9, 2016Publication date: May 18, 2017Inventor: Wataru Saito
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Publication number: 20170040414Abstract: A semiconductor device according to an embodiment includes a first semiconductor region of a first conductivity type, a first insulating unit, a conductive unit, a stacked body, a fourth semiconductor region of a second conductivity type, a fifth semiconductor region of the first conductivity type, a gate electrode, and a gate insulating unit. The stacked body includes multiple second semiconductor regions of the first conductivity type and multiple third semiconductor regions of the second conductivity type. The multiple third semiconductor regions are connected to the conductive unit. The third semiconductor regions are provided alternately with the second semiconductor regions in a first direction from the first semiconductor region toward the portion of the first insulating unit. The gate electrode is provided on one other portion of the first insulating unit. The stacked body is positioned between the gate electrode and the conductive unit in a second direction.Type: ApplicationFiled: January 19, 2016Publication date: February 9, 2017Inventor: Wataru Saito
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Patent number: 9437728Abstract: A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.Type: GrantFiled: October 13, 2015Date of Patent: September 6, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Syotaro Ono, Toshiyuki Naka, Shunji Taniuchi, Miho Watanabe, Hiroaki Yamashita
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Patent number: 9412857Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a third electrode, a first insulating film and a second insulating film. The first semiconductor layer includes a nitride semiconductor. The second semiconductor layer is provided on the first layer, includes a nitride semiconductor, and includes a hole. The first electrode is provided in the hole. The second electrode is provided on the second layer. The third electrode is provided on the second layer so that the first electrode is disposed between the third and second electrodes. The first insulating film is provided between the first electrode and an inner wall of the hole and between the first and second electrodes, and is provided spaced from the third electrode. The second insulating film is provided in contact with the second layer between the first and third electrodes.Type: GrantFiled: January 9, 2015Date of Patent: August 9, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Akira Yoshioka, Yasunobu Saito, Hidetoshi Fujimoto, Tetsuya Ohno, Wataru Saito, Toru Sugiyama
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Patent number: 9391142Abstract: A semiconductor device of this embodiment includes: a first semiconductor layer including AlXGa1-XN; a second semiconductor layer provided above the first semiconductor layer, and including undoped or n-type AlYGa1-YN; a first and second electrodes provided above the second semiconductor layer; a third semiconductor layer provided above the second semiconductor layer between the first electrode and the second electrode, is at a distance from each of the first and second electrodes, and including p-type AlZGa1-ZN; a control electrode provided above the third semiconductor layer; a fourth semiconductor layer provided above the third semiconductor layer between the first electrode and the control electrode, is at a distance from the control electrode, and including n-type AlUGa1-UN; and a fifth semiconductor layer provided above a portion of the third semiconductor layer between the control electrode and the second electrode, is at a distance from the control electrode, and including n-type AlUGa1-UN.Type: GrantFiled: September 17, 2014Date of Patent: July 12, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Yasunobu Saito
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Patent number: 9349721Abstract: A semiconductor device comprising: a Metal Oxide Semiconductor Field Effect Transistor including: a semiconductor substrate including a first semiconductor layer of a first conductivity type; second semiconductor layers of a second conductivity type extending in a depth direction from one surface of the semiconductor substrate, and having space each other; a first diode including a fifth semiconductor layer of the second conductivity type contacting the second semiconductor layer in one surface side of the semiconductor substrate, the first semiconductor layer and the second semiconductor layers; and an anode of the second diode connected to an anode of the first diode.Type: GrantFiled: April 7, 2014Date of Patent: May 24, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Wataru Saito, Syotaro Ono, Toshiyuki Naka, Shunji Taniuchi, Hiroaki Yamashita
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Patent number: 9343536Abstract: A semiconductor device according to an embodiment includes a first semiconductor layer, a second semiconductor layer provided on the first semiconductor layer and having a wider band gap than the first semiconductor layer, a source electrode and a drain electrode provided on the second semiconductor layer, wherein at least one of the source electrode and the drain electrode includes a plurality of protrusions on a side in contact with the second semiconductor layer, and a gate electrode provided between the source electrode and the drain electrode.Type: GrantFiled: February 13, 2015Date of Patent: May 17, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Kazuo Tsutsui, Hiroshi Iwai, Kuniyuki Kakushima, Hitoshi Wakabayashi
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Publication number: 20160079373Abstract: A semiconductor device includes a compound semiconductor layer, an insulating element, and a conductive element. The conductive element includes a plurality of conductive regions which are spaced from the compound semiconductor layer in a first direction. The insulating element is provided between the compound semiconductor layer and the conductive element. A length of each of the plurality of conductive regions in a second direction which intersects the first direction becomes longer the farther the individual one of the plurality of conductive regions is spaced from the compound semiconductor layer.Type: ApplicationFiled: March 2, 2015Publication date: March 17, 2016Inventors: Takeshi UCHIHARA, Wataru SAITO, Takaaki YASUMOTO, Naoko YANASE
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Publication number: 20160043213Abstract: A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.Type: ApplicationFiled: October 13, 2015Publication date: February 11, 2016Inventors: Wataru SAITO, Syotaro ONO, Toshiyuki NAKA, Shunji TANIUCHI, Miho WATANABE, Hiroaki YAMASHITA
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Publication number: 20160043187Abstract: A semiconductor device according to an embodiment includes a first semiconductor layer, a second semiconductor layer provided on the first semiconductor layer and having a wider band gap than the first semiconductor layer, a source electrode and a drain electrode provided on the second semiconductor layer, wherein at least one of the source electrode and the drain electrode includes a plurality of protrusions on a side in contact with the second semiconductor layer, and a gate electrode provided between the source electrode and the drain electrode.Type: ApplicationFiled: February 13, 2015Publication date: February 11, 2016Inventors: Wataru Saito, Kazuo Tsutsui, Hiroshi Iwai, Kuniyuki Kakushima, Hitoshi Wakabayashi
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Patent number: 9196721Abstract: A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.Type: GrantFiled: July 11, 2014Date of Patent: November 24, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Syotaro Ono, Toshiyuki Naka, Shunji Taniuchi, Miho Watanabe, Hiroaki Yamashita
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Patent number: RE46799Abstract: A power semiconductor device is disclosed, which comprises a semiconductor layer including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, which are periodically formed in the lateral direction, and a power semiconductor element including the semiconductor layers that are formed periodically, wherein a distribution of an amount of an impurity in a vertical direction of the first semiconductor layer differs from a distribution of an amount of an impurity in the vertical direction of the second semiconductor layer.Type: GrantFiled: August 30, 2016Date of Patent: April 17, 2018Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Wataru Saito, Ichiro Omura, Kozo Kinoshita
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Patent number: RE47641Abstract: A semiconductor device includes a first-conductivity-type semiconductor layer which includes a cell region portion and a junction terminating region portion. The junction terminating region portion is a region portion which is positioned in an outer periphery of the cell region portion to maintain a breakdown voltage by extending a depletion layer to attenuate an electric field.Type: GrantFiled: August 26, 2016Date of Patent: October 8, 2019Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Masakazu Yamaguchi, Wataru Saito, Ichiro Omura, Masaru Izumisawa