Patents by Inventor WEI-AN LAI

WEI-AN LAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11256141
    Abstract: A pixel structure including a pixel electrode and an alignment electrode is provided. An outline of the pixel electrode is surrounded by first long and short sides, a second long side opposite to the first long side, and a second short side opposite to the first short side. The pixel electrode has a first opening, extending along the first long side, and a second opening, extending from the first opening toward the second long side. The first opening is narrower than the second opening. The alignment electrode is physically separated from the pixel electrode and includes a first extension portion adjacent to the second long side and two supplemental portions positioned at two ends of the first extension portion. The two supplemental portions both extend from the first extension portion toward the first long side and respectively along the first short side and the second short side.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: February 22, 2022
    Assignee: Au Optronics Corporation
    Inventors: Fu-Chun Tsao, Yi-Chu Wang, Cheng-Wei Lai, Ssu-Han Li, Li-Min Chen, Wei-Cheng Cheng
  • Publication number: 20220050334
    Abstract: A pixel structure including a pixel electrode and an alignment electrode is provided. An outline of the pixel electrode is surrounded by first long and short sides, a second long side opposite to the first long side, and a second short side opposite to the first short side. The pixel electrode has a first opening, extending along the first long side, and a second opening, extending from the first opening toward the second long side. The first opening is narrower than the second opening. The alignment electrode is physically separated from the pixel electrode and includes a first extension portion adjacent to the second long side and two supplemental portions positioned at two ends of the first extension portion. The two supplemental portions both extend from the first extension portion toward the first long side and respectively along the first short side and the second short side.
    Type: Application
    Filed: April 21, 2021
    Publication date: February 17, 2022
    Applicant: Au Optronics Corporation
    Inventors: Fu-Chun Tsao, Yi-Chu Wang, Cheng-Wei Lai, Ssu-Han Li, Li-Min Chen, Wei-Cheng Cheng
  • Patent number: 11251948
    Abstract: A method and a system for encryption and decryption based on continuous-variable quantum neural network CVQNN. The method includes: updating a weight of the CVQNN with a training sample; triggering, by a sender, a legal measurement bases synchronization between the sender and the CVQNN; converting, by the sender, the information to be sent into a quadratic plaintext according to the synchronized measurement bases, and sending the quadratic plaintext to the CVQNN; encrypting, by the CVQNN, a received quadratic plaintext, and sending an encrypted quadratic plaintext to a receiver; after receiving the encrypted quadratic plaintext, sending by the receiver the encrypted quadratic plaintext to the CVQNN for decryption to obtain decrypted information. The embodiments implement data encryption and decryption by introducing CVQNN model and synchronization measurement technology. The embodiments provide advantages of high reliability, high security and easy realization.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: February 15, 2022
    Assignee: CENTRAL SOUTH UNIVERSITY
    Inventors: Jinjing Shi, Shuhui Chen, Yanyan Feng, Yuhu Lu, Tongge Zhao, Yongze Tang, Zhenhuan Li, Wenxuan Wang, Wei Lai, Duan Huang, Ronghua Shi
  • Patent number: 11250929
    Abstract: An arrangement to guarantee boot up of a computer includes a control center microchip with BIOS boot block and BIOS program, and a flash memory divided into a first protected block, a main block, and a second protected block. In the computer, an embedded controller (EC) with stored modules is electrically connected to the flash memory and the control center microchip. The modules include a determining module to check that the code of the first protected block is identical with the code of the second protected block and a recovery module able to reinstate correct code from the second protected block into the first protected block if required. A method applied to the disclosed computer startup detection system is also disclosed.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: February 15, 2022
    Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Ching-Jou Chen, Tzu-Wei Lai
  • Publication number: 20220020738
    Abstract: An integrated circuit includes a semiconductor substrate, transistors on the semiconductor, horizontal routing tracks extending in a first direction in a first metal layer, and one or more backside routing tracks extending in the first direction in a backside metal layer. Each transistor has a gate terminal, a source terminal, and a drain terminal. A first transistor has a first terminal, a second terminal, and a third terminal. A first horizontal routing track of the horizontal routing tracks is conductively connected to the first terminal of the first transistor through a via connector. A first backside routing track is conductively connected to the second terminal of the first transistor through a backside via connector. The backside metal layer and the first metal layer are formed at opposite sides of the semiconductor substrate.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 20, 2022
    Inventors: Wei-An LAI, Shih-Wei PENG, Wei-Cheng LIN, Jiann-Tyng TZENG
  • Patent number: 11184990
    Abstract: The present disclosure provides a fixing device for fixing an external electronic component on a motherboard in a chassis. The fixing device includes a fixing block and a telescopic block. The fixing block is fixed on the chassis. One end of the telescopic block is slidably mounted in the fixing block, the other end protrudes from the fixing block and holds the electronic component. A chassis including the above-described fixing device to hold electronic components of different sizes is also provided.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: November 23, 2021
    Assignee: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD.
    Inventors: Ching-Jou Chen, Tzu-Wei Lai, Wen-Hsiang Hung, Jun-Bo Yang, Chun-Bao Gu
  • Publication number: 20210343744
    Abstract: An integrated circuit includes a set of power rails on a back-side of a substrate, a first flip-flop, a second flip-flop and a third flip-flop. The set of power rails extend in a first direction. The first flip-flop includes a first set of conductive structures extending in the first direction. The second flip-flop abuts the first flip-flop at a first boundary, and includes a second set of conductive structures extending in the first direction. The third flip-flop abuts the second flip-flop at a second boundary, and includes a third set of conductive structures extending in the first direction. The first, second and third flip-flop are on a first metal layer and are on a front-side of the substrate opposite from the back-side. The second set of conductive structures are offset from the first boundary and the second boundary in a second direction.
    Type: Application
    Filed: February 25, 2021
    Publication date: November 4, 2021
    Inventors: Te-Hsin CHIU, Wei-Cheng LIN, Wei-An LAI, Jiann-Tyng TZENG
  • Publication number: 20210313263
    Abstract: A semiconductor device includes a base, source, drain and gate electrodes, signal tracks and a power mesh. The source, drain and gate electrodes are arranged on a surface of the base, wherein the gate electrodes are extended along a first direction. The signal tracks arranged above the first surface of the base and above the source and drain electrodes and the gate electrodes, wherein the signal tracks are extended along the first directions. A power mesh arranged below the first surface of the base, the power mesh comprising first power rails extended in the second direction and second power rails extended in a first direction, wherein the second direction is substantially perpendicular to the first direction.
    Type: Application
    Filed: April 1, 2020
    Publication date: October 7, 2021
    Inventors: WEI-AN LAI, WEI-CHENG LIN, JIANN-TYNG TZENG
  • Patent number: 11133299
    Abstract: An ESD protection device including a PNP transistor connected to an input pad, a diode connected to the PNP transistor and connected to an output pad, and an NMOS transistor connected to the PNP transistor and the output pad, wherein the diode, PNP transistor, and NMOS transistor are configured to route different levels of an electrostatic discharge (ESD) current pulse from the input pad to the output pad.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: September 28, 2021
    Assignee: NXP B.V.
    Inventors: Da-Wei Lai, Stephen John Sque, Wilhelmus Cornelis Maria Peters
  • Patent number: 11133254
    Abstract: An integrated circuit structure includes a substrate having a front side and a back side, the back side being an opposite side of the substrate from the front side. A first power rail extends in a first direction, is embedded in the front side of the substrate, and provides a first supply voltage. A second power rail provides a second supply voltage different from the first supply voltage, extends in the first direction, is embedded in the front side of the substrate, and is separated from the first power rail in a second direction different from the first direction. A first device is positioned between the first power rail and the second power rail and located on the front side of the substrate. A first via structure extends to the back side of the substrate and is electrically coupled to the second power rail.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: September 28, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-An Lai, Jiann-Tyng Tzeng, Wei-Cheng Lin
  • Publication number: 20210287435
    Abstract: For a mapping application, a method for reporting a problem related to a map displayed by the mapping application is described. The method identifies a mode in which the mapping application is operating. The method identifies a set of types of problems to report based on the identified mode. The method displays, in a display area of the mapping application, a graphical user interface (GUI) page that includes a set of selectable user interface (UI) items that represent the identified set of types of problems.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 16, 2021
    Applicant: Apple Inc.
    Inventors: Bradford A. Moore, Marcel van Os, Albert P. Dul, Ethan C. Sorrelgreen, I Wei Lai
  • Publication number: 20210280607
    Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 9, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang CHEN, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Ru-Gun Liu, Wei-Cheng Lin, Lei-Chun Chou, Wei-An Lai
  • Publication number: 20210255510
    Abstract: A pixel structure includes a data line, a scan line, a common signal line, a first switching element, a second switching element, a first pixel electrode, and a second pixel electrode. The first switching element is electrically connected to the scan line and the data line. The second switching element is electrically connected to the scan line and the common signal line. The first pixel electrode is electrically connected to the first switching element. The second pixel electrode is electrically connected to the second switching element. The second pixel electrode surrounds the first pixel electrode.
    Type: Application
    Filed: August 19, 2020
    Publication date: August 19, 2021
    Applicant: Au Optronics Corporation
    Inventors: Yi-Chu Wang, Cheng-Wei Lai, Fu-Chun Tsao, Hsiao-Tung Lin, Wei-Cheng Cheng
  • Patent number: 11086108
    Abstract: An imaging lens assembly includes a plurality of lens elements, wherein at least one of the lens elements is a dual molded lens element. The dual molded lens element includes a light transmitting portion and a light absorbing portion. The light transmitting portion includes an effective optical section. The light absorbing portion is located on at least one surface of an object-side surface and an image-side surface of the dual molded lens element, wherein a plastic material and a color of the light absorbing portion are different from a plastic material and a color of the light transmitting portion, and the light absorbing portion includes an opening. The opening is non-circular and disposed correspondingly to the effective optical section.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: August 10, 2021
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Cheng-Feng Lin, I-Wei Lai, Ming-Ta Chou
  • Publication number: 20210217744
    Abstract: A semiconductor device includes a first transistor having a first fin, wherein a base of the first fin is surrounded by a first dielectric material, the first fin having a first fin height measured from the top surface of the first dielectric material to a top surface of the first fin; and a second transistor having a second fin, wherein a base of the second fin is surrounded by a second dielectric material, the second fin having a second fin height measured from a top surface of the second dielectric material to a top surface of the second fin, wherein the first fin height is different from the second fin height.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 15, 2021
    Inventors: Wei-Cheng LIN, Hui-Ting YANG, Jiann-Tyng TZENG, Lipen YUAN, Wei-An LAI
  • Publication number: 20210207406
    Abstract: A locking assembly for a Kensington-locked enclosure can be simply padlocked for security. The locking assembly includes a first connecting member and a second connecting member. The first connecting member is fixed on a base body of the enclosure, the first connecting member comprises a first tongue piece. The second connecting member is fixed on an upper cover of the enclosure, and the second connecting member comprises a second tongue piece. The first tongue piece and the second tongue piece protrude from an outside of the enclosure and fit each other, and a padlock can pass through the first tongue piece and the second tongue piece to lock the base body and the upper cover together and secure the attachment of the Kensington lock.
    Type: Application
    Filed: June 22, 2020
    Publication date: July 8, 2021
    Inventors: TZU-WEI LAI, HAO-CHUN HUANG, WEN-HSIANG HUNG, JUN-BO YANG
  • Publication number: 20210212234
    Abstract: The present disclosure provides a fixing device for fixing an external electronic component on a motherboard in a chassis. The fixing device includes a fixing block and a telescopic block. The fixing block is fixed on the chassis. One end of the telescopic block is slidably mounted in the fixing block, the other end protrudes from the fixing block and holds the electronic component. A chassis including the above-described fixing device to hold electronic components of different sizes is also provided.
    Type: Application
    Filed: June 19, 2020
    Publication date: July 8, 2021
    Inventors: Ching-Jou Chen, Tzu-Wei Lai, Wen-Hsiang Hung, Jun-Bo Yang, Chun-Bao Gu
  • Patent number: 11055912
    Abstract: For a mapping application, a method for reporting a problem related to a map displayed by the mapping application is described. The method identifies a mode in which the mapping application is operating. The method identifies a set of types of problems to report based on the identified mode. The method displays, in a display area of the mapping application, a graphical user interface (GUI) page that includes a set of selectable user interface (UI) items that represent the identified set of types of problems.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: July 6, 2021
    Assignee: Apple Inc.
    Inventors: Bradford A. Moore, Marcel van Os, Albert P. Dul, Ethan C. Sorrelgreen, I Wei Lai
  • Patent number: 11020847
    Abstract: A screwdriver includes a shank with a handle connected to a collar rotatably and a base is located in a room of the handle. At least one resilient extending from the underside of the collar is inserted in at least one recess of the handle. The base connected to the outside of the collar has a rod connected to a positioning member. The positioning member is defined with multiple slots able to hold bits in position in the room. One side of the base is sealed by a cap. Therefore, the bits are received inside of the handle so as to carry with the screwdriver.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: June 1, 2021
    Inventors: Chia Wei Lai, Min Hung Lai
  • Patent number: D940824
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: January 11, 2022
    Assignee: JEN SIAN INDUSTRIAL CO., LTD.
    Inventors: Cheng-Wei Lai, Fu-Kai Chuang