Abstract: A semiconductor device includes a plurality of active region structures that each protrude upwards in a vertical direction. The active region structures each extend in a first horizontal direction. The active region structures are separated from one another in a second horizontal direction different from the first horizontal direction. A gate structure is disposed over the active region structures. The gate structure extends in the second horizontal direction. The gate structure partially wraps around each of the active region structures. A conductive capping layer is disposed over the gate structure. A gate via is disposed over the conductive capping layer. A dimension of the conductive capping layer measured in the second horizontal direction is substantially greater than a maximum dimension of the gate via measured in the second horizontal direction.

Abstract: The present disclosure provides a semiconductor device and a method of forming the same. The semiconductor device includes a first channel members being vertically stacked, a second channel members being vertically stacked, an n-type work function layer wrapping around each of the first channel members, a first p-type work function layer over the n-type work function layer and wrapping around each of the first channel members, a second p-type work function layer wrapping around each of the second channel members, a third p-type work function layer over the second p-type work function layer and wrapping around each of the second channel members, and a gate cap layer over a top surface of the first p-type work function layer and a top surface of the third p-type work function layer such that the gate cap layer electrically couples the first p-type work function layer and the third p-type work function layer.

Abstract: A method of producing a stacking structure includes providing a substrate; printing, by flexography, a catalyst layer onto the substrate, wherein the catalyst layer includes a grid pattern and a conducting wire pattern connected to the grid pattern; plating, by chemical plating, a metal layer onto the catalyst layer, wherein the metal layer includes a metal grid corresponding in position to the grid pattern of the catalyst layer and a metal conducting wire corresponding in position to the conducting wire pattern of the catalyst layer; and printing, by flexography, a silver nanowire layer onto the metal layer, wherein the silver nanowire layer at least partially overlaps the metal grid. A stacking structure includes a substrate; a catalyst layer; a metal layer; and a silver nanowire layer. The method of producing a stacking structure and the stacking structure are applicable to a touch sensor.

Abstract: A method for preparing stacking structure includes providing a substrate; disposing a metallic layer and a silver nanowire layer on the substrate; applying flexographic printing technology to print an anti-etching layer on a surface of the metallic layer or the silver nanowire layer so that the anti-etching layer partially covers the metallic layer or the silver nanowire layer; applying an etching technology to remove a part of the metallic layer or the silver nanowire layer that is not covered by the anti-etching layer and the metallic layer or the silver nanowire layer disposed therebelow with an etching liquid so that the metallic layer comprises: metallic wires; a metallic grid; and a metallic plate; and removing the anti-etching layer. A stacking structure comprises: the substrate; the metallic layer; and the silver nanowire layer. The method for preparing stacking structure and the stacking structure can be applied to a touch sensor.

Abstract: A method of producing a stacking structure includes providing a substrate; printing, by flexography, a catalyst layer onto the substrate, wherein the catalyst layer includes a grid pattern and a conducting wire pattern connected to the grid pattern; plating, by chemical plating, a metal layer onto the catalyst layer, wherein the metal layer includes a metal grid corresponding in position to the grid pattern of the catalyst layer and a metal conducting wire corresponding in position to the conducting wire pattern of the catalyst layer; and printing, by flexography, a silver nanowire layer onto the metal layer, wherein the silver nanowire layer at least partially overlaps the metal grid. A stacking structure includes a substrate; a catalyst layer; a metal layer; and a silver nanowire layer. The method of producing a stacking structure and the stacking structure are applicable to a touch sensor.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure.

Abstract: A biological detection system for detecting a liquid sample containing a plurality of target biological particles includes a capturing device including a cell structure, an inlet, an outlet, a monolithic chip, and a layer of binding agent. The monolithic chip includes a substrate and a plurality of discrete nano-sized structures which are displaced from each other and each of which extends uprightly from the substrate to terminate at a top end. The layer of binding agent is formed on the top end of each of the discrete nano-sized structures for capturing the target biological particles.

Abstract: A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure.

Abstract: A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure.

Abstract: A biological detection system for detecting a liquid sample containing a plurality of target biological particles includes a capturing device including a cell structure, an inlet, an outlet, a monolithic chip, and a layer of binding agent. The monolithic chip includes a substrate and a plurality of discrete nano-sized structures which are displaced from each other and each of which extends uprightly from the substrate to terminate at a top end. The layer of binding agent is formed on the top end of each of the discrete nano-sized structures for capturing the target biological particles.

Abstract: A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure.

Abstract: A method of fabrication of alignment marks for a non-STI CMOS image sensor is introduced. In some embodiments, zero layer alignment marks and active are alignment marks may be simultaneously formed on a wafer. A substrate of the wafer may be patterned to form one or more recesses in the substrate. The recesses may be filled with a dielectric material using, for example, a field oxidation method and/or suitable deposition methods. Structures formed by the above process may correspond to elements of the zero layer alignment marks and/or to elements the active area alignment marks.