Patents by Inventor Wei Cheng

Wei Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11938405
    Abstract: An electronic device and a method for detecting abnormal device operation are provided. The method includes: obtaining multiple action events of a movable input device, and each action event including a relative coordinate and a time stamp of the movable input device; generating multiple absolute coordinates based on the relative coordinate of each action event; estimating multiple speed vectors based on the absolute coordinates and the time stamp of each action event; estimating multiple acceleration vectors based on the speed vectors and the time stamp of each action event; and estimating a probability of abnormal operation based on the speed vectors and the acceleration vectors.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: March 26, 2024
    Assignee: Acer Incorporated
    Inventors: Tien-Yi Chi, Wei-Chieh Chen, Shih-Cheng Huang, Tzu-Lung Chuang
  • Publication number: 20240096805
    Abstract: In an embodiment, a method of forming a structure includes forming a first transistor and a second transistor over a first substrate; forming a front-side interconnect structure over the first transistor and the second transistor; etching at least a backside of the first substrate to expose the first transistor and the second transistor; forming a first backside via electrically connected to the first transistor; forming a second backside via electrically connected to the second transistor; depositing a dielectric layer over the first backside via and the second backside via; forming a first conductive line in the dielectric layer, the first conductive line being a power rail electrically connected to the first transistor through the first backside via; and forming a second conductive line in the dielectric layer, the second conductive line being a signal line electrically connected to the second transistor through the second backside via.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Inventors: Shang-Wen Chang, Yi-Hsun Chiu, Cheng-Chi Chuang, Ching-Wei Tsai, Wei-Cheng Lin, Shih-Wei Peng, Jiann-Tyng Tzeng
  • Publication number: 20240096491
    Abstract: A computer readable storage medium is provided. When contents of the computer readable storage medium are executed by a processor, multi-photon imaging may be performed on a histopathological section containing tumor environment information, and pathological partitioning of a tumor microenvironment may be further performed through image processing. A value of each collagen feature parameters, such as a morphological feature parameter, an energy feature parameter and a texture feature parameter, may be extracted from a tumor tissue region, an invasive margin (IM) region and a normal tissue (N) region. An inter-region difference and a variation may be calculated according to feature parameters of regions. A collagen feature scoring model may be established. A collagen feature score may be calculated with the collagen feature parameters input to the model.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 21, 2024
    Inventors: Jun YAN, Shumin DONG, Botao YAN, Weisheng CHEN, Xiaoyu DONG, Xiumin LIU, Shuhan ZHAO, Jiaxin CHENG, Yanfeng DONG, Wei JIANG, Dexin CHEN, Guoxin LI
  • Publication number: 20240093089
    Abstract: A composition for selectively etching a layer including an aluminum compound in the presence of a layer of a low-k material and/or a layer including copper and/or cobalt, and a corresponding process, are described. Further described is a process for the manufacture of a semiconductor device, including the step of selectively etching at least one layer including an aluminum compound in the presence of a layer of a low-k material and/or a layer including copper and/or cobalt by contacting the at least one layer including an aluminum compound with the described composition.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: Joannes Theodorus Valentinus HOOGBOOM, Jhih Jheng KE, Che Wei WANG, Andreas KLIPP, Yi Ping CHENG
  • Publication number: 20240096884
    Abstract: A method of making a semiconductor device includes forming a first polysilicon structure over a first portion of a substrate. The method further includes forming a first spacer on a sidewall of the first polysilicon structure, wherein the first spacer has a concave corner region between an upper portion and a lower portion. The method further includes forming a protective layer covering an entirety of the first spacer and the first polysilicon structure, wherein the protective layer has a first thickness over the concave corner region and a second thickness over the first polysilicon structure, and a difference between the first thickness and the second thickness is at most 10% of the second thickness.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Yu-Shao CHENG, Chui-Ya PENG, Kung-Wei LEE, Shin-Yeu TSAI
  • Publication number: 20240096923
    Abstract: The image sensing structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes at least one first unit. The at least one first unit includes a plurality of first interconnects adjacent to the top side of the first semiconductor device, a row selector, and an analog-to-digital converter (ADC) connected to the row selectors. The second semiconductor device includes at least one second unit. The at least one second unit includes a photodiode facing the top side of the second semiconductor device. The photodiode is configured to receive the light incident on the top side of the second semiconductor device. The top side of the first semiconductor device is bonded to the bottom side of the second semiconductor device.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 21, 2024
    Inventors: FENG-CHIEN HSIEH, YUN-WEI CHENG, WEI-LI HU, KUO-CHENG LEE, CHENG-MING WU
  • Publication number: 20240097383
    Abstract: An USB electronic device having functionality of electric leakage protection is discloses. The USB electronic device comprises: a power interface, a power conversion circuit, a system controller, a circuit assembly, and a plurality of USB interfaces, of which the USB interfaces consists of at least one first USB interface and at least one second USB interface, and the first USB interface and the second USB interface both include an electrical terminal for supporting a power delivery (PD) communication protocol. In addition, there is an electric leakage preventing circuit provided in the USB electronic device. As such, in case of a power signal being transmitted between the first/second USB interface and an external electronic device by using the PD communication protocol, the electric leakage preventing circuit is enabled to prevent the power signal has a current leakage occurring between the first/second USB interface and the external electronic device.
    Type: Application
    Filed: October 27, 2022
    Publication date: March 21, 2024
    Applicant: ACTION STAR TECHNOLOGY CO., LTD.
    Inventor: Ching-Wei Cheng
  • Publication number: 20240096643
    Abstract: A semiconductor device includes a substrate, a first well, a second well, a metal gate, a poly gate, a source region, and a drain region. The first well and the second well are within the substrate. The metal gate is partially over the first well. The poly gate is over the second well. The poly gate is separated from the metal gate, and a width ratio of the poly gate to the metal gate is in a range from about 0.1 to about 0.2. The source region and the drain region are respectively within the first well and the second well.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Alexander KALNITSKY, Wei-Cheng WU, Harry-Hak-Lay CHUANG
  • Publication number: 20240096893
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Ming-Ching Chang, Wei-Liang Lu, Kuei-Yu Kao
  • Publication number: 20240094626
    Abstract: A pellicle for an extreme ultraviolet (EUV) photomask includes a pellicle frame and a main membrane attached to the pellicle frame. The main membrane includes a plurality of nanotubes, and each of the plurality of nanotubes is covered by a coating layer containing Si and one or more metal elements.
    Type: Application
    Filed: April 12, 2023
    Publication date: March 21, 2024
    Inventors: Pei-Cheng HSU, Wei-Hao LEE, Huan-Ling LEE, Hsin-Chang LEE, Chin-Hsiang LIN
  • Publication number: 20240091893
    Abstract: A mounting frame for being mounted with either one of first and second screwdrivers, includes a main frame, a mounting seat, and first and second mounting plates. The mounting seat has a plate attachment hole set. The first mounting plate has a first seat attachment hole set operable to be connected to the plate attachment hole set, and a first driver attachment hole set for the first screwdriver to be attached thereto. The second mounting plate has a second seat attachment hole set operable to be connected to the plate attachment hole set, and a second driver attachment hole set for the second screwdriver to be attached thereto.
    Type: Application
    Filed: August 16, 2023
    Publication date: March 21, 2024
    Applicant: Jabil Inc.
    Inventors: Harpuneet Singh, Lei Hu, Ying-Chieh Huang, Wei-Hsiu Hsieh, Xiao-Ting Zheng, Chien-Cheng Chu
  • Publication number: 20240098791
    Abstract: Apparatus and methods are provided RLF detection for SL-U transceiving. In one novel aspect, HARQ-based RLF detection and/or LBT-based RLF detection is performed for SL-U RLF. HARQ based SL-U RLF procedure increases DTX for each PSSCH or PSCCH and disregards detected DTX on PSFCH or increases DTX for each PSFCH absence. In one embodiment, a DTX threshold value is modified. In one embodiment, the LBT based RLF procedure detects and reports an LBT failure for an RB set by the PHY layer; determines a consistent LBT (C-LBT) for the RB set based on a C-LBT threshold at the MAC layer and determines an RLF when all configured RB sets for the SL connection is determined to be C-LBT. In another novel aspect, multiple PSFCH occasions are configured for one PSSCH/PSCCH at a consecutive symbol level, a non-consecutive symbol level, a consecutive slot level or a non-consecutive slot level.
    Type: Application
    Filed: September 28, 2023
    Publication date: March 21, 2024
    Inventors: JUN-QIANG CHENG, Tao Chen, JING-WEI CHEN
  • Publication number: 20240096917
    Abstract: An image sensor structure includes a semiconductor substrate, a plurality of image sensing elements, a reflective element, and a high-k dielectric structure. The image sensing elements are in the semiconductor substrate. The reflective element is in the semiconductor substrate and between the image sensing elements. The high-k dielectric structure is between the reflective element and the image sensing elements.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 21, 2024
    Inventors: PO CHUN CHANG, PING-HAO LIN, WEI-LIN CHEN, KUN-HUI LIN, KUO-CHENG LEE
  • Publication number: 20240096918
    Abstract: A device structure according to the present disclosure may include a first die having a first substrate and a first interconnect structure, a second die having a second substrate and a second interconnect structure, and a third die having a third interconnect structure and a third substrate. The first interconnect structure is bonded to the second substrate via a first plurality of bonding layers. The second interconnect structure is bonded to the third interconnect structure via a second plurality of bonding layers. The third substrate includes a plurality of photodiodes and a first transistor. The second die includes a second transistor having a source connected to a drain of the first transistor, a third transistor having a gate connected to drain of the first transistor and the source of the second transistor, and a fourth transistor having a drain connected to the source of the third transistor.
    Type: Application
    Filed: January 17, 2023
    Publication date: March 21, 2024
    Inventors: Hao-Lin Yang, Tzu-Jui Wang, Wei-Cheng Hsu, Cheng-Jong Wang, Dun-Nian Yuang, Kuan-Chieh Huang
  • Patent number: 11936418
    Abstract: A radar signal processing system with a self-interference cancelling function includes an analog front end (AFE) processor, an analog to digital converter (ADC), an adaptive interference canceller (AIC), and a digital to analog converter (DAC). The AFE processor receives an original input signal and generates an analog input signal. The ADC converts the analog input signal to a digital input signal. The AIC generates a digital interference signal digital interference signal by performing an adaptive interference cancellation process according to the digital input signal. The DAC converts the digital interference signal to an analog interference signal. Finally, the analog interference signal is fed back to the AFE and cancelled from the original input signal in the AFE processor while performing the front end process, reducing the interference of the static interference from the leaking of a close-by transmitter during the front end process.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: March 19, 2024
    Assignee: KAIKUTEK INC.
    Inventors: Mike Chun-Hung Wang, Chun-Hsuan Kuo, Mohammad Athar Khalil, Wen-Sheng Cheng, Chen-Lun Lin, Chin-Wei Kuo, Ming Wei Kung, Khoi Duc Le
  • Patent number: 11935935
    Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Min-Kun Dai, Wei-Gang Chiu, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin, Chung-Te Lin
  • Patent number: 11933493
    Abstract: A tool includes a barrel, a guiding wire, and an electrically conductive member. The barrel is made of electrically conductive material. The guiding wire is disposed in the barrel. The barrel and the guiding wire are directly or indirectly connected to two opposite electrodes of a power source. The electrically conductive member is connected to an outer periphery of the guiding wire and is electrically connected to the guiding wire. The electrically conductive member is disposed between the barrel and the guiding wire and is spaced from the barrel. When the power source is activated, an electric arc is generated between the electrically conductive member and the barrel.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: March 19, 2024
    Assignee: PRO-IRODA INDUSTRIES, INC.
    Inventors: Wei Cheng Wu, Cheng Nan Yang
  • Patent number: 11932662
    Abstract: The present invention relates to a method for preparing glufosinate or an analogue and an intermediate thereof. The method comprises: a) reacting a compound of formula (II), an alcohol of formula (III) and a compound of formula (V); and b) hydrolyzing the product of the reaction above to obtain glufosinate of formula (IV) or an analogue thereof.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: March 19, 2024
    Assignee: LIER CHEMICAL CO., LTD.
    Inventors: Yongjiang Liu, Min Xu, Lei Zhou, Wei Zeng, Ke Cheng
  • Publication number: 20240083742
    Abstract: A micro electro mechanical system (MEMS) includes a circuit substrate comprising electronic circuitry, a support substrate having a recess, a bonding layer disposed between the circuit substrate and the support substrate, through holes passing through the circuit substrate to the recess, a first conductive layer disposed on a front side of the circuit substrate, and a second conductive layer disposed on an inner wall of the recess. The first conductive layer extends into the through holes and the second conductive layer extends into the through holes and coupled to the first conductive layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Li YANG, Kai-Di WU, Ming-Da CHENG, Wen-Hsiung LU, Cheng Jen LIN, Chin Wei KANG
  • Patent number: D1019311
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: March 26, 2024
    Assignee: PRO-IRODA INDUSTRIES, INC.
    Inventor: Wei Cheng Wu