Abstract: A semiconductor package and the method of forming the same are provided. The semiconductor package may include a substrate, a semiconductor package component having a semiconductor die bonded to the substrate, a lid attached to the substrate, and a first composite metal feature between the semiconductor package component and the lid. The first composite metal feature may include a first metal feature having a first material and a second metal feature having a second material. The first material may be an intermetallic compound. The second material may be different from the first material.

Abstract: A method comprises receiving a modulus for a number-theoretic transform of a polynomial and selecting a plurality of prime moduli whose product forms the modulus for the number-theoretic transform, wherein the plurality of prime moduli are selected by giving preference to prime moduli having fewer ones in a binary representation of the prime moduli. For each prime modulus in the plurality of prime moduli: dividing a coefficient of the polynomial into segments and performing modular reduction of the segments relative to the prime modulus. Performing the modular reduction of at least one segment comprises implementing a multiplication of a value by a modular reduction of a base value relative to the prime modulus using a shift-add-unit having a smaller area requirement than a modular multiplier. A modular reduction of the coefficient relative to the prime modulus is determined based on the modular reductions of the segments.

Abstract: In an embodiment, a method includes forming a device region along a first substrate; forming an interconnect structure over the device region and the first substrate; forming a metal pillar over the interconnect structure, forming the metal pillar comprising: forming a base layer over the interconnect structure; forming an intermediate layer over the base layer; and forming a capping layer over the intermediate layer; forming a solder region over the capping layer; and performing an etch process to recess sidewalls of the base layer and the capping layer from sidewalls of the intermediate layer and the solder region.

Abstract: A method of labeling video to provide authentication acquires an instruction to apply timestamp labeling. Each recorded video is labeled with a timestamp based on the instruction. The first mark information is generated based on a content of each recorded video as a hash value and is uploaded into a blockchain. Second mark information is generated based on a content of at least one video under investigation. By comparing the first mark information and the second mark information, a video under investigation is found to be undistorted and authentic when the first mark information is the same as the second mark information. The video under investigation is found to be non-authentic when the first mark information is different from the second mark information. A terminal device and a computer readable storage medium applying the method are also disclosed.

Abstract: A light emitting module includes a transparent substrate, a plurality of first light emitting components, a light guide plate and a plurality of second light emitting components. The transparent substrate includes a first surface and a second surface that are opposite to each other. The plurality of first light emitting components are arranged in an array on the first surface. The light guide plate is disposed on the second surface. The plurality of second light emitting components are disposed on the second surface and face the light incident side surface of the light guide plate.

Abstract: A pixel structure is provided. The pixel structure includes a substrate, a micro light-emitting diode, and an electrophoretic structure. The micro light-emitting diode is disposed on the substrate and configured to emit light. The electrophoretic structure is disposed on the micro light-emitting diode and includes an upper electrode, a lower electrode, an electrophoretic medium, and an electrophoretic lens. The electrophoretic medium is disposed between the upper electrode and the lower electrode, wherein the electrophoretic medium has a first refractive index. The electrophoretic lens is disposed in the electrophoretic medium and has a second refractive index that is different from the first refractive index. The electrophoretic lens is configured to move away from or toward the micro light-emitting diode by being driven by the electric field, so that light passing through the electrophoretic lens has a first or second divergence angle after refracting.

Abstract: An encapsulation structure including a substrate, an isolation structure layer, a planarization layer, and a composite layer structure is disclosed. The isolation structure layer is disposed on the substrate and defines multiple sub-pixel areas. The polarization layer is disposed on the substrate, and has a peripheral portion surrounding and covering the isolation structure layer. A thickness of the peripheral portion increases as it approaches the isolation structure layer. The composite layer structure connects the substrate and covers the planarization layer and the isolation structure layer. The composite layer includes two barrier layers and an extension layer. The extension layer is located between and connects the two barrier layers. A thickness, a water vapor transmission rate, and ductility and malleability of the extension layer are respectively greater than a thickness, a water vapor transmission rate, and ductility and malleability of each of the two barrier layers.

Abstract: The invention provides a layout pattern of static random-access memory (SRAM), which comprises a substrate, wherein a plurality of diffusion regions and a plurality of gate structures are located on the substrate to form a plurality of transistors, wherein the plurality of gate structures comprise a first gate structure, which has a stepped shape when viewed from a top view, and the first gate structure spans a first diffusion region and a second diffusion region to form a first access transistor (PG1), wherein the first diffusion region is adjacent to and in direct contact with the second diffusion region.

Abstract: The present invention discloses an RF element group testing system and method. The method comprises steps: adding an identification feature to a first RF signal, which is output by one of the plurality of tested RF elements, to generate an identification RF signal; synthesizing the identification RF signal and a second RF signal, which is output by each of the rest of the tested RF elements, to generate a corresponding synthesis signal; resolving the synthesis signal into the identification RF signal and the corresponding second RF signal according to the identification feature; restoring the identification RF signal into the first RF signal; and calculating at least one signal-feature parameter of the first RF signal and the second RF signal.

Abstract: A two-phase immersion-cooling heat-dissipation composite structure. The heat-dissipation composite structure includes a heat dissipation base, a plurality of high-thermal-conductivity fins, and at least one high-porosity solid structure. The heat dissipation base has a first surface and a second surface that face away from each other. The second surface of the heat dissipation base is in contact with a heating element immersed in a two-phase coolant. The first surface of the heat dissipation base is connected to the high-thermal-conductivity fins. The at least one high-porosity solid structure is located at the first surface of the heat dissipation base, and is connected and alternately arranged between side walls of two adjacent ones of the high-thermal-conductivity fins. Each of the high-porosity solid structure includes a plurality of closed holes and a plurality of open holes.

Abstract: An LED display screen configuration system for improving the gray scale recognition effect of human eyes used in a direct-view LED display screen sets a first current matched with a selected gamma value to output light to define a first brightness range, then uses a brightness X˜100% in the first brightness range to form a first modulation interval and a brightness Y % as a minimum allowable value, and sets the next current to form the next modulation interval, and so on and so forth. In any two adjacent modulation intervals, the maximum brightness outputted from the latter modulation interval is equal to or slightly greater than the brightness X % of the previous modulation interval, so that the respective current outputs of the 1st to the Nth modulation intervals show a power decreasing relationship, so as to set or switch to the most suitable modulation interval for the practical brightness requirements.

Abstract: The present disclosure provides systems and methods that combine physics-based systems with machine learning to generate synthetic LiDAR data that accurately mimics a real-world LiDAR sensor system. In particular, aspects of the present disclosure combine physics-based rendering with machine-learned models such as deep neural networks to simulate both the geometry and intensity of the LiDAR sensor. As one example, a physics-based ray casting approach can be used on a three-dimensional map of an environment to generate an initial three-dimensional point cloud that mimics LiDAR data. According to an aspect of the present disclosure, a machine-learned model can predict one or more dropout probabilities for one or more of the points in the initial three-dimensional point cloud, thereby generating an adjusted three-dimensional point cloud which more realistically simulates real-world LiDAR data.

Abstract: A method for manufacturing a semiconductor structure with power connecting structures under transistors comprises: forming a stop layer structure in a semiconductor substrate to divide the semiconductor substrate into a first substrate part and a second substrate part; forming a plurality of stop portions in the first substrate part and in proximity to an active surface; arranging the transistor elements on the active surface, the contact portions of the transistor elements corresponding to the stop portions; removing the second substrate part and the stop layer structure; forming a first patterned mask layer with first patterned openings on a bottom surface of the first substrate part, the first patterned openings corresponding to the stop portions; forming through open slots in the first substrate part and exposing the contact portions via the open slots; forming a protecting layer to cover side walls of the open slots; forming a conductive layer to cover the contacts; and forming the power connecting struc

Abstract: A moisture-absorbing dry electrode and smart clothing. The moisture-absorbing dry electrode includes a substrate and a moisture-absorbing electrode. The substrate has a surface. The moisture-absorbing electrode includes at least one moisture-absorbing conductive film, and the moisture-absorbing conductive film is used to absorb moisture and disposed on the surface of the substrate. The material of the moisture-absorbing conductive film includes a uniform mixture of carbon paste, a moisture-absorbing material and a cross-linking agent, and the moisture-absorbing material includes a nanomaterial or an inorganic adsorbent material, or a combination thereof.

Abstract: Changing a lighting mode for a human interface device is described herein. A first lighting mode can be initiated for a human interface device. Keys on the human interface device can be selected over a period of time at a frequency that is within a defined range. A second lighting mode for the human interface device can be identified based in part on the frequency being within the defined range. The first lighting mode and the second lighting mode can define a lighting scheme for light sources in the human interface device that reflect a user mood. The first lighting mode can be switched to the second lighting mode.

Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.

Abstract: A method of handling a workpiece includes the following steps. A workpiece is placed on a chuck body, wherein the workpiece includes a tape carrier extending beyond a periphery of the chuck body and a workpiece body disposed on the tape carrier, and the chuck body includes a seal ring surrounding the periphery of the chuck body; the tape carrier is clamped outside the chuck body, wherein the tape carrier leans against the seal ring and an enclosed space is formed between the chuck body, the tape carrier and the seal ring; and a vacuum seal is formed by evacuating gas from the enclosed space to pull the periphery of the workpiece toward the chuck body.

Abstract: Implementations of the present disclosure provide methods for preventing contact damage or oxidation after via/trench opening formation. In one example, the method includes forming an opening in a structure on the substrate to expose a portion of a surface of an electrically conductive feature, and bombarding a surface of a mask layer of the structure using energy species formed from a plasma to release reactive species from the mask layer, wherein the released reactive species form a barrier layer on the exposed surface of the electrically conductive feature.

Abstract: Provided by the present disclosure are a power supply circuit and a charging device. The power supply circuit comprises a pulse transformer circuit and a first power supply conversion circuit. The pulse transformer circuit comprises a pulse transformer and a switch control circuit; a primary winding of the pulse transformer is connected to a power supply and is connected to the switch control circuit, and the switch control circuit is used to modulate the voltage on the primary winding into a pulse voltage; and the input terminal of the first power supply conversion circuit is connected to a secondary winding of the pulse transformer, and is used to transform the voltage on the secondary winding of the pulse transformer into a first preset voltage range when the voltage outputted by the secondary winding exceeds the first preset voltage range, and then output the voltage.

Abstract: A two-phase immersion-type heat dissipation device is provided. The two-phase immersion-type heat dissipation device includes a heat dissipation substrate and a plurality of reinforced fins. The heat dissipation substrate has a first surface and a second surface configured to be in contact with a heating element. The first surface is opposite to the second surface and is arranged away from the heating element. The plurality of reinforced fins are integrally formed on the first surface of the heat dissipation substrate, and a thickness of each of the plurality of reinforced fins is less than 1 mm. According to a scanning electron microscopy image of electron backscattered diffraction, a median of local misorientation distribution of the plurality of reinforced fins is greater than 1.6 times a median of local misorientation distribution of the heat dissipation substrate.