Abstract: The present invention relates to a three-dimensional package and a method of making the same. The method comprises: (a) providing a semiconductor body; (b) forming at least one blind hole in the semiconductor body; (c) forming an isolation layer on the side wall of the blind hole; (d) forming a conductive layer on the isolation layer; (e) patterning the conductive layer; (f) removing a part of the lower surface of the semiconductor body and a part of the isolation layer, so as to expose a part of the conductive layer; (g) forming a solder on the lower end of the conductive layer; (h) stacking a plurality of the semiconductor bodies, and performing a reflow process; and (i) cutting the stacked semiconductor bodies, so as to form a plurality of three-dimensional packages.

Abstract: The present invention relates to a three-dimensional package and a method of making the same. The three-dimensional package comprises a first wafer, at least one first hole, a first isolation layer, a first conductive layer, a first solder, a second wafer, at least one second hole, a second isolation layer, a second conductive layer, and a second solder. The first wafer has at least one first pad and a first protection layer exposing the first pad. The first hole penetrates the first wafer. The first isolation layer is disposed on the side wall of the first hole. The lower end of the first conductive layer extends below the surface of the first wafer. The first solder is disposed in the first hole, and is electrically connected to the first pad via the first conductive layer. The second wafer has at least one second pad and a second protection layer exposing the second pad. The second hole penetrates the second wafer. The second isolation layer is disposed on the side wall of the second hole.

Abstract: A packaging process including the following steps is provided. First, a first substrate and a second substrate are provided. The first substrate has first contacts, and the second substrate has second contacts. Next, the first substrate is placed on the second substrate, such that the first contacts are aligned with the second contacts. Then, the first substrate and the second substrate are submerged in a solution having BDMT. After that, the first substrate and the second substrate are removed from the solution, such that self-assembly mono-layers are formed between the first substrate and the second substrate, to electrically connect the first substrate and the second substrate. A package structure formed according to the above process is also provided.

Abstract: The present invention relates to a wafer level package and method for making the same. The method of the invention comprises: (a) providing a metal layer, the metal layer having a first surface and a second surface; (b) forming a plurality of first caves and a plurality of second caves on the first surface; (c) forming a cover in each first cave and around each first cave and forming a conductive portion in each second cave and around each second cave; (d) disposing a wafer onto the covers and the conductive portions; and (e) removing the metal layer. Whereby the process of the invention will be shortened and the cost will decrease. The method of invention provides the conductive portions used for convenient leads connecting with outer components and further decreases the size of the package.

Abstract: A wafer level package process includes: providing a device substrate, in which one surface of the device substrate includes a plurality of devices; providing a cap substrate and forming a plurality of cavities on one surface of the cap substrate, in which the location of each cavity is corresponding to the location of each device of the devices substrate; forming a protective cap in each cavity by utilizing the cavity as a mold; aligning each cavity of the cap substrate to each device of the device substrate and connecting the protective cap on the device substrate, such that each of the protective caps covers each device; and removing the cap substrate from the protective cap.

Abstract: A method of fabricating protective caps for protecting devices on wafer surface includes: (a) providing a non-metal cap substrate and forming a metal layer on the non-metal cap substrate; (b) forming a plurality of cavities on a surface of the metal layer, wherein the location of each cavity corresponds to each of the devices on the wafer surface; and (c) forming a protective cap in each cavity and forming a plurality of bonding media around the cavities.

Abstract: An input device has a body and a battery that is retained in the body. A receiver is coupled to a computer via a cable, with the body removably engaging the receiver. The computer delivers power through the cable and the receiver to charge the battery, while the input device simultaneously transmits operational signals to the receiver for further transmission to the computer.

Abstract: A light tunnel with a gradient filter layer includes a light tunnel body and a gradient filter layer. In this case, the gradient filter layer is disposed at a light emerging side. The transmission rate at the central area of the gradient filter layer is smaller than the transmission rate at the edge area of the gradient filter layer.

Abstract: In a personal digital assistant assembly, a coupling block disposed on an operating surface of a base module is rotatable about a pivot axle transverse to the operating surface. An elongated hinge unit interconnects pivotally a connecting end of a personal digital assistant and the coupling block such that the personal digital assistant is rotatable about a longitudinal axis parallel to the operating surface and transverse to the pivot axle and is movable to a desired angular position relative to the coupling block. The coupling block is movable between an expanded position, where the personal digital assistant uncovers a user input unit on the operating surface of the base module, and a closed position, where the personal digital assistant is capable of covering the user input unit.

Abstract: In a personal digital assistant assembly, a coupling block disposed on an operating surface of a base module is rotatable about a pivot axle transverse to the operating surface. An elongated hinge unit interconnects pivotally a connecting end of a personal digital assistant and the coupling block such that the personal digital assistant is rotatable about a longitudinal axis parallel to the operating surface and transverse to the pivot axle and is movable to a desired angular position relative to the coupling block. The coupling block is movable between an expanded position, where the personal digital assistant uncovers a user input unit on the operating surface of the base module, and a closed position, where the personal digital assistant is capable of covering the user input unit.

Abstract: A method and apparatus for molding a flip chip semiconductor device are disclosed herein. A substrate having at least one air hole is provided. A chip is mounted on the substrate by multiple solder balls such that the air hole is beneath the chip and surrounded by the multiple solder balls. The substrate mounted with the chip is placed in a mold apparatus which defines at least one air channel aligning with the air hole, such that air can be exhausted via the air hole and the air channel when encapsulation material is filling the mold apparatus.

Abstract: A packaging process providing a die with C4 solder bumps and a polymer substrate first. It then jets the melted second solder onto each of the C4 solder bumps forming a second solder bump. After reflowing and leveling the solder bumps, the die is flipped and combined with the substrate. Then heat treatment proceeds with the combination of the die and the substrate forming a flip chip package with collapse-controlled solder bump on the polymer substrate.

Abstract: A flip-chip semiconductor device and a method for under filling the flip-chip semiconductor device are disclosed. The flip-chip semiconductor device is provided with a substrate and a die having a plurality of solder bumps for connecting to the substrate. Encapsulation material is under filled between the die and the substrate. The substrate has a non-mask area defied in a center portion thereof while the remaining surface area is covered by a solder mask. The non-mask area defines a hole in the center thereof so that the encapsulation material can be dispensed along all sides of the die to flow toward the non-mask area and stop when reaching the non-mask area whereby the encapsulation material does not block the hole and air between said die and the substrate is limited in a void formed around the hole and communicated with the atmosphere via the hole.