Abstract: A real-world view display method applied to a video pass-through system, wherein the video pass-through system includes at least one grayscale camera, a color camera and at least one processor. The real-world view display method includes: by the at least one grayscale camera, capturing at least one grayscale image of a physical environment for generating a grayscale pass-through view corresponding to the physical environment; by the color camera, capturing at least one color image of the physical environment; and by the at least one processor, processing the grayscale pass-through view according to the at least one color image to render a color pass-through view in an immersive content, wherein the color pass-through view is corresponding to the physical environment.

Abstract: Provided are compounds having a ligand LA of Formula I that are useful as emissive compounds in organic light emitting devices.

Abstract: Provided are organometallic compounds comprising two moieties A and B which are each independently a monocyclic ring or a polycyclic fused ring structure, wherein the monocyclic ring or each ring of the polycyclic fused ring structure is independently a 5-membered to 10-membered carbocyclic or heterocyclic ring which are linked by a direct bond and which are further bridged by a linker comprising two groups which are each independently selected from the group consisting of O, S, Se, NR, BR, BRR?, PR, CR, C?O, C?NR, C?CRR?, C?S, CRR?, SO, SO2, P(O)R, SiRR?, and GeRR?. Also provided are formulations comprising these organometallic compounds. Further provided are organic light emitting devices (OLEDs) and related consumer products that utilize these organometallic compounds.

Abstract: In some embodiments, compound comprising a first ligand LA having a structure of Formula I, is provided. In Formula I, each of moiety A and moiety C is a monocyclic ring or a polycyclic fused ring system; T is Si or Ge; R1 and one RA substituent are joined to form a ring A?; each R1, RA, and RC is a hydrogen or a General Substituent defined herein; and LA is coordinated to a metal M selected from Ir, Rh, Re, Ru, Os, Pt, Pd, Ag, Au, and Cu. Formulations, OLEDs, and consumer products containing the compound are also provided.

Abstract: A setting method of in-memory computing simulator is presented. It involves an in-memory computing device performing various test combinations of neural network models and datasets, recording the corresponding first estimation indices. A processing device then uses these test combinations to execute a simulator with adjustable settings and records the corresponding second estimation indices. The processing device calculates a correlation sum according to the first estimation indices and second estimation indices, and performs an optimal algorithm to search an optimal parameter in a setting space to maximize the correlation sum.

Abstract: A semiconductor package includes a package substrate having a top surface and an opposing bottom surface. The package substrate includes a top build-up wiring layer and an upper dielectric layer covering the top build-up wiring layer. A semiconductor device and a passive component are mounted on the top surface of the package substrate in a side-by-side manner. A molding compound encapsulates the semiconductor device and the passive component on the top surface of the package substrate. A cavity is disposed between the passive component and the top surface of the package substrate.

Abstract: A federated learning method of protecting data digest includes: sending a general model to multiple clients by a moderator, generating encoded features according to raw data and training by each client, the training includes: updating the general model to generate a client model, selecting at least two encoded features and at least two labels to compute a feature weighted sum and a label weighted sum, sending a digest and update parameters of the client model to the moderator, where the digest includes a sum of the feature weighted sum and a noise and the label weighted sum, and performing the following steps by the moderator: determining an absent client and a present client, generating a replacement model according to the general model and the absent client, generating an aggregation model according to the available client and the replacement model, and training the aggregation model to update the general model.

Abstract: A system for verifying edited image includes: a producer terminal device configured to tile a source image for a plurality of smaller tiled images with individual source image hash values to accordingly calculate an integrated source image hash value, and to execute digitally signing to generate an image tag pair; an editor terminal device configured to receive the image tag pair, to divide the source image into these smaller tiled images according to a tile configuration, to edit part of the smaller tiled images, to include the rest part of these smaller tiled images to generate an edited integral image and further calculate an integrated edit image hash value, and to execute digitally signing to generate a zero-knowledge proof (ZKP) assurance; and, a user terminal device configured to receive the ZKP assurance to accordingly verify whether or not the edited integral image is generated by editing the source image.

Abstract: An electronic device and a temperature detection device thereof are provided. The temperature detection device includes a differential stage circuit and an output stage circuit. The differential stage circuit includes a first differential end and a second differential end, and includes a cross-coupled transistor element, a first resistor and a second transistor. The cross-coupled transistor element receives a first voltage. The first resistor is coupled between the first differential end and a second voltage, and the first resistor is poly-silicon resistor. The second resistor is coupled between the second differential end and the second voltage, and the second resistor is a silicon carbide diffusion resistor. The output stage circuit generates a driving voltage according to a first control voltage on the first differential end and a second control voltage on the second differential end.

Abstract: A short-circuit protection circuitry is adapted for a power transistor. The short-circuit protection circuitry includes a first diode, a first resistor, a voltage dividing circuit, a gate voltage generator, a pull-down circuit, and a control signal generator. The first diode is coupled to a drain of the power transistor. The first resistor is coupled between the first diode and the power transistor. The voltage dividing circuit is coupled between a gate and a source of the power transistor to generate a dividing voltage. The gate voltage generator provides a gate voltage to the gate of the power transistor according to a first driving signal and a second driving signal. The pull-down circuit pulls down the gate voltage according to a control signal. The control signal generator generates the control signal according to the first driving signal, a voltage on the anode of the first diode and the dividing voltage.

Abstract: A compound comprising a first ligand LA comprising a structure of Formula I, is provided. In Formula I: moieties A and B are each a monocyclic ring or a polycyclic fused-ring system; each of Y1, Y2, Y3, and Y4 is independently a divalent, single atom long linker; each of L1 and L2 is independently a direct bond or a divalent, one atom ling linker; each RA, RB, or other substituent is hydrogen or a General Substituent defined herein; any two substituents may be joined or fused to form a ring; LA may be monodentate, bidentate, tridentate, tetradentate, pentadentate, or hexadentate; and LA is coordinated to a metal M and may be coordinated to other ligands. Formulations, OLEDs, and consumer products containing the compounds are also provided.

Abstract: A merged PiN Schottky (MPS) diode includes a substrate, a first epitaxial layer of a first conductivity type, doped regions of a second conductivity type, a second epitaxial layer of the first conductivity type, and a Schottky metal layer. The first epitaxial layer is disposed on the first surface of the substrate. The doped regions are disposed in a surface of the first epitaxial layer, wherein the doped regions consist of first portions and second portions, the first portions are electrically floating, and the second portions are electrically connected to a top metal. The second epitaxial layer is disposed on the surface of the first epitaxial layer, wherein trenches are formed in the second epitaxial layer to expose the second portions of the doped regions. The Schottky metal layer is conformally deposited on the second epitaxial layer and the exposed second portions of the doped regions.

Abstract: A wide-band gap semiconductor device and a method of manufacturing the same are provided. The wide-band gap semiconductor device of the disclosure includes a substrate, an epitaxial layer, an array of merged PN junction Schottky (MPS) diode, and an edge termination area surrounding the array of MPS diode. The epitaxial layer includes a first plane, a second plane, and trenches between the first plane and the second plane. The array of MPS diode is formed in the first plane of the epitaxial layer. The edge termination area includes a floating ring region having floating rings formed in the second plane of the epitaxial layer, and a transition region between the floating ring region and the array of MPS diode. The transition region includes a PIN diode formed in the plurality of trenches and on the epitaxial layer between the trenches.

Abstract: A merged PiN Schottky (MPS) diode includes a substrate, a first epitaxial layer of a first conductivity type, doped regions of a second conductivity type, a second epitaxial layer of the first conductivity type, and a Schottky metal layer. The first epitaxial layer is disposed on the first surface of the substrate. The doped regions are disposed in a surface of the first epitaxial layer, wherein the doped regions consist of first portions and second portions, the first portions are electrically floating, and the second portions are electrically connected to a top metal. The second epitaxial layer is disposed on the surface of the first epitaxial layer, wherein trenches are formed in the second epitaxial layer to expose the second portions of the doped regions. The Schottky metal layer is conformally deposited on the second epitaxial layer and the exposed second portions of the doped regions.

Abstract: A wide-band gap semiconductor device and a method of manufacturing the same are provided. The wide-band gap semiconductor device of the disclosure includes a substrate, an epitaxial layer, an array of merged PN junction Schottky (MPS) diode, and an edge termination area surrounding the array of MPS diode. The epitaxial layer includes a first plane, a second plane, and trenches between the first plane and the second plane. The array of MPS diode is formed in the first plane of the epitaxial layer. The edge termination area includes a floating ring region having floating rings formed in the second plane of the epitaxial layer, and a transition region between the floating ring region and the array of MPS diode. The transition region includes a PIN diode formed in the plurality of trenches and on the epitaxial layer between the trenches.

Abstract: An electronic device and a temperature detection device thereof are provided. The temperature detection device includes a differential stage circuit and an output stage circuit. The differential stage circuit includes a first differential end and a second differential end, and includes a cross-coupled transistor element, a first resistor and a second transistor. The cross-coupled transistor element receives a first voltage. The first resistor is coupled between the first differential end and a second voltage, and the first resistor is poly-silicon resistor. The second resistor is coupled between the second differential end and the second voltage, and the second resistor is a silicon carbide diffusion resistor. The output stage circuit generates a driving voltage according to a first control voltage on the first differential end and a second control voltage on the second differential end.

Abstract: A driving voltage generating device includes a temperature detector, a controlling circuitry, a voltage generator, and an output stage circuitry. The temperature detector is coupled to a control terminal of a power transistor and is configured to generate temperature detection information by detecting an ambient temperature. The controlling circuitry is coupled to the temperature detector and generates an activation signal by determining whether the ambient temperature is abnormal according to the temperature detection information. The voltage generator generates an operation power according to the activation signal. The output stage circuitry is coupled to the voltage generator, generates a driving voltage according to the operation power, and provides the driving voltage to the control terminal of the power transistor.

Abstract: A temperature sensing device includes a resistor string and a control circuitry. The resistor string includes a variable resistor, a first resistor, and a second resistor which are coupled in series with each other. The resistor string is coupled between a sensing end and a reference ground voltage. The first resistor and the second resistor are coupled to a monitoring end to provide a monitoring voltage. The control circuitry compares the monitoring voltage with a plurality of reference voltages to generate sensing temperature information, and generate adjustment information according to the sensing temperature information. The control circuitry adjusts a resistance provided by the variable resistor according to the adjustment information. The first resistor is a polysilicon resistor, and the second resistor is a silicon carbide diffusion resistor.

Abstract: An electronic device and a temperature detection device thereof are provided. The temperature detection device includes a first resistor, a second resistor, and an operation circuit. The first resistor and the second resistor are coupled in series between a detection end and a first voltage. The first resistor and the second resistor divide a detection voltage on the detection end to generate a monitoring voltage. The operation circuit compares the monitoring voltage with a plurality of reference voltages to generate a plurality of comparison results. The operation circuit performs an operation on the comparison results to generate detection temperature information. The first resistor is a poly-silicon resistor and the second resistor is a silicon carbon (SiC) diffusion resistor.

Abstract: A silicon carbide semiconductor power transistor includes a silicon carbide substrate, a first drift layer, a second drift layer on the substrate with V-grooves, buried doped regions in the first drift layer below the V-grooves, gates in the V-grooves, a gate insulation layer, a delta doping layer, a well region, source regions, well pick-up regions, conductive trenches, and doping portions. Each of the buried doped regions is a predetermined distance from a bottom of each of the V-grooves. The delta doping layer is disposed in the second drift layer, and the V-grooves are across the delta doping layer. The conductive trenches are disposed in the second drift layer, and each of the conductive trenches passes through the well pick-up regions and contacts with the well region. The doping portions are respectively on sidewalls of the conductive trenches in the well region.