Patents by Inventor Wei-Fan Chen
Wei-Fan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230326972Abstract: A silicon carbide semiconductor power transistor and a method of manufacturing the same. The silicon carbide semiconductor power transistor of the disclosure includes a substrate made of silicon carbide (SiC), a drift layer disposed on the substrate, a gate layer formed on the drift layer, a plurality of first and second well pick-up regions disposed in the drift layer, a plurality of source electrodes, and a plurality of contacts. A plurality of V-grooves is formed in the drift layer. A first opening is formed in the gate layer at a bottom of each of the V-grooves, and a second opening is formed in the gate layer at a top of the drift layer between the V-grooves. The plurality of contacts is disposed inside the second opening to be in direct contact with the second well pick-up regions.Type: ApplicationFiled: April 6, 2022Publication date: October 12, 2023Applicant: LEAP Semiconductor Corp.Inventors: Wei-Fan Chen, Kuo-Chi Tsai
-
Publication number: 20230317861Abstract: A merged PiN Schottky (MPS) diode includes a substrate, a first epitaxial layer of a first conductivity type, doped regions of a second conductivity type, a second epitaxial layer of the first conductivity type, and a Schottky metal layer. The first epitaxial layer is disposed on the first surface of the substrate. The doped regions are disposed in a surface of the first epitaxial layer, wherein the doped regions consist of first portions and second portions, the first portions are electrically floating, and the second portions are electrically connected to a top metal. The second epitaxial layer is disposed on the surface of the first epitaxial layer, wherein trenches are formed in the second epitaxial layer to expose the second portions of the doped regions. The Schottky metal layer is conformally deposited on the second epitaxial layer and the exposed second portions of the doped regions.Type: ApplicationFiled: March 31, 2022Publication date: October 5, 2023Applicant: LEAP Semiconductor Corp.Inventors: Wei-Fan Chen, Kuo-Chi Tsai
-
Publication number: 20230291982Abstract: A real-world view display method applied to a video pass-through system, wherein the video pass-through system includes at least one grayscale camera, a color camera and at least one processor. The real-world view display method includes: by the at least one grayscale camera, capturing at least one grayscale image of a physical environment for generating a grayscale pass-through view corresponding to the physical environment; by the color camera, capturing at least one color image of the physical environment; and by the at least one processor, processing the grayscale pass-through view according to the at least one color image to render a color pass-through view in an immersive content, wherein the color pass-through view is corresponding to the physical environment.Type: ApplicationFiled: January 5, 2023Publication date: September 14, 2023Inventor: Wei-Fan CHEN
-
Publication number: 20230261119Abstract: A wide-band gap semiconductor device and a method of manufacturing the same are provided. The wide-band gap semiconductor device of the disclosure includes a substrate, an epitaxial layer, an array of merged PN junction Schottky (MPS) diode, and an edge termination area surrounding the array of MPS diode. The epitaxial layer includes a first plane, a second plane, and trenches between the first plane and the second plane. The array of MPS diode is formed in the first plane of the epitaxial layer. The edge termination area includes a floating ring region having floating rings formed in the second plane of the epitaxial layer, and a transition region between the floating ring region and the array of MPS diode. The transition region includes a PIN diode formed in the plurality of trenches and on the epitaxial layer between the trenches.Type: ApplicationFiled: February 16, 2022Publication date: August 17, 2023Applicant: LEAP Semiconductor Corp.Inventors: Wei-Fan Chen, Kuo-Chi Tsai
-
Patent number: 11656604Abstract: Provided is a cutting speed planning system including a graphic preprocessing engine, a first speed planning engine, an included angle calculation engine, a second speed planning engine and a speed determination engine. The graphic preprocessing engine substitutes a simplified cutting route for a plurality of short straight paths of a graphic path. The first speed planning engine calculates a reasonable maximum cutting speed of each cutting route. The included angle calculation engine calculates the included angle between two adjacent ones of the cutting routes. The second speed planning engine adjusts the terminal cutting speed and the initial cutting speed of the cutting routes. The speed determination engine performs speed planning on the cutting routes according to digital control system period time. A cutting speed planning method and a non-transitory storage medium are further provided.Type: GrantFiled: April 8, 2022Date of Patent: May 23, 2023Assignee: ADLINK TECHNOLOGY INC.Inventors: Wei-Li Chuang, Wei-Fan Chen, Yu-Yen Chen
-
Patent number: 11393547Abstract: An one-time programmable memory cell includes: an upper electrode; an insulating layer beneath the upper electrode; and a lower electrode with electrical field enhancement structure beneath the insulating layer, wherein the electrical field enhancement structure has a least one tip portion. The one-time programmable memory cell also includes a shallow trench isolation region, disposed adjacent to the insulating layer and the lower electrode, wherein the electrical field enhancement structure is surrounded by the shallow trench isolation region and the upper electrode partially covers the shallow trench isolation region.Type: GrantFiled: September 4, 2020Date of Patent: July 19, 2022Assignee: Piecemakers Technology, Inc.Inventors: Wei-Fan Chen, Chun-Peng Wu
-
Publication number: 20210158881Abstract: An one-time programmable memory cell includes: an upper electrode; an insulating layer beneath the upper electrode; and a lower electrode with electrical field enhancement structure beneath the insulating layer, wherein the electrical field enhancement structure has a least one tip portion. The one-time programmable memory cell also includes a shallow trench isolation region, disposed adjacent to the insulating layer and the lower electrode, wherein the electrical field enhancement structure is surrounded by the shallow trench isolation region and the upper electrode partially covers the shallow trench isolation region.Type: ApplicationFiled: September 4, 2020Publication date: May 27, 2021Inventors: Wei-Fan Chen, Chun-Peng Wu
-
Publication number: 20200294782Abstract: A reaction gas supply equipment of an inductive coupled plasma mass spectrometer comprises an ammonia supply end and a helium supply end and a reaction gas supply equipment, which is supplied with an ammonia supply end and a helium supply end, and the reaction gas supply equipment is provided with an ammonia mass flow meter to adjust the flow of ammonia and helium mass flow meter to adjust the flow of helium; the ammonia mass flow meter and helium mass flow meter are adjusted by the proportion of reaction gas specified by the inductive coupled plasma spectrometer, and ammonia gas is mixed with helium gas to form reaction gas, which is then provided to the inductive coupled plasma mass spectrometer; through the technical means of the prevent invention, several advantages such as the protection of detection instrument and the reduction of cost of reaction gas can be achieved.Type: ApplicationFiled: September 30, 2019Publication date: September 17, 2020Inventor: Wei Fan Chen
-
Patent number: 10495459Abstract: An apparatus for producing 3D point-cloud model of physical objects includes a rotatable platform (11), multiple patterns asymmetrically arranged on the rotatable platform (11), a background curtain (13), and an image capturing unit (12) arranged facing toward the background curtain (13). A producing method includes: placing an object (2) to be scanned on the rotatable platform (11); setting a capturing amount during one-time rotation operation; controlling the rotatable platform (11) to perform the rotation operation, and controlling the image capturing unit (12) to capture corresponding images during the rotation operation according to the capturing amount, wherein each image includes the entire object (2) and multiple of the patterns, and records corresponding global coordinates; and, performing matching on multiple features of each of the images, and constructing a 3D point-cloud model of the object (2) according to a matching result of the features and the global coordinates of each of the images.Type: GrantFiled: January 3, 2018Date of Patent: December 3, 2019Assignees: XYZPRINTING, INC., KINPO ELECTRONICS, INC.Inventors: Wei-Fan Chen, Waqar Shahid Qureshi
-
Publication number: 20190128670Abstract: An apparatus for producing 3D point-cloud model of physical objects includes a rotatable platform (11), multiple patterns asymmetrically arranged on the rotatable platform (11), a background curtain (13), and an image capturing unit (12) arranged facing toward the background curtain (13). A producing method includes: placing an object (2) to be scanned on the rotatable platform (11); setting a capturing amount during one-time rotation operation; controlling the rotatable platform (11) to perform the rotation operation, and controlling the image capturing unit (12) to capture corresponding images during the rotation operation according to the capturing amount, wherein each image includes the entire object (2) and multiple of the patterns, and records corresponding global coordinates; and, performing matching on multiple features of each of the images, and constructing a 3D point-cloud model of the object (2) according to a matching result of the features and the global coordinates of each of the images.Type: ApplicationFiled: January 3, 2018Publication date: May 2, 2019Inventors: Wei-Fan Chen, Waqar Shahid Qureshi
-
Publication number: 20170200159Abstract: A secure payment device having first and second modes is provided. In the second mode, a payment procedure is activated to receive data of a payment member for a secure payment. The secure payment device includes a touch screen group, a payment unit, a central processing unit and a secure microprocessor unit. The touch screen group displays an operation interface and a secure payment interface. In the first mode, the operation interface receives a first operation instruction via the operation interface. In the second mode, the secure payment interface obtains the data of the payment member by the payment unit, receive the second operation instruction via the secure payment interface, and activate the payment function based on a comparing result of the authentication information and the data of the payment member. A secure payment method for the aforementioned secure payment device is also provided.Type: ApplicationFiled: January 3, 2017Publication date: July 13, 2017Inventors: Shih-Cheng Chou, Chih-Hou Wang, Wei-Fan Chen, Hsing-Ju Chen
-
Publication number: 20170132912Abstract: Disclosed is an electric device control system comprising an electric device control system and an intelligent remote control. Each electric device is electrically connected to a light sensing device, wherein the electric device is controlled by the light sensing device. The intelligent remote control comprises a light transmitter, a first wireless communication unit and a first controller. The light transmitter provides a high energy level visible light beam to a light sensing device, to make the light sensing device provide a wireless identification signal. The first wireless communication unit receives the wireless identification signal. The first controller is electrically connected to the first wireless communication unit. The first controller controls a coding set to switch according to the wireless identification signal, and controls the first wireless communication unit according to the coding set to output a wireless control signal to the light sensing device for controlling the electric device.Type: ApplicationFiled: November 30, 2015Publication date: May 11, 2017Inventors: TE-SAN LIAO, HSIAO-HUNG LIN, WEI-FAN CHEN
-
Patent number: 9438034Abstract: The invention provides a voltage regulator including a transient voltage suppressor. The transient voltage suppressor includes N first transistors and N semiconductor units. The N first transistors are coupled between a reference ground and N pads respectively, and the N transistors are controlled by a voltage on a reference power line. The N semiconductor units are coupled between the reference ground and the N pads respectively, or coupled between the reference power line and the N pads respectively. N is a positive integer.Type: GrantFiled: January 15, 2014Date of Patent: September 6, 2016Assignee: NANYA TECHNOLOGY CORPORATIONInventor: Wei-Fan Chen
-
Patent number: 9123557Abstract: The present disclosure provides a rectifier. The rectifier includes a N-type epitaxial layer, a plurality of P-type diffusion regions and a plurality of N-type diffusion regions. The P-type diffusion regions are disposed in the N-type epitaxial layer, and the N-type diffusion regions are respectively disposed in the P-type diffusion regions. Wherein, the P-type diffusion regions are electronically coupled to the N-type diffusion regions.Type: GrantFiled: November 8, 2013Date of Patent: September 1, 2015Assignee: SUMPRO ELECTRONICS CORPORATIONInventor: Wei-Fan Chen
-
Publication number: 20150200539Abstract: The invention provides a voltage regulator including a transient voltage suppressor. The transient voltage suppressor includes N first transistors and N semiconductor units. The N first transistors are coupled between a reference ground and N pads respectively, and the N transistors are controlled by a voltage on a reference power line. The N semiconductor units are coupled between the reference ground and the N pads respectively, or coupled between the reference power line and the N pads respectively. N is a positive integer.Type: ApplicationFiled: January 15, 2014Publication date: July 16, 2015Applicant: SUMPRO ELECTRONICS CORPORATIONInventor: Wei-Fan Chen
-
Publication number: 20150130014Abstract: The present disclosure provides a rectifier. The rectifier includes a N-type epitaxial layer, a plurality of P-type diffusion regions and a plurality of N-type diffusion regions. The P-type diffusion regions are disposed in the N-type epitaxial layer, and the N-type diffusion regions are respectively disposed in the P-type diffusion regions. Wherein, the P-type diffusion regions are electronically coupled to the N-type diffusion regions.Type: ApplicationFiled: November 8, 2013Publication date: May 14, 2015Applicant: SUMPRO ELECTRONICS CORPORATIONInventor: Wei-Fan Chen
-
Publication number: 20150104114Abstract: The present invention relates to photo processing. Disclosed is a method for processing photos from multiple sources and its apparatus. In the present invention, the method of processing photos from multiple sources include: obtaining photo files from at least two sources; for the obtained photo files, merging the photo files originating from the same primitive photo into one photo object for post-processing in the unit of photo objects, each photo object contains pointer(s) to the photo file(s) corresponding with the photo object. In the present invention, while substantial contents of photo files from different sources are identical, the photo files are merged into one photo object, then users can operate in the unit of photo objects, a system automatically processes respective files of the photo objects according to different operation types, and users do not need to care about the detail of the level of the photo files, such as the sources of the photo files etc., which simplifies the user operations.Type: ApplicationFiled: October 14, 2014Publication date: April 16, 2015Inventors: Tian BAI, Yue ZHUGE, Wen-Liang XIAO, Peng QIN, Xiao-Bin ZHANG, Wei-Fan CHEN
-
Patent number: 8981426Abstract: The invention discloses an ESD protection circuit, including a P-type substrate; an N-well formed on the P-type substrate; a P-doped region formed on the N-well, wherein the P-doped region is electrically connected to an input/output terminal of a circuit under protection; a first N-doped region formed on the P-type substrate, the first N-doped region is electrically connected to a first node, and the P-doped region, the N-well, the P-type substrate, and the first N-doped region constitute a silicon controlled rectifier; and a second N-doped region formed on the N-well and electrically connected to a second node, wherein a part of the P-doped region and the second N-doped region constitute a discharging path, and when an ESD event occurs at the input/output terminal, the silicon controlled rectifier and the discharging path bypass electrostatic charges to the first and second nodes respectively.Type: GrantFiled: November 1, 2013Date of Patent: March 17, 2015Assignee: Nanya Technology CorporationInventor: Wei-Fan Chen
-
Publication number: 20140054643Abstract: The invention discloses an ESD protection circuit, including a P-type substrate; an N-well formed on the P-type substrate; a P-doped region formed on the N-well, wherein the P-doped region is electrically connected to an input/output terminal of a circuit under protection; a first N-doped region formed on the P-type substrate, the first N-doped region is electrically connected to a first node, and the P-doped region, the N-well, the P-type substrate, and the first N-doped region constitute a silicon controlled rectifier; and a second N-doped region formed on the N-well and electrically connected to a second node, wherein a part of the P-doped region and the second N-doped region constitute a discharging path, and when an ESD event occurs at the input/output terminal, the silicon controlled rectifier and the discharging path bypass electrostatic charges to the first and second nodes respectively.Type: ApplicationFiled: November 1, 2013Publication date: February 27, 2014Applicant: Nanya Technology Corp.Inventor: Wei-Fan Chen
-
Patent number: 8610169Abstract: The invention discloses an ESD protection circuit, comprising a P-type substrate; an N-well formed on the P-type substrate; a P-doped region formed on the N-well, wherein the P-doped region is electrically connected to an input/output terminal of a circuit under protection; a first N-doped region formed on the P-type substrate, the first N-doped region is electrically connected to a first node, and the P-doped region, the N-well, the P-type substrate, and the first N-doped region constitute a silicon controlled rectifier; and a second N-doped region formed on the N-well and electrically connected to a second node, wherein a part of the P-doped region and the second N-doped region constitute a discharging path, and when an ESD event occurs at the input/output terminal, the silicon controlled rectifier and the discharging path bypass electrostatic charges to the first and second nodes respectively.Type: GrantFiled: May 21, 2012Date of Patent: December 17, 2013Assignee: Nanya Technology CorporationInventor: Wei-Fan Chen