Patents by Inventor Wei-Hao Huang

Wei-Hao Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230006041
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a plurality of nanowires. The substrate has an upper surface. The nanowires are stacked on the upper surface of the substrate along a first direction. The nanowires include a triangle in a cross section, and the nanowires include a plane extending along a second direction, a first down-slant facet on a (111) plane, and a second down-slant facet on an additional (111) plane.
    Type: Application
    Filed: July 27, 2021
    Publication date: January 5, 2023
    Inventors: Jing-Wen HUANG, Wei-Hao HUANG, Chung-Yi CHIU, Lung-En KUO, Kun-Yuan LIAO
  • Publication number: 20220382023
    Abstract: An optical lens system includes, in order from a magnified side to a minified side, a first lens group of positive refractive power and a second lens group of positive refractive power. The first lens group includes a first lens and a second lens, and the second lens group includes a third lens and a fourth lens. One of the third lens and the fourth lens includes one aspheric surface, and each of the lenses in the optical lens system is a singlet lens. The optical lens satisfies a condition of TE(?=400)>94%, where TE(?=400) denotes an overall transmittance of all of the lenses in the optical lens system measured at a wavelength of 400 nm.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Hung-You CHENG, Yu-Hung CHOU, Ching-Lung LAI, Yi-Hua LIN, Wei-Hao HUANG
  • Publication number: 20220384200
    Abstract: A method of cutting fins includes the following steps. A photomask including a snake-shape pattern is provided. A photoresist layer is formed over fins on a substrate. A photoresist pattern in the photoresist layer corresponding to the snake-shape pattern is formed by exposing and developing. The fins are cut by transferring the photoresist pattern and etching cut parts of the fins.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 1, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Hao Huang, Chun-Lung Chen, Kun-Yuan Liao, Lung-En Kuo, Chia-Wei Hsu
  • Patent number: 11462441
    Abstract: A method for fabricating a semiconductor device includes the steps of first forming a fin-shaped structure on a substrate, forming a dielectric layer surrounding the fin-shaped structure, performing an anneal process to transform the dielectric layer into a shallow trench isolation (STI), removing the fin-shaped structure to form a trench, and forming a stack structure in the trench. Preferably, the stack structure includes a first semiconductor layer on the fin-shaped structure and a second semiconductor layer on the first semiconductor layer and the first semiconductor layer and the second semiconductor layer include different materials.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: October 4, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shih-Wei Su, Hao-Che Feng, Hsuan-Tai Hsu, Chun-Yu Chen, Wei-Hao Huang, Bin-Siang Tsai, Ting-An Chien
  • Patent number: 11448859
    Abstract: An optical lens system using ultraviolet for imaging includes, in order from a magnified side to a minified side, a first lens group of positive refractive power and a second lens group of positive refractive power. The second lens group includes at least one cemented lens and at least one aspheric lens. The optical lens system satisfies the condition of TE(?=400)>94%, where TE(?=400) denotes an overall transmittance of all of the lenses in the optical lens system measured at a wavelength of 400 nm and is equal to a product of respective internal transmittances of all of the lenses measured at a wavelength of 400 nm.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: September 20, 2022
    Assignee: YOUNG OPTICS INC.
    Inventors: Hung-You Cheng, Yu-Hung Chou, Ching-Lung Lai, Yi-Hua Lin, Wei-Hao Huang
  • Publication number: 20220189770
    Abstract: A method for fabricating a semiconductor device includes the steps of first forming a fin-shaped structure on a substrate, forming a dielectric layer surrounding the fin-shaped structure, performing an anneal process to transform the dielectric layer into a shallow trench isolation (STI), removing the fin-shaped structure to form a trench, and forming a stack structure in the trench. Preferably, the stack structure includes a first semiconductor layer on the fin-shaped structure and a second semiconductor layer on the first semiconductor layer and the first semiconductor layer and the second semiconductor layer include different materials.
    Type: Application
    Filed: January 13, 2021
    Publication date: June 16, 2022
    Inventors: Shih-Wei Su, Hao-Che Feng, Hsuan-Tai Hsu, Chun-Yu Chen, Wei-Hao Huang, Bin-Siang Tsai, Ting-An Chien
  • Publication number: 20220171169
    Abstract: A projection optical system, comprising: an image source; a lens group; a reflector; an image and an aperture, the lens group and the reflector form multiple optical paths between the image and image source, each optical path has a chief ray and a marginal ray, the chief ray of one of the optical paths forms a chief ray of a paraxial image height at the part where image source be near to the optical axis, the chief ray of another one of the optical paths forms a marginal ray of an off-axis image height at the part where image source be far from the optical axis; whereby forming a first point and a second point, the first point located at the origin and the second point is located in the first quadrant, and forming a third point and a fourth point, the third point located at the fourth quadrant and the fourth point is located in the second quadrant.
    Type: Application
    Filed: November 30, 2020
    Publication date: June 2, 2022
    Inventors: SHENG-CHE WU, YU-HUNG CHOU, WEI-HAO HUANG
  • Publication number: 20220085283
    Abstract: A method for fabricating semiconductor device includes first forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, performing an atomic layer deposition (ALD) process or a high-density plasma (HDP) process to form a passivation layer on the first MTJ and the second MTJ, performing an etching process to remove the passivation layer adjacent to the first MTJ and the second MTJ, and then forming an ultra low-k (ULK) dielectric layer on the passivation layer.
    Type: Application
    Filed: November 22, 2021
    Publication date: March 17, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Publication number: 20220052199
    Abstract: The invention provides a fin structure for a fin field effect transistor, including a substrate. The substrate includes a plurality of silicon fins, wherein a top of each one of the silicon fins is a round-like shape in a cross-section view. An isolation layer is disposed on the substrate between the silicon fins at a lower portion of the silicon fins while an upper portion of the silicon fins is exposed. A stress buffer layer is disposed on a sidewall of the silicon fins between the isolation layer and the lower portion of the silicon fins. The stress buffer layer includes a nitride portion.
    Type: Application
    Filed: August 12, 2020
    Publication date: February 17, 2022
    Applicant: United Microelectronics Corp.
    Inventors: Hao Che Feng, Hung Jen Huang, Hsin Min Han, Shih-Wei Su, Ming Shu Chiu, Pi-Hung Chuang, Wei-Hao Huang, Shao-Wei Wang, Ping Wei Huang
  • Publication number: 20210151666
    Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a passivation layer on the first MTJ and the second MTJ, and an ultra low-k (ULK) dielectric layer on the passivation layer. Preferably, a top surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the passivation layer directly on top of the first MTJ.
    Type: Application
    Filed: January 4, 2021
    Publication date: May 20, 2021
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 10998428
    Abstract: Examples of an integrated circuit and a method for forming the integrated circuit are provided herein. In some examples, a method includes receiving a substrate that includes: a plurality of fins extending above a remainder of the substrate; a first region that includes a first fence region that contains a first subset of the plurality of fins; and a second region that includes a second fence region that contains a second subset of the plurality of fins. The first region has a first performance characteristic, and the second region has a second performance characteristic that is different from the first. Based on the first performance characteristic, the first subset of the plurality of fins is recessed to a first height, and based on the second performance characteristic, the second subset of the plurality of fins is recessed to a second height that is less than the first height.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: May 4, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Che-Cheng Chang, Chih-Han Lin, Wei-Chiang Hung, Wei-Hao Huang
  • Publication number: 20210119115
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Application
    Filed: December 27, 2020
    Publication date: April 22, 2021
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 10916694
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: February 9, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 10854520
    Abstract: The present invention provides a method for forming a semiconductor structure. The method including: Firstly, a substrate is provided, a first region and a second region are defined thereon, next, a gate dielectric layer and a work function metal layer are sequentially formed on the substrate within the first region and within the second region. Afterwards, a dielectric layer is formed on the work function metal layer within the second region, a hydrogen gas treatment is then performed on the substrate, and the work function metal layer is removed within the first region.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: December 1, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Chun-Hsien Lin, Wei-Hao Huang, Kai-Teng Cheng
  • Publication number: 20200218038
    Abstract: An optical lens system using ultraviolet for imaging includes, in order from a magnified side to a minified side, a first lens group of positive refractive power and a second lens group of positive refractive power. The second lens group includes at least one cemented lens and at least one aspheric lens. The optical lens system satisfies the condition of TE(?=400)>94%, where TE(?=400) denotes an overall transmittance of all of the lenses in the optical lens system measured at a wavelength of 400 nm and is equal to a product of respective internal transmittances of all of the lenses measured at a wavelength of 400 nm.
    Type: Application
    Filed: March 17, 2020
    Publication date: July 9, 2020
    Inventors: Hung-You CHENG, Yu-Hung CHOU, Ching-Lung LAI, Yi-Hua LIN, Wei-Hao HUANG
  • Publication number: 20200212290
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Application
    Filed: January 23, 2019
    Publication date: July 2, 2020
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 10656397
    Abstract: An optical lens system includes, in order from a magnified side to a minified side, a first lens group and a second lens group. The first lens group of negative refractive power has at least one aspheric surface, and the second lens group of positive refractive power has at least one aspheric surface. Each of the lenses in the optical lens system is a singlet lens, and the condition: TE(?=365)>70% is satisfied, where TE(?=365) denotes an overall transmittance of all of the lenses in the optical lens system measured at a wavelength of 365 nm.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: May 19, 2020
    Assignee: YOUNG OPTICS INC.
    Inventors: Hung-You Cheng, Yu-Hung Chou, Ching-Lung Lai, Yi-Hua Lin, Wei-Hao Huang
  • Publication number: 20200013881
    Abstract: Examples of an integrated circuit and a method for forming the integrated circuit are provided herein. In some examples, a method includes receiving a substrate that includes: a plurality of fins extending above a remainder of the substrate; a first region that includes a first fence region that contains a first subset of the plurality of fins; and a second region that includes a second fence region that contains a second subset of the plurality of fins. The first region has a first performance characteristic, and the second region has a second performance characteristic that is different from the first. Based on the first performance characteristic, the first subset of the plurality of fins is recessed to a first height, and based on the second performance characteristic, the second subset of the plurality of fins is recessed to a second height that is less than the first height.
    Type: Application
    Filed: August 26, 2019
    Publication date: January 9, 2020
    Inventors: Che-Cheng Chang, Chih-Han Lin, Wei-Chiang Hung, Wei-Hao Huang
  • Patent number: 10520709
    Abstract: A projection system includes a long-focus lens that is able to generate an image independently with a focal length between 70-300 mm, a short-focus lens that is able to generate an image independently with a focal length between 3-8 mm and shares an optical axis with the long-focus lens and at least one reflector to reflect the optical axis for direction change. When the long-focus lens generates an image, the short-focus lens then generates the image to a pre-determined position thereby.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: December 31, 2019
    Assignees: Sun Yang Optics Development Co., Ltd., Shenzhen Anhua Optoelectronics Technology Co., Ltd.
    Inventors: Sheng-Che Wu, Yu-Hung Chou, Wei-Hao Huang
  • Publication number: 20190279909
    Abstract: The present invention provides a method for forming a semiconductor structure. The method including: Firstly, a substrate is provided, a first region and a second region are defined thereon, next, a gate dielectric layer and a work function metal layer are sequentially formed on the substrate within the first region and within the second region. Afterwards, a dielectric layer is formed on the work function metal layer within the second region, a hydrogen gas treatment is then performed on the substrate, and the work function metal layer is removed within the first region.
    Type: Application
    Filed: May 20, 2019
    Publication date: September 12, 2019
    Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Chun-Hsien Lin, Wei-Hao Huang, Kai-Teng Cheng