Patents by Inventor Wei Hua

Wei Hua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968800
    Abstract: A centrifugal heat dissipation fan including a housing and an impeller is provided. The housing has at least one inlet disposed along an axis and at least one first outlet and a second outlet located in different radial directions, wherein the first outlet and the second outlet are opposite to and separated from each other. The impeller is disposed in the housing along the axis. A heat dissipation system of an electronic device is also provided.
    Type: Grant
    Filed: May 23, 2023
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Kuang-Hua Lin, Sheng-Yan Chen
  • Patent number: 11967563
    Abstract: A Fan-Out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Fu Lin, Chen-Hua Yu, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen
  • Publication number: 20240119919
    Abstract: Embodiments of the present disclosure provide a method and a device for music play. The method comprises receiving a first operation instruction in a target application for playing music; in response to the first operation instruction, presenting a first interface of the target application, the first interface including an operation control for enhancing a play effect of the music through at least one processing, the processing being used for representing music content in a way more than sound; receiving a second operation instruction for the operation control; processing the music based on the second operation instruction during a process of playing the music.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 11, 2024
    Inventors: Mengfei Xie, Yufan Xue, Wei Hua, Xiaoyu Zhu, Dailong Chen, Jia Ding, Zoujie He, Jie Weng, Chaopeng Liu, Bowen Yang
  • Publication number: 20240120656
    Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 11, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Meng-Hsuan Chen, Cheng-Hua Tsai, Mei-Ju Lee, Ruo-Lan Chang, Wei-Chung Chen
  • Patent number: 11957051
    Abstract: An organic semiconductor mixture and an organic optoelectronic device containing the same are provided. A n-type organic semiconductor compound in the organic semiconductor mixture has a novel chemical structure so that the mixture has good thermal stability and property difference during batch production is also minimized. The organic semiconductor mixture is applied to organic optoelectronic devices such as organic photovoltaic devices for providing good energy conversion efficiency while in use.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: April 9, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Chia-Hua Tsai, Chuang-Yi Liao, Wei-Long Li, Yu-Tang Hsiao
  • Patent number: 11955460
    Abstract: In accordance with some embodiments, a package-on-package (PoP) structure includes a first semiconductor package having a first side and a second side opposing the first side, a second semiconductor package having a first side and a second side opposing the first side, and a plurality of inter-package connector coupled between the first side of the first semiconductor package and the first side of the second semiconductor package. The PoP structure further includes a first molding material on the second side of the first semiconductor package. The second side of the second semiconductor package is substantially free of the first molding material.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Da Tsai, Meng-Tse Chen, Sheng-Feng Weng, Sheng-Hsiang Chiu, Wei-Hung Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20240110111
    Abstract: A method and system for the generation of a medium-Btu, clean and renewable fuel gas to replace fossil fuels in existing lime kilns with minimal retrofitting without significantly compromising the kiln capacity. A steam-blown dual fluidized bed gasifier produces renewable fuel gas from a carbonaceous feedstock such as woody biomass. A gas cleanup process purifies the raw fuel gas, resulting in a clean fuel gas for mitigation of lime contamination and environmental issues. The adiabatic flame temperature and flue gas volume/GJ for the combustion of the renewable fuel gas are similar to values for natural gas, making retrofitting of fossil fuel-fired lime kilns relatively straightforward.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 4, 2024
    Inventors: Yong Hua LI, Wei WANG, Alan Paul WATKINSON
  • Publication number: 20240111473
    Abstract: A distributed display method provides different parts of an application interface that are collaboratively displayed on a plurality of terminals, so that manners for collaborative display between the plurality of terminals are more flexible and richer. A first terminal displays a first interface including a first part and a second part. When the first terminal detects that a preset condition is met, the first terminal displays a second interface, where the second interface includes the first part and does not include the second part; and the first terminal notifies a second terminal to display a third interface, where the third interface includes the second part and does not include the first part.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 4, 2024
    Inventors: Zhen Wang, Bo Qiang, Bingxin Sun, Yanan Zhang, Hongjun Wang, Junjie Si, Mengzheng Hua, Gang Li, Cheng Luo, Xiaoxiao Duan, Wei Li, Chao Xu
  • Patent number: 11948926
    Abstract: In an embodiment, a structure includes: a processor device including logic devices; a first memory device directly face-to-face bonded to the processor device by metal-to-metal bonds and by dielectric-to-dielectric bonds; a first dielectric layer laterally surrounding the first memory device; a redistribution structure over the first dielectric layer and the first memory device, the redistribution structure including metallization patterns; and first conductive vias extending through the first dielectric layer, the first conductive vias connecting the metallization patterns of the redistribution structure to the processor device.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Hua Yu, Wei Ling Chang, Chuei-Tang Wang, Chieh-Yen Chen
  • Patent number: 11950491
    Abstract: A semiconductor mixed material comprises an electron donor, a first electron acceptor and a second electron acceptor. The first electron donor is a conjugated polymer. The energy gap of the first electron acceptor is less than 1.4 eV. At least one of the molecular stackability, ?-?*stackability, and crystallinity of the second electron acceptor is smaller than the first electron acceptor. The electron donor system is configured to be a matrix to blend the first electron acceptor and the second electron acceptor. The present invention also provides an organic electronic device including the semiconductor mixed material.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: April 2, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Yi-Ming Chang, Chuang-Yi Liao, Wei-Long Li, Yu-Tang Hsiao, Chun-Chieh Lee, Chia-Hua Li, Huei-Shuan Tan
  • Publication number: 20240103052
    Abstract: The present invention relates to the cross field of smart grid and artificial intelligence, provides a non-intrusive load monitoring method and device based on physics-informed neural network, comprising the following steps: Step 1, obtaining a total load data and an equipment load data of a building in a certain period of time, and using a sliding window method to cut to construct a training data. Step 2, designing a deep learning neural network model to learn the equipment load characteristics contained in the total load data, and outputting the equipment load forecasting. Step 3, based on a physics-constrained learning framework, training the deep learning neural network model by iteratively optimizing the training loss to obtain a trained physics-informed neural network model. Step 4, monitoring the equipment's power consumption in the building according to the output results of the physics-informed neural network model.
    Type: Application
    Filed: January 14, 2023
    Publication date: March 28, 2024
    Inventors: GANG HUANG, WEI HUA, ZHOU ZHOU
  • Publication number: 20240105642
    Abstract: A method of manufacturing a package structure at least includes the following steps. An encapsulant laterally is formed to encapsulate the die and the plurality of through vias. A plurality of first connectors are formed to electrically connect to first surfaces of the plurality of through vias. A warpage control material is formed over the die, wherein the warpage control material is disposed to cover an entire surface of the die. A protection material is formed over the encapsulant and around the plurality of first connectors and the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
  • Publication number: 20240107731
    Abstract: The present disclosure provides a matte-type electromagnetic interference shielding film including bio-based components, which includes a bio-based insulating layer, a bio-based adhesive layer, a metal layer, and a bio-based electrically conductive adhesive layer. The matte-type electromagnetic interference shielding film including the bio-based component of the present disclosure has a matte appearance and high bio-based content and has the advantages of good surface insulation, high surface hardness, good chemical resistance, high shielding performance, good adhesion strength, low transmission loss, high transmission quality, good operability, high heat resistance, and the inner electrically conductive adhesive layer with long shelf life and storage life. The present disclosure further provides a preparation method thereof.
    Type: Application
    Filed: July 14, 2023
    Publication date: March 28, 2024
    Inventors: Bo-Sian DU, Wei-Chih LEE, Chia-Hua HO, Chih-Ming LIN, Chien-Hui LEE
  • Patent number: 11942464
    Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11941532
    Abstract: Disclosed is a method for adapting a deep learning framework to a hardware device based on a unified backend engine, which comprises the following steps: S1, adding the unified backend engine to the deep learning framework; S2, adding the unified backend engine to the hardware device; S3, converting a computational graph, wherein the computational graph compiled and generated by the deep learning framework is converted into an intermediate representation of the unified backend engine; S4, compiling the intermediate representation, wherein the unified backend engine compiles the intermediate representation on the hardware device to generate an executable object; S5, running the executable object, wherein the deep learning framework runs the executable object on the hardware device; S6: managing memory of the unified backend engine.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: March 26, 2024
    Assignee: ZHEJIANG LAB
    Inventors: Hongsheng Wang, Wei Hua, Hujun Bao, Fei Yang
  • Publication number: 20240084845
    Abstract: A hinge structure includes two hinge arms, two shaft gears, at least one first elastic piece, and at least one second elastic piece. Each hinge arm includes a central shaft. Each of the two shaft gears is connected to the central shaft, each shaft gear includes an extending portion, the groove is defined on the extending portion. Each first elastic piece includes two elastic arms, a first connecting portion, and two protrusions. The elastic arms are disposed on opposite sides of the first connecting portion, the elastic arms and the first connecting portion cooperatively form a first opening, the extending portion passes through the first opening, each protrusion is disposed on each elastic arm. Each second elastic piece is sleeved on the extending portion. The protrusions are configured to be accommodated in the groove. A terminal device is provided according to the present disclosure.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 14, 2024
    Inventors: WEI-HUA HSU, CHIA-HSIN CHANG
  • Publication number: 20240088078
    Abstract: Packaged memory devices including memory devices hybrid bonded to logic devices and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first memory die including a first memory cell electrically coupled to a first word line; a second memory cell electrically coupled to the first word line; and a first interconnect structure electrically coupled to the first word line; a circuitry die including a second interconnect structure, a first conductive feature of the first interconnect structure being bonded to a second conductive feature of the second interconnect structure through metal-to-metal bonds; and a word line driver electrically coupled to the first word line between the first memory cell and the second memory cell, the word line driver being electrically coupled to the first word line through the first interconnect structure and the second interconnect structure.
    Type: Application
    Filed: January 4, 2023
    Publication date: March 14, 2024
    Inventors: Chung-Hao Tsai, Yih Wang, Wei-Ting Chen, Chuei-Tang Wang, Chen-Hua Yu
  • Publication number: 20240089356
    Abstract: A hinge structure is configured to be disposed between a first body and a second body. The hinge structure includes a first shaft assembly, at least two guiding members, a second shaft assembly, and two supporting plates. Each guiding member includes a first end and a second end, the first end is bent to form a sliding groove. The second shaft assembly is disposed in the sliding groove. The two supporting plates are connected to the first body and the second body, respectively, one end of each supporting plate is sleeved on the first shaft assembly, and another end of each supporting plate is fixed to the second end of, when the first body and the second body are closed to or opened with each other, the second shaft assembly is displaced relative to the guiding member. An electronic device is provided according to the present disclosure.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 14, 2024
    Inventors: WEI-HUA HSU, CHIA-HSIN CHANG
  • Publication number: 20240088062
    Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
  • Publication number: 20240088050
    Abstract: A semiconductor device includes a die, an encapsulant over a front-side surface of the die, a redistribution structure on the encapsulant, a thermal module coupled to the back-side surface of the die, and a bolt extending through the redistribution structure and the thermal module. The die includes a chamfered corner. The bolt is adjacent to the chamfered corner.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Chen-Hua Yu, Wei-Kang Hsieh, Shih-Wei Chen, Tin-Hao Kuo, Hao-Yi Tsai