Patents by Inventor Wei Huang

Wei Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240134198
    Abstract: An augmented-reality (AR) eyewear display utilizes an optical waveguide having multi-layered optical gratings in a repeating arrangement. The optical gratings include varying depths, slope angles, lengths, and/or widths in order to tune the gratings to provide an improved AR eyewear display. By using the different configurations of two-dimensional or three-dimensional gratings disclosed herein in a waveguide of an AR eyewear display, optical characteristics of the waveguide are optimized to provide, e.g., high resolution and/or contrast, high display uniformity, high input coupling efficiency, and/or high output coupling efficiency. Accordingly, in some embodiments, aspects of the present disclosure enable lower-power AR eyewear displays to produce the same quality of display of a higher-power conventional AR eyewear display waveguide.
    Type: Application
    Filed: September 24, 2023
    Publication date: April 25, 2024
    Inventors: Wei Jin, Joseph Daniel Lowney, Lu Tian, Qinglan Huang, Thomas Mercier
  • Publication number: 20240136291
    Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.
    Type: Application
    Filed: January 12, 2023
    Publication date: April 25, 2024
    Inventors: Hsiang-Ku SHEN, Chen-Chiu HUANG, Chia-Nan LIN, Man-Yun WU, Wen-Tzu CHEN, Sean YANG, Dian-Hao CHEN, Chi-Hao CHANG, Ching-Wei LIN, Wen-Ling CHANG
  • Publication number: 20240137285
    Abstract: A machine learning system automatically diagnoses and resolves issues in a telecommunications network. When a customer reports a network issue using a mobile application, the device performs a diagnostic test, such as a speed test. In addition, network logs or performance metrics during occurrence of the network issue are collected. The results of the diagnostic are used as inputs to a machine learning model in combination with the network logs or metrics to predict the cause of the network issue or to perform a corrective action.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 25, 2024
    Inventors: Lance Paul Lukens, Wei Huang, Anandajothi Muttayane, Anselmo Myungsup Shim, Vikas Ranjan
  • Patent number: 11965920
    Abstract: A method for achieving terminal-pair definition of four-terminal-pair (4TP) impedance and an application thereof are provided, which belongs to the field of precision measurement and metrology. A current output terminal of a two-stage follower is connected to a high current terminal of impedance through a coaxial line, and a voltage output terminal of the two-stage follower is connected to a high voltage terminal of the impedance through the coaxial line, which makes current of the high voltage terminal be 0, and core wire currents and outer wire currents of the high current terminal equal and reverse. The terminal-pair definition of the 4TP impedance can be satisfied; and the follower is added to make a bridge ratio variable and isolate effects of bridge load changes, thereby accelerating a balancing speed of the 4TP impedance bridge, and achieving accurate and fast comparative measurement having high precision of the 4TP AC impedance.
    Type: Grant
    Filed: November 6, 2023
    Date of Patent: April 23, 2024
    Assignee: NATIONAL INSTITUTE OF METROLOGY, CHINA
    Inventors: Yan Yang, Lu Huang, Dongxue Dai, Wei Wang, Xia Liu
  • Patent number: 11967628
    Abstract: A semiconductor structure includes a substrate, an isolation layer, a dielectric layer, an insulation layer, a conductor and a capping layer. The substrate has a concave portion. The isolation layer is located on a top surface of the substrate. The dielectric layer is located on the isolation layer. The insulation layer is located on a surface of the concave portion and extends to a sidewall of the isolation layer. The conductor is located on the insulation layer in the concave portion. The conductor has a first top surface and a second top surface, and the first top surface is closer to the dielectric layer than the second top surface. The capping layer is located in the concave portion and covers the conductor.
    Type: Grant
    Filed: July 6, 2023
    Date of Patent: April 23, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chih-Wei Huang, Hsu-Cheng Fan, En-Jui Li
  • Patent number: 11964671
    Abstract: The disclosure relates to technology for determining vehicle environment interaction metrics and/or passenger behavioral metrics for autonomous vehicles in a driving environment. A group of one or more autonomous vehicles independently determine a VEI score for a target vehicle within a predefined vicinity of the group of one or more vehicles. A target vehicle may determine a VPB score based on passengers within the target vehicle. VEI scores and/or VPB scores determined for a target vehicle may be used by the target vehicle to reinforce and/or correct driving actions of the target vehicle.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: April 23, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Luis Bill, Chengcheng Jia, Lei Yang, Hai Yu, Wei Huang
  • Patent number: 11964436
    Abstract: In an example, a method includes operating, by a processor, on object model data and operating, on a processor, on pattern data. The object model data describes at least part of an object to be generated in additive manufacturing and the pattern data describes an object pattern intended to be formed on at least a portion of the part of the object to be generated in additive manufacturing. The method includes determining, by a processor, control data to control a print agent applicator to apply a pattern of fusing agent onto a part of a layer of build material. The pattern of fusing agent comprises a fusing agent area and a gap area that lacks fusing agent. The gap area corresponds to the object pattern such that no fusing agent is applied to a part of the layer of build material that corresponds to the object pattern.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: April 23, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wei Huang, Gary J. Dispoto, Craig Peter Sayers
  • Patent number: 11964358
    Abstract: A method includes placing a polisher head on platen, the polisher head including a set of first magnets, and controlling a set of second magnets to rotate the polisher head on the platen, wherein controlling the set of second magnets includes reversing the polarity of at least one second magnet of the set of second magnets to produce a magnetic force on at least one first magnet of the set of first magnets, wherein the set of second magnets are external to the polisher head.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yu Wang, Chun-Hao Kung, Ching-Hsiang Tsai, Kei-Wei Chen, Hui-Chi Huang
  • Publication number: 20240130257
    Abstract: Devices and method for forming a switch including a heater layer including a first heater pad, a second heater pad, and a heater line connecting the first heater pad and the second heater pad, a phase change material (PCM) layer positioned in a same vertical plane as the heater line, and a floating spreader layer including a first portion positioned in the same vertical plane as the heater line and the PCM layer, in which the first portion has a first width that is less than or equal to a distance between proximate sidewalls of the first heater pad and the second heater pad.
    Type: Application
    Filed: April 21, 2023
    Publication date: April 18, 2024
    Inventors: Fu-Hai LI, Yi Ching ONG, Hsin Heng WANG, Tsung-Hao YEH, Yu-Wei TING, Kuo-Pin CHANG, Hung-Ju LI, Kuo-Ching HUANG
  • Publication number: 20240122921
    Abstract: The present invention relates to methods for treating patients with cancer, including patients with hematological malignancy, wherein the method comprises administering to the patient a therapeutically effective amount of a compound of formula (I), or a pharmaceutically acceptable salt thereof, wherein R1 and R2 are as defined herein.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 18, 2024
    Inventors: Yifan ZHAI, Zi CHEN, Qian JIANG, Xiaojun HUANG, Wei LIU, Dajun YANG
  • Publication number: 20240126694
    Abstract: An out-of-order buffer includes an out-of-order queue and a controlling circuit. The out-of-order queue includes a request sequence table and a request storage device. The controlling circuit receives and temporarily stores the plural requests into the out-of-order queue. After the plural requests are transmitted to plural corresponding target devices, the controlling circuit retires the plural requests. The request sequence table contains m×n indicating units. The request sequence table contains m entry indicating rows. Each of the m entry indicating rows contains n indicating units. The request storage device includes m storage units corresponding to the m entry indicating rows in the request sequence table. The state of indicating whether one request is stored in the corresponding storage unit of the m storage units is recoded in the request sequence table. The storage sequence of the plural requests is recoded in the request sequence table.
    Type: Application
    Filed: November 18, 2022
    Publication date: April 18, 2024
    Inventors: Jyun-Yan LI, Po-Hsiang HUANG, Ya-Ting CHEN, Yao-An TSAI, Shu-Wei YI
  • Publication number: 20240126002
    Abstract: A backlight module includes a light source, a first prism sheet disposed on the light source, and a light type adjustment sheet disposed on a side of the first prism sheet away from the light source and including a base and multiple light type adjustment structures. The multiple light type adjustment structures are disposed on the first surface of the base. Each light type adjustment structure has a first structure surface and a second structure surface connected to each other. The first structure surface of each light type adjustment structure and the first surface of the base form a first base angle therebetween, and the second structure surface of each light type adjustment structure and the first surface of the base form a second base angle therebetween. The angle of the first base angle is different from the angle of the second base angle.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 18, 2024
    Applicant: Coretronic Corporation
    Inventors: Chih-Jen Tsang, Chung-Wei Huang, Shih-Yen Cheng, Jung-Wei Chang, Han-Yuan Liu, Chun-Wei Lee
  • Publication number: 20240125660
    Abstract: A hub directly driven by a motor and used for a heavy-duty chassis dynamometer includes a hub body, wherein a mounting surface is arranged on an inner circumference of the hub body and is disposed around a transmission shaft coaxial with the hub body, the transmission shaft is sleeved with a driving assembly, and bearing assemblies are disposed on two sides of the driving assembly in an axial direction respectively; a plurality of axial mounting plates are disposed on an outer circumference of the driving assembly, and tension sensor assemblies are connected to the axial mounting plates located outside the hub body and are mounted on the support frame; and an end, away from the mounting surface, of the transmission shaft, is sleeved with an end flange plate, and a plurality of brake assemblies are disposed on the end flange plate and are mounted on the support frame.
    Type: Application
    Filed: March 2, 2021
    Publication date: April 18, 2024
    Applicant: JiangSu XCMG Construction Machinery Research Institute LTD.
    Inventors: Hanguang LIU, Bin Zhao, Wei XU, Cheng HUANG, Congcong ZHU
  • Publication number: 20240124163
    Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 18, 2024
    Applicant: National Cheng Kung University
    Inventors: Yueh-Heng Li, Yu-Ting Wu, Chao-Wei Huang, Wei-Cheng Lo, Hsun-Chen Hsieh, Ping-Han Huang, Yi-Long Huang, Sheng-Wen Liu, Wei-Cheng Lien
  • Publication number: 20240128252
    Abstract: The present application discloses a semiconductor structure. The semiconductor structure a top die and a bottom die, and the maximum die size is constrained to reticle dimension. Each die includes (1) core: computation circuits, (2) phy: analog circuit connecting to memory, (3) I/O: analog circuit connecting output elements, (4) SERDES: serial high speed analog circuit, (5) intra-stack connection circuit, and (6) cache memory. This semiconductor structure can be chapleted design for high wafer yield with least tape out masks for cost saving. The intra-stack connection circuit connects the top die and the bottom die in the shortest distance (about tens of micrometers), so as to provide high signal quality and power efficiency.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Inventors: TZU-WEI CHIU, CHUN-WEI CHANG, SHANG-PIN CHEN, WEI-CHIH CHEN, CHE-YEN HUANG
  • Patent number: 11963144
    Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may receive a configuration message configuring the UE to communicate coordinated transmissions with multiple transmission reception points (TRPs) using a first coordinated transmission mode of a set of different coordinated transmission modes. The UE may receive, based on the configuration message, downlink control information including at least one indicator and receive a first coordinated transmission communicated in accordance with the first coordinated transmission mode. The UE may transmit, in accordance with a feedback configuration corresponding to the at least one indicator and the first coordinated transmission mode, a feedback message for the first coordinated transmission to at least one of the multiple TRPs.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: April 16, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Wei Yang, Yi Huang, Joseph Binamira Soriaga, Gokul Sridharan, Jay Kumar Sundararajan, Seyedkianoush Hosseini
  • Patent number: 11960318
    Abstract: A clock oscillator, a clock oscillator production method and use method, and a chip including the clock oscillator are provided. The clock oscillator includes a resonator, a shock-absorbing material layer, and a base, and at least a part of the shock-absorbing material layer is located between the resonator and the base. In the clock oscillator, the shock-absorbing material layer is added between the resonator and the base, and the shock-absorbing material layer can effectively prevent a mechanical wave from being conducted between the base and the resonator, so that the resonator is protected from external vibration. This can ensure, when there is external vibration, that an output frequency of the resonator is not deteriorated and improve shock absorption performance of the clock oscillator.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: April 16, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wei Wu, Jinhui Wang, Hao Li, Yong Yang, Xinhua Huang
  • Patent number: D1024051
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Hui-Jung Huang, Hong-Kuan Li, I-Lun Li, Ling-Mei Kuo, Kuan-Ju Chen, Fang-Ying Huang, Kai-Hung Huang, Szu-Wei Yang, Kai-Teng Cheng
  • Patent number: D1024054
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: I-Lun Li, Kai-Teng Cheng, Szu-Wei Yang, Fang-Ying Huang
  • Patent number: D1024055
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Hsueh-Wei Chung, Pao-Ching Huang, Cheng-Han Lin