Abstract: A device for decoding video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: determine a deterministic bounding box from which to retrieve reference samples of reference pictures of video data for performing decoder-side motion vector derivation (DMVD) for a current block of the video data; derive a motion vector for the current block according to DMVD using the reference samples within the deterministic bounding box; form a prediction block using the motion vector; and decode the current block using the prediction block.

Abstract: An electronic device includes a circuit board, a package on package structure, a heat-conducting cover, and a heat-conducting fluid. The circuit board has a first surface and a second surface opposite to each other. The package on package structure is disposed on the first surface. The package on package structure has at least one heat generating element. The heat-conducting cover is disposed on the second surface and is in thermal contact with the circuit board. The heat-conducting cover and the second surface form an enclosed space. The heat-conducting fluid is filled in the enclosed space.

Abstract: The invention provides a method for antenna selectin of a user equipment (UE). The UE may comprise a plurality of antennas. The method may comprise calculating one or more quality evaluations respectively associated with one or more first antenna subsets, and selecting one of the one or more first antenna subsets according to the one or more quality evaluations. Each antenna subset may include one or more of the plurality of antennas. Each quality evaluation may be calculated under a condition that the antenna(s) included in the associated antenna subset is (are) used to communicate.

Abstract: A high electron mobility transistor (HEMT) device including the following components is provided. A gate electrode is located on a barrier layer. A source electrode is located on the first side of the gate electrode. A drain electrode is located on the second side of the gate. A source field plate is connected to the source electrode. The source field plate includes first, second, and third field plate portions. The first field plate portion is connected to the source electrode and is located on the first side of the gate electrode. The second field plate portion is located on the second side of the gate electrode. The third field plate portion is connected to the end of the first field plate portion and the end of the second field plate portion. The source field plate has a first opening located directly above the gate electrode.

Abstract: An intelligent warm-up method of machine tool, applicable to a machine tool, includes: a step of, based on temperature change data and thermal displacement data of a spindle measured at different time points, establishing a thermal compensation model; a step of, while the machine tool performs a warm-up process, inputting temperature change values measured at least one component of the machine tool at intervals to the thermal compensation model to obtain corresponding thermal-displacement estimated values of the spindle at different time points and changes of thermal displacement values at individual time points; and, a step of, based on the changes of the thermal displacement values at the individual time points, deriving corresponding warm-up completion degrees.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; removing the hard mask to form a first recess for exposing the barrier layer; removing the hard mask adjacent to the first recess to form a second recess; and forming a p-type semiconductor layer in the first recess and the second recess.

Abstract: Provided is a traffic pattern adaptive modem (modulator-demodulator) gear control method for an electronic device. The traffic pattern adaptive modem (modulator-demodulator) gear control method includes: when a first criteria is met, on-line collecting a period of input data; executing traffic prediction; whether a second criteria is met to apply the traffic prediction is determined; when the second criteria is met, based on the traffic prediction, a modem gear is adaptively adjusted; and when the second criteria is not met, an algorithm is trained or a period is waited for continuing monitoring whether the second criteria is still met.

Abstract: A combination of probiotics for improving body compositions includes Lacticaseibacillus paracasei S38 and Bacillus coagulans BC198. The combination of probiotics can be a medicine composition, a nutrient supplement, healthy food or a combination thereof. The applications of the combination of probiotics include weight loss, reduction of fat, abatement of appetite, production of butyric acid within intestinal tracts and an increased count of Akkermansia muciniphila or Ruminococcaceae inside intestines.

Abstract: A method of fabricating a metal gate transistor includes providing a substrate. Then, a high-k dielectric layer is formed to cover the substrate. Later, an ion implantation process is performed to implant fluoride ions into the high-k dielectric layer. After the ion implantation process, a polysilicon gate is formed on the high-k dielectric layer. Next, an interlayer dielectric layer is formed to cover the substrate and the polysilicon gate. Finally, the polysilicon gate is replaced by a metal gate.

Abstract: A memory device comprises a source region, a drain region, a channel region, a gate dielectric layer, an MTJ stack, and a metal gate. The source region and the drain region are over a substrate. The channel region is between the source region and the drain region. The gate dielectric layer is over the channel region. The MTJ stack is over the gate dielectric layer. The MTJ stack comprises a first ferromagnetic layer, a second ferromagnetic layer with a switchable magnetization, and a tunnel barrier layer between the first and second ferromagnetic layers. The metal gate is over the MTJ stack.

Abstract: A memory structure comprises a dielectric layer, a first ferromagnetic bottom electrode, a second ferromagnetic bottom electrode, an SOT channel layer, and an MTJ structure. The dielectric layer is over the substrate. The first ferromagnetic bottom electrode extends through the dielectric layer. The second ferromagnetic bottom electrode extends through the dielectric layer, and is spaced apart from the first ferromagnetic bottom electrode. The SOT channel layer extends from the first ferromagnetic bottom electrode to the second ferromagnetic bottom electrode. The MTJ structure is over the SOT channel layer.

Abstract: Embodiments of the present disclosure provide a cryogenic pump for semiconductor processing, including a body having a flange, configured to be coupled to a process chamber, and an opening defined at a first end of the body; one or more capture plate modules disposed in the body; and a cold header thermally coupled to the one or more capture plate modules. A longitudinal axis of the body is defined from the first end of the body to a second end of the body. A first lateral dimension of the opening is less than a second lateral dimension of the body, the first and second lateral dimensions being defined perpendicular to the longitudinal axis. The second lateral dimension is defined at a position between the opening and the second end.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; removing the hard mask to form a first recess for exposing the barrier layer; removing the hard mask adjacent to the first recess to form a second recess; and forming a p-type semiconductor layer in the first recess and the second recess.

Abstract: An apparatus includes a susceptor and a non-reactive gas source. The susceptor has through holes and a wafer support surface. Each through hole includes a lift pin and a lift pin head. The lift pin has a vertical degree of motion in the through hole to lift up or place a wafer on the susceptor. The lift pin head has at least one flow channel structure running from its first surface at least partially exposed to a bottom side of the susceptor through its second surface exposed to a top side of the susceptor wherein the lift pin. The non-reactive gas source is configured to flow a gas to a backside of the wafer through the flow channel structure through the bottom side of the susceptor.

Abstract: A memory device comprises a source region, a drain region, a channel region, a gate dielectric layer, an MTJ stack, and a metal gate. The source region and the drain region are over a substrate. The channel region is between the source region and the drain region. The gate dielectric layer is over the channel region. The MTJ stack is over the gate dielectric layer. The MTJ stack comprises a first ferromagnetic layer, a second ferromagnetic layer with a switchable magnetization, and a tunnel barrier layer between the first and second ferromagnetic layers. The metal gate is over the MTJ stack.

Abstract: A memory structure comprises a dielectric layer, a first ferromagnetic bottom electrode, a second ferromagnetic bottom electrode, an SOT channel layer, and an MTJ structure. The dielectric layer is over the substrate. The first ferromagnetic bottom electrode extends through the dielectric layer. The second ferromagnetic bottom electrode extends through the dielectric layer, and is spaced apart from the first ferromagnetic bottom electrode. The SOT channel layer extends from the first ferromagnetic bottom electrode to the second ferromagnetic bottom electrode. The MTJ structure is over the SOT channel layer.

Abstract: A communication apparatus comprises a radio transceiver and a modem processor. The radio transceiver is configured to transmit or receive signals. The modem processor is coupled to the radio transceiver and configured to perform operations comprising: performing a beam management, to train a first receiver (Rx) beam; receiving a physical downlink shared channel (PDSCH) according to the first Rx beam; selecting at least one second Rx beam according to a scenario, if a first performance indicator of the first Rx beam is lower than a previous first performance indicator of the first Rx beam by a first threshold; determining at least one second performance indicator of the PDSCH according to a round-robin test; selecting a third Rx beam from the at least one second Rx beam according to the at least one second performance indicator; and receiving the PDSCH according to the third Rx beam.